Searched refs:CLK_MM_MDP_RDMA0 (Results 1 - 21 of 21) sorted by relevance
| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt6765-mm.c | 26 GATE_MM(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_ck", 0),
|
| H A D | clk-mt8183-mm.c | 48 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 12),
|
| H A D | clk-mt6795-mm.c | 36 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 3),
|
| H A D | clk-mt6797-mm.c | 37 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 4),
|
| H A D | clk-mt6779-mm.c | 48 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 12),
|
| H A D | clk-mt8173-mm.c | 40 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 3),
|
| H A D | clk-mt2712-mm.c | 47 GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 3),
|
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6797-clk.h | 219 #define CLK_MM_MDP_RDMA0 5 macro
|
| H A D | mt6765-clk.h | 251 #define CLK_MM_MDP_RDMA0 0 macro
|
| H A D | mt8173-clk.h | 251 #define CLK_MM_MDP_RDMA0 4 macro
|
| H A D | mediatek,mt6795-clk.h | 222 #define CLK_MM_MDP_RDMA0 3 macro
|
| H A D | mt2712-clk.h | 304 #define CLK_MM_MDP_RDMA0 3 macro
|
| H A D | mt6779-clk.h | 353 #define CLK_MM_MDP_RDMA0 13 macro
|
| H A D | mt8183-clk.h | 321 #define CLK_MM_MDP_RDMA0 12 macro
|
| /linux-master/include/dt-bindings/clock/ |
| H A D | mt6797-clk.h | 219 #define CLK_MM_MDP_RDMA0 5 macro
|
| H A D | mt6765-clk.h | 251 #define CLK_MM_MDP_RDMA0 0 macro
|
| H A D | mt8173-clk.h | 251 #define CLK_MM_MDP_RDMA0 4 macro
|
| H A D | mediatek,mt6795-clk.h | 222 #define CLK_MM_MDP_RDMA0 3 macro
|
| H A D | mt2712-clk.h | 304 #define CLK_MM_MDP_RDMA0 3 macro
|
| H A D | mt6779-clk.h | 353 #define CLK_MM_MDP_RDMA0 13 macro
|
| H A D | mt8183-clk.h | 321 #define CLK_MM_MDP_RDMA0 12 macro
|
Completed in 239 milliseconds