Searched refs:DImode (Results 1 - 25 of 121) sorted by relevance

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/haiku-buildtools/gcc/gcc/config/alpha/
H A Dalpha.c754 case DImode:
878 return (mode == SImode || mode == DImode);
906 register and a constant address, or just a register. For DImode,
914 if (mode == DImode
1471 else if (mode == DImode)
1700 from register elimination into a DImode fp register. */
1987 /* We are only called for SImode and DImode. If this is SImode, ensure that
2025 can't load this constant in one insn, do this in DImode. */
2033 target = no_output ? NULL : gen_lowpart (DImode, target);
2034 mode = DImode;
[all...]
H A Dalpha.h234 (MODE) = DImode; \
395 ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
929 #define Pmode DImode
/haiku-buildtools/legacy/gcc/gcc/config/alpha/
H A Dalpha.c456 mode smaller than DImode. */
599 return mode == ptr_mode || mode == DImode;
671 || (mode == DImode && (code == LEU || code == LTU)));
688 || (mode == DImode && (code == LEU || code == LTU)));
1126 /* We are only called for SImode and DImode. If this is SImode, ensure that
1201 /* We are only called for SImode and DImode. If this is SImode, ensure that
1328 emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d3)));
1334 emit_move_insn (target, gen_rtx_ASHIFT (DImode, target, GEN_INT (32)));
1338 emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d2)));
1340 emit_move_insn (target, gen_rtx_PLUS (DImode, targe
[all...]
/haiku-buildtools/legacy/gcc/gcc/
H A Dmachmode.def74 DEF_MACHMODE (SImode, "SI", MODE_INT, 4, 4, DImode)
76 DEF_MACHMODE (DImode, "DI", MODE_INT, 8, 8, TImode)
/haiku-buildtools/gcc/gcc/config/tilegx/
H A Dtilegx.c157 case DImode:
233 /* SImode register values are sign-extended to DImode. */
234 if (mode == SImode && mode_rep == DImode)
816 /* Implement TARGET_SHIFT_TRUNCATION_MASK. DImode shifts use the mode
823 return mode == DImode ? 63 : 0;
1495 replicating it to fill an interger of mode DImode. NUM is first
1517 case DImode:
1563 /* Implement DImode rotatert. */
1624 /* Force the destination to DImode so we can use DImode instruction
[all...]
H A Dtilegx.h388 (MODE) = DImode; \
407 #define Pmode (TARGET_32BIT ? SImode : DImode)
413 #define FUNCTION_MODE DImode
/haiku-buildtools/legacy/gcc/gcc/config/mips/
H A Diris6.h266 (Pmode == DImode ? ".section\t.ctors,1,2,0,8" : ".section\t.ctors,1,2,0,4")
268 (Pmode == DImode ? ".section\t.dtors,1,2,0,8" : ".section\t.dtors,1,2,0,4")
344 (Pmode == DImode) ? ".dword" : ".word"); \
355 (Pmode == DImode) ? ".dword" : ".word"); \
H A Dmips.h648 /* Generate three-operand multiply instructions for both SImode and DImode. */
1415 #define POINTER_SIZE (Pmode == DImode ? 64 : 32)
1419 #define POINTER_BOUNDARY (Pmode == DImode ? 64 : 32)
1529 want to promote to DImode when in 64 bit mode, because that would
1656 MODE. In 32 bit mode, require that DImode and DFmode be in even
1657 registers. For DImode, this makes some of the insns easier to
1658 write, since you don't have to worry about a DImode value in
2634 Pmode == DImode ? 16 : 8); \
2664 if (Pmode == DImode) \
2677 if (Pmode == DImode) \
[all...]
H A Dmips.c1026 && mode == DImode
1028 && GET_MODE (op) == DImode
1052 && mode == DImode
1054 && GET_MODE (op) == DImode
1072 && mode == DImode
1074 && GET_MODE (op) == DImode
1092 && mode == DImode
1094 && GET_MODE (op) == DImode
1112 && mode == DImode
1114 && GET_MODE (op) == DImode
[all...]
/haiku-buildtools/gcc/gcc/config/mmix/
H A Dmmix.c475 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
486 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
757 cmode = DImode;
1005 mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD);
1007 mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD);
1010 mem = adjust_address (m_tramp, DImode, 0);
1410 /* We don't get here anymore for CONST_DOUBLE, because DImode
2028 emit_move_insn (gen_rtx_MEM (DImode,
2031 gen_rtx_REG (DImode, regno));
2055 insn = emit_move_insn (gen_rtx_MEM (DImode,
[all...]
/haiku-buildtools/gcc/gcc/config/vax/
H A Dvax.c312 low[i] = operand_subword (operands[i], 0, 0, DImode);
313 operands[i] = operand_subword (operands[i], 1, 0, DImode);
861 case DImode:
885 if (mode == DImode)
919 if (mode == DImode)
963 else if (mode == DImode)
979 if (mode == DImode || mode == DFmode)
1178 case DImode:
1248 || !illegal_addsub_di_memory_operand (operands[0], DImode))
1386 case DImode
[all...]
/haiku-buildtools/gcc/gcc/config/sparc/
H A Dsparc.c1807 if (mode == DImode)
1878 case DImode:
1942 /* Load OP1, a symbolic 64-bit constant, into OP0, a DImode register.
1958 temp = gen_rtx_REG (DImode, REGNO (temp));
1978 temp1 = gen_reg_rtx (DImode);
1980 emit_insn (gen_rtx_SET (VOIDmode, temp1, gen_rtx_HIGH (DImode, op1)));
1981 emit_insn (gen_rtx_SET (VOIDmode, op0, gen_rtx_LO_SUM (DImode, temp1, op1)));
2005 temp1 = gen_reg_rtx (DImode);
2006 temp2 = gen_reg_rtx (DImode);
2007 temp3 = gen_reg_rtx (DImode);
[all...]
H A Dsparc.h510 #define Pmode (TARGET_ARCH64 ? DImode : SImode)
568 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_ARCH64 ? TImode : DImode)
573 ((LEVEL) == SAVE_NONLOCAL ? (TARGET_ARCH64 ? TImode : DImode) : Pmode)
1466 this has to be DImode in that case */
1469 (! TARGET_PTR64 ? SImode : flag_pic ? SImode : TARGET_CM_MEDLOW ? SImode : DImode)
1471 /* If assembler does not have working .subsection -1, we use DImode for pic, as otherwise
1474 (! TARGET_PTR64 ? SImode : flag_pic ? DImode : TARGET_CM_MEDLOW ? SImode : DImode)
/haiku-buildtools/gcc/gcc/config/ia64/
H A Dia64.c1418 /* Split a post-reload TImode or TFmode reference into two DImode
1441 out[reversed] = gen_rtx_REG (DImode, REGNO (in));
1442 out[!reversed] = gen_rtx_REG (DImode, REGNO (in) + 1);
1454 quantity into a pair of DImode constants. */
1489 (in, DImode, gen_rtx_POST_INC (Pmode, base), 0);
1491 (in, DImode, dead ? 0 : gen_rtx_POST_DEC (Pmode, base), 8);
1499 (in, DImode, gen_rtx_POST_DEC (Pmode, base), 8);
1500 out[1] = adjust_address (in, DImode, 0);
1508 out[0] = adjust_automodify_address (in, DImode, 0, 0);
1509 out[1] = adjust_automodify_address (in, DImode,
[all...]
H A Dvms.h140 (MODE) = DImode; \
/haiku-buildtools/gcc/gcc/testsuite/gcc.dg/vect/
H A Dpr48765.c12 VOIDmode, QImode, HImode, PSImode, SImode, PDImode, DImode, TImode, OImode, enumerator in enum:machine_mode
/haiku-buildtools/gcc/gcc/config/aarch64/
H A Daarch64-elf.h95 case DImode: /* See comment in aarch64_output_casesi. */ \
H A Daarch64.c788 /* In ILP32, the mode of dest can be either SImode or DImode. */
808 /* In ILP32, the mode of dest can be either SImode or DImode,
812 DImode if dest is dereferenced to access the memeory.
824 if (mode == DImode)
879 /* In ILP32, the mode of dest can be either SImode or DImode,
883 DImode if dest is dereferenced to access the memeory.
892 if (mode == DImode)
1058 case DImode:
1195 /* Remaining cases are all for DImode. */
1245 subtarget = subtargets ? gen_reg_rtx (DImode)
[all...]
/haiku-buildtools/gcc/gcc/config/pa/
H A Dpa64-regs.h147 || (MODE) == SImode || (MODE) == DImode)
H A Dpa32-regs.h176 /* There are no instructions that use DImode in PA 1.0, so we only
181 || (MODE) == SImode || (TARGET_PA_11 && (MODE) == DImode))
/haiku-buildtools/gcc/gcc/config/vms/
H A Dvms-c.c319 c_default_pointer_mode = DImode;
335 c_default_pointer_mode = DImode;
478 c_default_pointer_mode = DImode;
/haiku-buildtools/legacy/gcc/gcc/config/vax/
H A Dvax.c64 low[i] = operand_subword (operands[i], 0, 0, DImode);
65 operands[i] = operand_subword (operands[i], 1, 0, DImode);
424 case DImode:
438 if (mode == DImode)
462 if (mode == DImode)
501 else if (mode == DImode)
510 if (mode == DImode || mode == DFmode)
/haiku-buildtools/legacy/gcc/gcc/config/sparc/
H A Dsparc.c442 || (TARGET_ARCH64 && register_operand (op, DImode)));
919 can fit in a 13 bit immediate field. This is an acceptable DImode operand
942 /* Return true if OP is a constant 4096 for DImode on ARCH64 */
956 /* Return true if OP is suitable as second operand for add/sub in DImode */
967 can fit in an 11 bit immediate field. This is an acceptable DImode
990 can fit in an 10 bit immediate field. This is an acceptable DImode
1101 variants when we are working in DImode and !arch64. */
1109 || (mode == DImode
1128 /* If !arch64 and this is a DImode const, allow it so that
1131 && mode == DImode
[all...]
/haiku-buildtools/legacy/gcc/gcc/config/clipper/
H A Dclipper.h209 On the clipper 0-15 may hold any mode but DImode and DFmode must be even.
214 ? ((MODE) != DImode && (MODE) != DFmode || ((REGNO) & 1) == 0) \
494 && ((MODE) != DImode || (CUM).num == 0)) \
497 if ((MODE) == DImode) \
526 if they really fit into ONE register. The exception is a DImode arg
534 && ((MODE) != DImode || (CUM).num == 0)) \
/haiku-buildtools/legacy/gcc/gcc/config/rs6000/
H A Drs6000.h515 (MODE) = (! TARGET_POWERPC64 ? SImode : DImode);
743 r12 (not saved; if used for DImode or DFmode would use r13)
798 registers only can hold floating modes and DImode, and CR register only
808 : FPMEM_REGNO_P (REGNO) ? ((MODE) == DImode || (MODE) == DFmode) \
1390 : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : TImode) : Pmode)
1839 || (TARGET_POWERPC64 && GET_MODE (X) == DImode) \
1886 auto-increment. For DFmode and DImode with an constant plus register,
1891 32-bit DImode, TImode), indexed addressing cannot be used because
1923 && (((MODE) != DFmode && (MODE) != DImode) \
1948 && (MODE) != DImode \
[all...]

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