config/sparc/sparc.c

442 	  || (TARGET_ARCH64 && register_operand (op, DImode)));
919    can fit in a 13 bit immediate field.  This is an acceptable DImode operand
942 /* Return true if OP is a constant 4096 for DImode on ARCH64 */
956 /* Return true if OP is suitable as second operand for add/sub in DImode */
967    can fit in an 11 bit immediate field.  This is an acceptable DImode
990    can fit in an 10 bit immediate field.  This is an acceptable DImode
1101      variants when we are working in DImode and !arch64.  */
1109 	       || (mode == DImode
1128   /* If !arch64 and this is a DImode const, allow it so that
1131       && mode == DImode
1257       emit_insn (gen_rtx_SET (VOIDmode, temp1, gen_rtx_HIGH (DImode, op1)));
1258       emit_insn (gen_rtx_SET (VOIDmode, op0, gen_rtx_LO_SUM (DImode, temp1, op1)));
1277 			      gen_rtx_ASHIFT (DImode, op0, GEN_INT (12))));
1308 			      gen_rtx_ASHIFT (DImode, op0, GEN_INT (32))));
1310 			      gen_rtx_PLUS (DImode, op0, temp1)));
1351 				  gen_rtx_ASHIFT (DImode, op0, GEN_INT (32))));
1353 				  gen_rtx_PLUS (DImode, op0, temp1)));
1411   return gen_rtx_IOR (DImode, src, GEN_INT64 (val));
1419   return gen_rtx_XOR (DImode, src, GEN_INT64 (val));
1461 				  gen_rtx_NOT (DImode, temp)));
1503 			  gen_rtx_ASHIFT (DImode, temp2,
1530     sub_temp = gen_reg_rtx (DImode);
1550       rtx temp2 = gen_reg_rtx (DImode);
1551       rtx temp3 = gen_reg_rtx (DImode);
1552       rtx temp4 = gen_reg_rtx (DImode);
1555 			      gen_rtx_ASHIFT (DImode, sub_temp,
1564 				  gen_rtx_PLUS (DImode, temp4, temp3)));
1569 				  gen_rtx_PLUS (DImode, temp4, temp2)));
1585 				  gen_rtx_ASHIFT (DImode, sub_temp,
1588 				  gen_rtx_IOR (DImode, op0, low1)));
1599 				  gen_rtx_ASHIFT (DImode, sub_temp,
1602 				  gen_rtx_IOR (DImode, op0, low2)));
1611 			      gen_rtx_ASHIFT (DImode, sub_temp,
1615 				gen_rtx_IOR (DImode, op0, low3)));
1768     temp = gen_reg_rtx (DImode);
1844 				gen_rtx_ASHIFT (DImode,
1850 				gen_rtx_LSHIFTRT (DImode,
1879 				gen_rtx_LSHIFTRT (DImode, temp,
1884 				gen_rtx_ASHIFT (DImode, temp,
1946 	  negated_const = gen_rtx_CONST_DOUBLE (DImode, const0_rtx,
1959 				  gen_rtx_NOT (DImode, temp)));
2111       && (GET_MODE (sparc_compare_op0) == DImode
2112 	  || GET_MODE (operands[0]) == DImode))
2138 	  && GET_MODE (operands[0]) == DImode
2139 	  && GET_MODE (op0) == DImode)
2143 			      gen_rtx_IF_THEN_ELSE (DImode,
2144 				       gen_rtx_fmt_ee (compare_code, DImode,
2152       if (GET_MODE (op0) != DImode)
2154 	  temp = gen_reg_rtx (DImode);
2161 				   gen_rtx_fmt_ee (compare_code, DImode,
2278         return GET_MODE_SIZE (GET_MODE (src)) <= GET_MODE_SIZE (DImode);
2285     return GET_MODE_SIZE (GET_MODE (src)) <= GET_MODE_SIZE (DImode);
2302 	   && arith_double_operand (XEXP (src, 0), DImode)
2303 	   && arith_double_operand (XEXP (src, 1), DImode)
2304 	   && (register_operand (XEXP (src, 0), DImode)
2305 	       || register_operand (XEXP (src, 1), DImode)))
3526     case DImode : case CDImode :
4265     mode = DImode;
4578   if (mode != DImode)
5231    a 64 bit (DImode) value.  */
5536   emit_move_insn (gen_rtx_MEM (DImode, plus_constant (tramp, 16)), cxt);
5537   emit_move_insn (gen_rtx_MEM (DImode, plus_constant (tramp, 24)), fnaddr);
5538   emit_insn (gen_flush (validize_mem (gen_rtx_MEM (DImode, tramp))));
5541     emit_insn (gen_flush (validize_mem (gen_rtx_MEM (DImode, plus_constant (tramp, 8)))));
7470 /* Return 0 if the high 32 bits of X (the low word of X, if DImode) are