Searched refs:DAC2R (Results 1 - 13 of 13) sorted by relevance

/haiku/src/add-ons/accelerants/via/engine/
H A Dinfo.c270 uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
271 uint16 height = ((DAC2R(FP_VDISPEND) & 0x0000ffff) + 1);
298 uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
299 uint16 height = ((DAC2R(FP_VDISPEND) & 0x0000ffff) + 1);
313 ((DACR(FP_TG_CTRL) & 0x80000000) == (DAC2R(FP_TG_CTRL) & 0x80000000)) &&
380 si->ps.p2_timing.h_sync_start = (DAC2R(FP_HSYNC_S) & 0x0000ffff) + 1;
381 si->ps.p2_timing.h_sync_end = (DAC2R(FP_HSYNC_E) & 0x0000ffff) + 1;
382 si->ps.p2_timing.h_total = (DAC2R(FP_HTOTAL) & 0x0000ffff) + 1;
384 si->ps.p2_timing.v_sync_start = (DAC2R(FP_VSYNC_S) & 0x0000ffff) + 1;
385 si->ps.p2_timing.v_sync_end = (DAC2R(FP_VSYNC_
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H A Dcrtc2.c332 DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) | 0x00000100));
337 DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) & 0xfffffeff));
356 DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) & 0xfffffeff));
401 LOG(2,("CRTC2: FP_HVALID_S reg readback: $%08x\n", DAC2R(FP_HVALID_S)));
402 LOG(2,("CRTC2: FP_HVALID_E reg readback: $%08x\n", DAC2R(FP_HVALID_E)));
403 LOG(2,("CRTC2: FP_VVALID_S reg readback: $%08x\n", DAC2R(FP_VVALID_S)));
404 LOG(2,("CRTC2: FP_VVALID_E reg readback: $%08x\n", DAC2R(FP_VVALID_E)));
405 LOG(2,("CRTC2: FP_DEBUG0 reg readback: $%08x\n", DAC2R(FP_DEBUG0)));
406 LOG(2,("CRTC2: FP_DEBUG1 reg readback: $%08x\n", DAC2R(FP_DEBUG1)));
407 LOG(2,("CRTC2: FP_DEBUG2 reg readback: $%08x\n", DAC2R(FP_DEBUG
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H A Ddac2.c25 output = DAC2R(OUTPUT);
27 dac = DAC2R(TSTCTRL);
30 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeffff));
36 DAC2W(OUTPUT, (DAC2R(OUTPUT) | 0x00000001));
48 if (DAC2R(TSTCTRL) & 0x10000000)
/haiku/src/add-ons/accelerants/skeleton/engine/
H A Dcrtc2.c332 DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) | 0x00000100));
337 DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) & 0xfffffeff));
356 DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) & 0xfffffeff));
401 LOG(2,("CRTC2: FP_HVALID_S reg readback: $%08x\n", DAC2R(FP_HVALID_S)));
402 LOG(2,("CRTC2: FP_HVALID_E reg readback: $%08x\n", DAC2R(FP_HVALID_E)));
403 LOG(2,("CRTC2: FP_VVALID_S reg readback: $%08x\n", DAC2R(FP_VVALID_S)));
404 LOG(2,("CRTC2: FP_VVALID_E reg readback: $%08x\n", DAC2R(FP_VVALID_E)));
405 LOG(2,("CRTC2: FP_DEBUG0 reg readback: $%08x\n", DAC2R(FP_DEBUG0)));
406 LOG(2,("CRTC2: FP_DEBUG1 reg readback: $%08x\n", DAC2R(FP_DEBUG1)));
407 LOG(2,("CRTC2: FP_DEBUG2 reg readback: $%08x\n", DAC2R(FP_DEBUG
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H A Ddac2.c25 output = DAC2R(OUTPUT);
27 dac = DAC2R(TSTCTRL);
30 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeffff));
36 DAC2W(OUTPUT, (DAC2R(OUTPUT) | 0x00000001));
48 if (DAC2R(TSTCTRL) & 0x10000000)
H A Dinfo.c2208 uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
2209 uint16 height = ((DAC2R(FP_VDISPEND) & 0x0000ffff) + 1);
2236 uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
2237 uint16 height = ((DAC2R(FP_VDISPEND) & 0x0000ffff) + 1);
2251 ((DACR(FP_TG_CTRL) & 0x80000000) == (DAC2R(FP_TG_CTRL) & 0x80000000)) &&
2318 si->ps.p2_timing.h_sync_start = (DAC2R(FP_HSYNC_S) & 0x0000ffff) + 1;
2319 si->ps.p2_timing.h_sync_end = (DAC2R(FP_HSYNC_E) & 0x0000ffff) + 1;
2320 si->ps.p2_timing.h_total = (DAC2R(FP_HTOTAL) & 0x0000ffff) + 1;
2322 si->ps.p2_timing.v_sync_start = (DAC2R(FP_VSYNC_S) & 0x0000ffff) + 1;
2323 si->ps.p2_timing.v_sync_end = (DAC2R(FP_VSYNC_
[all...]
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_dac2.c36 output = DAC2R(OUTPUT);
38 dac = DAC2R(TSTCTRL);
41 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeffff));
47 DAC2W(OUTPUT, (DAC2R(OUTPUT) | 0x00000001));
59 if (DAC2R(TSTCTRL) & 0x10000000)
240 dividers1 = DAC2R(PIXPLLC);
247 dividers2 = DAC2R(PIXPLLC2);
H A Dnv_crtc2.c458 DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) | 0x00000100));
463 DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) & 0xfffffeff));
482 DAC2W(FP_TG_CTRL, (DAC2R(FP_TG_CTRL) & 0xfffffeff));
527 LOG(2,("CRTC2: FP_HVALID_S reg readback: $%08x\n", DAC2R(FP_HVALID_S)));
528 LOG(2,("CRTC2: FP_HVALID_E reg readback: $%08x\n", DAC2R(FP_HVALID_E)));
529 LOG(2,("CRTC2: FP_VVALID_S reg readback: $%08x\n", DAC2R(FP_VVALID_S)));
530 LOG(2,("CRTC2: FP_VVALID_E reg readback: $%08x\n", DAC2R(FP_VVALID_E)));
531 LOG(2,("CRTC2: FP_DEBUG0 reg readback: $%08x\n", DAC2R(FP_DEBUG0)));
532 LOG(2,("CRTC2: FP_DEBUG1 reg readback: $%08x\n", DAC2R(FP_DEBUG1)));
533 LOG(2,("CRTC2: FP_DEBUG2 reg readback: $%08x\n", DAC2R(FP_DEBUG
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H A Dnv_info.c2343 uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
2344 uint16 height = ((DAC2R(FP_VDISPEND) & 0x0000ffff) + 1);
2371 uint16 width = ((DAC2R(FP_HDISPEND) & 0x0000ffff) + 1);
2372 uint16 height = ((DAC2R(FP_VDISPEND) & 0x0000ffff) + 1);
2387 ((DACR(FP_TG_CTRL) & 0x80000000) == (DAC2R(FP_TG_CTRL) & 0x80000000)) &&
2450 si->ps.p2_timing.h_sync_start = (DAC2R(FP_HSYNC_S) & 0x0000ffff) + 1;
2451 si->ps.p2_timing.h_sync_end = (DAC2R(FP_HSYNC_E) & 0x0000ffff) + 1;
2452 si->ps.p2_timing.h_total = (DAC2R(FP_HTOTAL) & 0x0000ffff) + 1;
2454 si->ps.p2_timing.v_sync_start = (DAC2R(FP_VSYNC_S) & 0x0000ffff) + 1;
2455 si->ps.p2_timing.v_sync_end = (DAC2R(FP_VSYNC_
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H A Dnv_general.c1861 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeefff));
1865 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) | 0x00100000));
/haiku/headers/private/graphics/skeleton/
H A Dmacros.h760 #define DAC2R(A) (ENG_RG32(ENDAC2_##A)) macro
/haiku/headers/private/graphics/via/
H A Dmacros.h829 #define DAC2R(A) (ENG_REG32(ENDAC2_##A)) macro
/haiku/headers/private/graphics/nvidia/
H A Dnv_macros.h907 #define DAC2R(A) (NV_REG32(NVDAC2_##A)) macro

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