Searched refs:AR_PHY_TIMING5 (Results 1 - 8 of 8) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_spectral.c159 val = OS_REG_READ(ah, AR_PHY_TIMING5);
161 OS_REG_WRITE(ah, AR_PHY_TIMING5, val);
163 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_RSSI_THR1A, 0x7f);
H A Dar9300_ani.c339 OS_REG_READ_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_CYCPWR_THR1);
636 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_CYCPWR_THR1, value);
H A Dar9300phy.h47 #define AR_PHY_TIMING5 AR_CHAN_OFFSET(BB_timing_control_5) macro
H A Dar9300_reset.c3848 OS_REG_WRITE(ah, AR_PHY_TIMING5, OS_REG_READ(ah,AR_PHY_TIMING5) & ~AR_PHY_TIMING5_CYCPWR_THR1_ENABLE);
H A Dar9300_misc.c1457 reg = OS_REG_READ(ah, AR_PHY_TIMING5);
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212phy.h176 #define AR_PHY_TIMING5 0x9924 macro
H A Dar5212_ani.c339 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5,
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_ani.c343 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5,

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