Searched refs:ACCR (Results 1 - 12 of 12) sorted by relevance

/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_acc.c72 while (ACCR(STATUS))
769 ACCW(DEBUG3, (ACCR(DEBUG3) | 0x00000001));
771 ACCW(NV25_WHAT1, (ACCR(NV25_WHAT1) | 0x00040000));
883 ACCW(NV10_TIL0AD, ACCR(NV10_FBTIL0AD));
885 ACCW(NV10_TIL0ED, ACCR(NV10_FBTIL0ED));
887 ACCW(NV10_TIL0PT, ACCR(NV10_FBTIL0PT));
889 ACCW(NV10_TIL0ST, ACCR(NV10_FBTIL0ST));
891 ACCW(NV10_TIL1AD, ACCR(NV10_FBTIL1AD));
892 ACCW(NV10_TIL1ED, ACCR(NV10_FBTIL1ED));
893 ACCW(NV10_TIL1PT, ACCR(NV10_FBTIL1P
[all...]
H A Dnv_acc_dma.c64 while (ACCR(STATUS))
109 LOG(4,("ACC_DMA: timer numerator $%08x, denominator $%08x\n", ACCR(PT_NUMERATOR), ACCR(PT_DENOMINATR)));
118 if (!ACCR(PT_NUMERATOR) || !ACCR(PT_DENOMINATR)) {
626 ACCW(NV10_SURF_TYP, ((ACCR(NV10_SURF_TYP)) & 0x0007ff00));
627 ACCW(NV10_SURF_TYP, ((ACCR(NV10_SURF_TYP)) | 0x00020101));
1430 dummy = ACCR(STATUS);
/haiku/src/add-ons/accelerants/neomagic/engine/
H A Dnm_acc.c39 while (ACCR(STATUS) & 0x00000001);
47 while (((ACCR(STATUS) & 0x0000ff00) >> 8) < n)
/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_general.c467 ACCW(MEMRDBK,(ACCR(MEMRDBK)&0x0000FFFF)|(si->ps.memrdbk_reg & 0xffff0000));
469 ACCW(MEMRDBK,(ACCR(MEMRDBK)&0xFFFF0000)|(si->ps.memrdbk_reg & 0x0000ffff));
573 ACCW(MEMRDBK,(ACCR(MEMRDBK)&0x0000FFFF)|(si->ps.memrdbk_reg & 0xffff0000));
575 ACCW(MEMRDBK,(ACCR(MEMRDBK)&0xFFFF0000)|(si->ps.memrdbk_reg & 0x0000ffff));
H A Dmga_crtc.c384 while ((!(ACCR(STATUS) & 0x08)) && (timeout < (25000/4)))
674 while (ACCR(STATUS) & 0x08)
H A Dmga_acc.c31 while (ACCR(STATUS) & 0x00010000)
/haiku/src/add-ons/kernel/drivers/graphics/matrox/
H A Ddriver.c153 return (ACCR(STATUS)&0x20);
164 ACCW(IEN,ACCR(IEN)|0x20);
169 ACCW(IEN,(ACCR(IEN)&~0x20));
/haiku/headers/private/graphics/matrox/
H A Dmga_macros.h332 #define ACCR(A) (MGA_REG32(MGAACC_##A)) macro
/haiku/headers/private/graphics/neomagic/
H A Dnm_macros.h315 #define ACCR(A) (NM_REG32(NMACC_##A)) macro
/haiku/headers/private/graphics/skeleton/
H A Dmacros.h792 #define ACCR(A) (ENG_RG32(ENACC_##A)) macro
/haiku/headers/private/graphics/via/
H A Dmacros.h861 #define ACCR(A) (ENG_REG32(ENACC_##A)) macro
/haiku/headers/private/graphics/nvidia/
H A Dnv_macros.h939 #define ACCR(A) (NV_REG32(NVACC_##A)) macro

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