/fuchsia/zircon/system/dev/display/vim-display/ |
H A D | registers.cpp | 5 #include "registers.h" 7 namespace registers { namespace 9 } // namespace registers
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H A D | vpp.cpp | 20 #include "registers.h" 75 registers::Vd(vd_index).IfGenReg().ReadFrom(&vpu).set_enable(false).WriteTo(&vpu); 76 registers::VpuVppMisc::Get() 90 auto vd = registers::Vd(vd_index); 122 auto vd = registers::Vd(vd_index); 133 registers::VpuVppMisc::Get() 142 auto osd = registers::Osd(osd_index); 149 registers::VpuVppMisc::Get() 154 registers::VpuVppMisc::Get() 170 auto osd = registers [all...] |
H A D | registers.h | 11 namespace registers { namespace 318 auto CtrlStat() { return GetReg<registers::VpuViuOsdCtrlStat>(); } 319 auto CtrlStat2() { return GetReg<registers::VpuViuOsdCtrlStat2>(); } 321 auto Blk0CfgW0() { return GetReg<registers::VpuViuOsdBlk0CfgW0>(); } 322 auto Blk0CfgW1() { return GetReg<registers::VpuViuOsdBlk0CfgW1>(); } 323 auto Blk0CfgW2() { return GetReg<registers::VpuViuOsdBlk0CfgW2>(); } 324 auto Blk0CfgW3() { return GetReg<registers::VpuViuOsdBlk0CfgW3>(); } 325 auto Blk0CfgW4() { return GetRegNonstandard<registers::VpuViuOsdBlk0CfgW4>(); } 341 } // namespace registers
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/fuchsia/zircon/system/dev/display/intel-i915/ |
H A D | interrupts.cpp | 10 #include "registers.h" 43 registers::MasterInterruptControl::Get().ReadFrom(controller_->mmio_space()); 48 auto sde_int_identity = registers::SdeInterruptBase::Get(registers 50 auto hp_ctrl1 = registers::HotplugCtrl 51 ::Get(registers::DDI_A).ReadFrom(controller_->mmio_space()); 52 auto hp_ctrl2 = registers::HotplugCtrl 53 ::Get(registers::DDI_E).ReadFrom(controller_->mmio_space()); 54 for (uint32_t i = 0; i < registers::kDdiCount; i++) { 55 registers [all...] |
H A D | intel-i915.h | 26 #include "registers.h" 27 #include "registers-ddi.h" 28 #include "registers-dpll.h" 29 #include "registers-pipe.h" 30 #include "registers-transcoder.h" 108 bool DpcdRead(registers::Ddi ddi, uint32_t addr, uint8_t* buf, size_t size); 109 bool DpcdWrite(registers::Ddi ddi, uint32_t addr, const uint8_t* buf, size_t size); 119 void HandleHotplug(registers::Ddi ddi, bool long_pulse); 120 void HandlePipeVsync(registers::Pipe pipe, zx_time_t timestamp); 123 void ResetPipe(registers [all...] |
H A D | hdmi-display.h | 14 GMBusI2c(registers::Ddi ddi); 22 const registers::Ddi ddi_; 23 // The lock protects the registers this class writes to, not the whole register io space. 37 HdmiDisplay(Controller* controller, uint64_t id, registers::Ddi ddi); 43 registers::Pipe pipe, registers::Trans trans) final; 45 registers::Pipe pipe, registers::Trans trans) final; 47 registers::Pipe pipe, registers [all...] |
H A D | pipe.h | 16 #include "registers-ddi.h" 17 #include "registers-pipe.h" 18 #include "registers-transcoder.h" 27 Pipe(Controller* device, registers::Pipe pipe); 42 registers::Pipe pipe() const { return pipe_; } 43 registers::Trans transcoder() const { 44 return attached_edp_ ? registers::TRANS_EDP : static_cast<registers::Trans>(pipe_); 56 registers::pipe_arming_regs* regs); 58 registers [all...] |
H A D | power.cpp | 8 #include "registers.h" 62 PowerWellRef Power::GetPipePowerWellRef(registers::Pipe pipe) { 63 return PowerWellRef(this, pipe == registers::PIPE_A ? PowerWell1 : PowerWell2); 66 PowerWellRef Power::GetDdiPowerWellRef(registers::Ddi ddi) { 67 return PowerWellRef(this, ddi == registers::DDI_A ? PowerWell1 : PowerWell2); 71 auto power_well = registers::PowerWellControl2::Get().ReadFrom(controller_->mmio_space()); 77 if (!WAIT_ON_US(registers::PowerWellControl2 82 if (!WAIT_ON_US(registers::PowerWellControl2 87 if (!WAIT_ON_US(registers::FuseStatus 99 auto power_well = registers [all...] |
H A D | display-device.h | 16 #include "registers-ddi.h" 17 #include "registers-pipe.h" 18 #include "registers-transcoder.h" 36 DisplayDevice(Controller* device, uint64_t id, registers::Ddi ddi); 59 registers::Ddi ddi() const { return ddi_; } 81 registers::Pipe pipe, registers::Trans trans) = 0; 84 virtual uint32_t LoadClockRateForTranscoder(registers::Trans transcoder) = 0; 91 registers::Pipe pipe, registers [all...] |
H A D | registers-pipe.h | 13 namespace registers { namespace 332 // An instance of PipeRegs represents the registers for a particular pipe. 342 hwreg::RegisterAddr<registers::PipeSourceSize> PipeSourceSize() { 343 return GetReg<registers::PipeSourceSize>(); 345 hwreg::RegisterAddr<registers::PipeBottomColor> PipeBottomColor() { 346 return GetReg<registers::PipeBottomColor>(); 349 hwreg::RegisterAddr<registers::PlaneSurface> PlaneSurface(int32_t plane_num) { 350 return GetPlaneReg<registers::PlaneSurface>(plane_num); 352 hwreg::RegisterAddr<registers::PlaneSurfaceLive> PlaneSurfaceLive(int32_t plane_num) { 353 return GetPlaneReg<registers [all...] |
H A D | intel-i915.cpp | 33 #include "registers.h" 34 #include "registers-ddi.h" 35 #include "registers-dpll.h" 36 #include "registers-pipe.h" 37 #include "registers-transcoder.h" 38 #include "registers.h" 213 void Controller::HandleHotplug(registers::Ddi ddi, bool long_pulse) { 254 void Controller::HandlePipeVsync(registers::Pipe pipe, zx_time_t timestamp) { 268 registers::PipeRegs regs(pipe); 302 auto nde_rstwrn_opt = registers [all...] |
H A D | dp-display.h | 17 DpAux(registers::Ddi ddi); 29 const registers::Ddi ddi_; 30 // The lock protects the registers this class writes to, not the whole register io space. 47 DpDisplay(Controller* controller, uint64_t id, registers::Ddi ddi); 53 registers::Pipe pipe, registers::Trans trans) final; 55 registers::Pipe pipe, registers::Trans trans) final; 57 registers::Pipe pipe, registers [all...] |
H A D | hdmi-display.cpp | 12 #include "registers.h" 13 #include "registers-ddi.h" 14 #include "registers-dpll.h" 15 #include "registers-pipe.h" 16 #include "registers-transcoder.h" 56 int ddi_to_pin(registers::Ddi ddi) { 57 if (ddi == registers::DDI_B) { 58 return registers::GMBus0::kDdiBPin; 59 } else if (ddi == registers::DDI_C) { 60 return registers [all...] |
H A D | igd.h | 17 #include "registers-ddi.h" 22 // Offsets into the PCI configuration space of IGD registers 212 bool SupportsHdmi(registers::Ddi ddi) const { 215 bool SupportsDvi(registers::Ddi ddi) const { 218 bool SupportsDp(registers::Ddi ddi) const { 221 bool IsEdp(registers::Ddi ddi) const { 225 bool IsLowVoltageEdp(registers::Ddi ddi) const { 231 uint8_t GetIBoost(registers::Ddi ddi, bool is_dp) const { 236 uint8_t GetHdmiBufferTranslationIndex(registers::Ddi ddi) const { 261 bool ddi_supports_hdmi_[registers [all...] |
H A D | registers-ddi.h | 9 namespace registers { namespace 190 // An instance of DdiRegs represents the registers for a particular DDI. 195 hwreg::RegisterAddr<registers::DdiBufControl> DdiBufControl() { 196 return GetReg<registers::DdiBufControl>(); 198 hwreg::RegisterAddr<registers::DdiAuxControl> DdiAuxControl() { 199 return GetReg<registers::DdiAuxControl>(); 201 hwreg::RegisterAddr<registers::DdiAuxData> DdiAuxData() { return GetReg<registers::DdiAuxData>(); } 202 hwreg::RegisterAddr<registers::DdiDpTransportControl> DdiDpTransportControl() { 203 return GetReg<registers [all...] |
H A D | interrupts.h | 13 #include "registers-pipe.h" 29 void EnablePipeVsync(registers::Pipe pipe, bool enable); 36 void HandlePipeInterrupt(registers::Pipe pipe, zx_time_t timestamp);
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H A D | power.h | 9 #include "registers-pipe.h" 10 #include "registers-ddi.h" 45 PowerWellRef GetPipePowerWellRef(registers::Pipe pipe); 46 PowerWellRef GetDdiPowerWellRef(registers::Ddi ddi);
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H A D | dp-display.cpp | 15 #include "registers.h" 16 #include "registers-ddi.h" 17 #include "registers-dpll.h" 18 #include "registers-pipe.h" 19 #include "registers-transcoder.h" 260 registers::DdiRegs ddi_regs(ddi_); 265 // For some reason intel made these data registers big endian... 307 // For some reason intel made these data registers big endian... 489 DpAux::DpAux(registers::Ddi ddi) : ddi_(ddi) { 507 // registers wit [all...] |
H A D | pipe.cpp | 14 #include "registers.h" 15 #include "registers-dpll.h" 16 #include "registers-transcoder.h" 29 registers::CscCoeffFormat res; 73 Pipe::Pipe(Controller* controller, registers::Pipe pipe) 104 registers::TranscoderRegs trans_regs(transcoder()); 139 registers::PipeRegs pipe_regs(pipe()); 147 registers::TranscoderRegs trans_regs(transcoder()); 187 registers::PipeRegs pipe_regs(pipe_); 197 registers [all...] |
H A D | display-device.cpp | 13 #include "registers.h" 14 #include "registers-dpll.h" 15 #include "registers-transcoder.h" 69 registers::CscCoeffFormat res; 113 DisplayDevice::DisplayDevice(Controller* controller, uint64_t id, registers::Ddi ddi) 248 auto dpll_ctrl2 = registers::DpllControl2::Get().ReadFrom(mmio_space()); 252 static_cast<registers::Dpll>(dpll_ctrl2.ddi_clock_select(ddi()).get()));
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H A D | igd.cpp | 171 idx = cfg->port_type < 4 ? static_cast<registers::Ddi>(cfg->port_type) 172 : registers::DDI_E; 183 idx = registers::DDI_A; 186 idx = registers::DDI_E; 300 for (unsigned i = 0; i < registers::kDdiCount; i++) {
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H A D | registers.h | 10 #include "registers-ddi.h" 12 namespace registers { namespace 216 static auto Get(registers::Ddi ddi) { 217 if (ddi == registers::DDI_B) { 219 } else if (ddi == registers::DDI_C) { 221 } else { // ddi == registers::DDI_D 222 ZX_DEBUG_ASSERT(ddi == registers::DDI_D); 299 } // namespace registers
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/fuchsia/zircon/kernel/arch/x86/include/arch/ |
H A D | arch_thread.h | 13 #include <arch/x86/registers.h>
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/fuchsia/zircon/system/ulib/inspector/ |
H A D | rules.mk | 16 $(LOCAL_DIR)/registers.cpp \
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/fuchsia/zircon/system/dev/audio/intel-hda/dsp/ |
H A D | intel-dsp-code-loader.h | 12 #include <intel-hda/utils/intel-hda-registers.h>
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