Searched refs:insn (Results 1 - 25 of 80) sorted by relevance

1234

/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp190 static bool peek(struct InternalInstruction *insn, uint8_t &byte) { argument
191 uint64_t offset = insn->readerCursor - insn->startLocation;
192 if (offset >= insn->bytes.size())
194 byte = insn->bytes[offset];
198 template <typename T> static bool consume(InternalInstruction *insn, T &ptr) { argument
199 auto r = insn->bytes;
200 uint64_t offset = insn->readerCursor - insn->startLocation;
204 insn
208 isREX(struct InternalInstruction *insn, uint8_t prefix) argument
212 isREX2(struct InternalInstruction *insn, uint8_t prefix) argument
221 readPrefixes(struct InternalInstruction *insn) argument
542 readSIB(struct InternalInstruction *insn) argument
606 readDisplacement(struct InternalInstruction *insn) argument
637 readModRM(struct InternalInstruction *insn) argument
854 fixupReg(struct InternalInstruction *insn, const struct OperandSpecifier *op) argument
914 readOpcode(struct InternalInstruction *insn) argument
1079 getInstructionIDWithAttrMask(uint16_t *instructionID, struct InternalInstruction *insn, uint16_t attrMask) argument
1140 getInstructionID(struct InternalInstruction *insn, const MCInstrInfo *mii) argument
1445 readOpcodeRegister(struct InternalInstruction *insn, uint8_t size) argument
1489 readImmediate(struct InternalInstruction *insn, uint8_t size) argument
1533 readVVVV(struct InternalInstruction *insn) argument
1560 readMaskRegister(struct InternalInstruction *insn) argument
1573 readOperands(struct InternalInstruction *insn) argument
1884 translateSrcIndex(MCInst &mcInst, InternalInstruction &insn) argument
1909 translateDstIndex(MCInst &mcInst, InternalInstruction &insn) argument
1931 translateImmediate(MCInst &mcInst, uint64_t immediate, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) argument
2036 translateRMRegister(MCInst &mcInst, InternalInstruction &insn) argument
2075 translateRMMemory(MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis, bool ForceSIB = false) argument
2240 translateRM(MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) argument
2306 translateOperand(MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) argument
2369 translateInstruction(MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis) argument
[all...]
/freebsd-current/contrib/libpcap/
H A Dbpf_dump.c34 const struct bpf_insn *insn; local
38 insn = p->bf_insns;
41 for (i = 0; i < n; ++insn, ++i) {
42 printf("%u %u %u %u\n", insn->code,
43 insn->jt, insn->jf, insn->k);
48 for (i = 0; i < n; ++insn, ++i)
50 insn->code, insn
[all...]
/freebsd-current/contrib/tcpdump/
H A Dbpf_dump.c36 struct bpf_insn *insn; local
40 insn = p->bf_insns;
43 for (i = 0; i < n; ++insn, ++i) {
44 printf("%u %u %u %u\n", insn->code,
45 insn->jt, insn->jf, insn->k);
50 for (i = 0; i < n; ++insn, ++i)
52 insn->code, insn
[all...]
/freebsd-current/contrib/processor-trace/libipt/src/
H A Dpt_insn.c37 int pt_insn_changes_cpl(const struct pt_insn *insn, argument
40 (void) insn;
62 int pt_insn_changes_cr3(const struct pt_insn *insn, argument
65 (void) insn;
79 int pt_insn_is_branch(const struct pt_insn *insn, argument
84 if (!insn)
87 switch (insn->iclass) {
102 int pt_insn_is_far_branch(const struct pt_insn *insn, argument
107 if (!insn)
110 switch (insn
121 pt_insn_binds_to_pip(const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
138 pt_insn_binds_to_vmcs(const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
155 pt_insn_is_ptwrite(const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
172 pt_insn_next_ip(uint64_t *pip, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
227 pt_insn_decode_retry(struct pt_insn *insn, struct pt_insn_ext *iext, struct pt_image *image, const struct pt_asid *asid) argument
309 pt_insn_decode(struct pt_insn *insn, struct pt_insn_ext *iext, struct pt_image *image, const struct pt_asid *asid) argument
350 struct pt_insn insn; local
[all...]
H A Dpt_block_decoder.c521 static int pt_insn_false(const struct pt_insn *insn, argument
524 (void) insn;
545 * Returns -pte_internal if @pip, @decoder, @insn, or @iext are NULL.
549 const struct pt_insn *insn,
554 if (!pip || !decoder || !insn || !iext)
562 switch (insn->iclass) {
571 ip = insn->ip + insn->size;
642 const struct pt_insn *insn,
650 status = pt_blk_next_ip(&decoder->ip, decoder, insn, iex
548 pt_blk_next_ip(uint64_t *pip, struct pt_block_decoder *decoder, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
641 pt_blk_proceed_with_trace(struct pt_block_decoder *decoder, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
673 pt_blk_decode_in_section(struct pt_insn *insn, struct pt_insn_ext *iext, const struct pt_mapped_section *msec) argument
702 pt_blk_log_call(struct pt_block_decoder *decoder, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
744 struct pt_insn insn; local
824 pt_blk_proceed_to_insn(struct pt_block_decoder *decoder, struct pt_block *block, struct pt_insn *insn, struct pt_insn_ext *iext, int (*predicate)(const struct pt_insn *, const struct pt_insn_ext *)) argument
886 pt_blk_proceed_to_ip(struct pt_block_decoder *decoder, struct pt_block *block, struct pt_insn *insn, struct pt_insn_ext *iext, uint64_t ip) argument
950 struct pt_insn insn; local
968 pt_insn_skl014(const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
1004 pt_blk_proceed_skl014(struct pt_block_decoder *decoder, struct pt_block *block, struct pt_insn *insn, struct pt_insn_ext *iext) argument
1079 pt_blk_proceed_to_disabled(struct pt_block_decoder *decoder, struct pt_block *block, struct pt_insn *insn, struct pt_insn_ext *iext, const struct pt_event *ev) argument
1125 pt_blk_set_disable_resume_ip(struct pt_block_decoder *decoder, const struct pt_insn *insn) argument
1256 pt_blk_proceed_to_ptwrite(struct pt_block_decoder *decoder, struct pt_block *block, struct pt_insn *insn, struct pt_insn_ext *iext, struct pt_event *ev) argument
1326 struct pt_insn insn; local
1367 pt_blk_postpone_insn(struct pt_block_decoder *decoder, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
1459 struct pt_insn insn; local
1656 struct pt_insn insn; local
1783 struct pt_insn insn; local
2065 struct pt_insn insn; local
2255 struct pt_insn insn; local
2279 struct pt_insn insn; local
2368 struct pt_insn insn; local
2626 struct pt_insn insn; local
[all...]
H A Dpt_insn_decoder.c103 flags->variant.insn.keep_tcal_on_ovf;
269 if (decoder->flags.variant.insn.enable_tick_events) {
293 if (decoder->flags.variant.insn.enable_tick_events) {
470 struct pt_insn insn; local
476 insn.mode = decoder->mode;
477 insn.ip = decoder->ip;
479 errcode = pt_insn_decode(&insn, &iext, decoder->image, &decoder->asid);
520 const struct pt_insn *insn,
523 if (!decoder || !insn || !iext)
527 decoder->ip += insn
519 pt_insn_proceed(struct pt_insn_decoder *decoder, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
623 pt_insn_at_skl014(const struct pt_event *ev, const struct pt_insn *insn, const struct pt_insn_ext *iext, const struct pt_config *config) argument
665 pt_insn_at_disabled_event(const struct pt_event *ev, const struct pt_insn *insn, const struct pt_insn_ext *iext, const struct pt_config *config) argument
735 pt_insn_postpone(struct pt_insn_decoder *decoder, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
808 pt_insn_check_insn_event(struct pt_insn_decoder *decoder, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
965 handle_erratum_bdm64(struct pt_insn_decoder *decoder, const struct pt_event *ev, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
1013 pt_insn_postpone_tsx(struct pt_insn_decoder *decoder, const struct pt_insn *insn, const struct pt_insn_ext *iext, const struct pt_event *ev) argument
1046 pt_insn_check_ip_event(struct pt_insn_decoder *decoder, const struct pt_insn *insn, const struct pt_insn_ext *iext) argument
1193 insn_to_user(struct pt_insn *uinsn, size_t size, const struct pt_insn *insn) argument
1214 pt_insn_decode_cached(struct pt_insn_decoder *decoder, const struct pt_mapped_section *msec, struct pt_insn *insn, struct pt_insn_ext *iext) argument
1293 struct pt_insn insn, *pinsn; local
[all...]
/freebsd-current/contrib/processor-trace/libipt/test/src/
H A Dptunit-ild.c41 struct pt_insn insn; local
45 memset(&insn, 0, sizeof(insn));
47 memcpy(insn.raw, raw, size);
48 insn.size = size;
49 insn.mode = mode;
51 errcode = pt_ild_decode(&insn, &iext);
54 ptu_uint_eq(insn.size, size);
55 ptu_int_eq(insn.iclass, ptic_other);
67 struct pt_insn insn; local
95 struct pt_insn insn; local
132 uint8_t insn[] = { 0x68, 0x11, 0x22, 0x33, 0x44 }; local
141 uint8_t insn[] = { 0xE9, 0x60, 0xF9, 0xFF, 0xFF }; local
150 uint8_t insn[] = { 0x66, 0x66, 0x66, 0x66, local
162 uint8_t insn[] = { 0x48, 0xa0, 0x3f, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, local
172 uint8_t insn[] = { 0x67, 0xa0, 0x3f, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, local
182 uint8_t insn[] = { 0xa0, 0x3f, 0xaa, 0xbb, 0xcc, 0xdd, 0xee }; local
191 uint8_t insn[] = { 0x67, 0xa0, 0x3f, 0xaa, 0xbb, 0xcc, 0xdd, 0xee }; local
200 uint8_t insn[] = { 0x67, 0xa0, 0x3f, 0xaa, 0xbb, 0xcc, 0xdd, 0xee }; local
209 uint8_t insn[] = { 0xa0, 0x3f, 0xaa, 0xbb, 0xcc, 0xdd, 0xee }; local
218 uint8_t insn[] = { 0x0f, 0x31 }; local
227 uint8_t insn[] = { 0x66, 0x0f, 0x3a, 0x63, 0x04, 0x16, 0x1a }; local
236 uint8_t insn[] = { 0xc5, 0xf9, 0x6f, 0x25, 0xa9, 0x55, 0x04, 0x00 }; local
245 uint8_t insn[] = { 0xc4, 0x41, 0x29, 0xdf, 0xd1 }; local
254 uint8_t insn[] = { 0x0f, 0x05 }; local
263 uint8_t insn[] = { 0x0f, 0x07 }; local
272 uint8_t insn[] = { 0x0f, 0x34 }; local
281 uint8_t insn[] = { 0x0f, 0x35 }; local
290 uint8_t insn[] = { 0xcc }; local
299 uint8_t insn[] = { 0xcd, 0x06 }; local
308 uint8_t insn[] = { 0xcf }; local
317 uint8_t insn[] = { 0x9a, 0x00, 0x00, 0x00, 0x00 }; local
326 uint8_t insn[] = { 0x9a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; local
335 uint8_t insn[] = { 0xff, 0x1c, 0x25, 0x00, 0x00, 0x00, 0x00 }; local
344 uint8_t insn[] = { 0xff, 0x2c, 0x25, 0x00, 0x00, 0x00, 0x00 }; local
353 uint8_t insn[] = { 0xea, 0x00, 0x00, 0x00, 0x00 }; local
362 uint8_t insn[] = { 0xea, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; local
371 uint8_t insn[] = { 0xca, 0x00, 0x00 }; local
380 uint8_t insn[] = { 0x0f, 0x01, 0xc2 }; local
389 uint8_t insn[] = { 0x0f, 0x01, 0xc3 }; local
398 uint8_t insn[] = { 0x0f, 0x01, 0xc1 }; local
407 uint8_t insn[] = { 0x0f, 0xc7, 0x30 }; local
416 uint8_t insn[] = { 0xe3, 0x00 }; local
425 uint8_t insn[] = { 0xa1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, local
435 uint8_t insn[] = { 0x67, 0xa1, 0x00, 0x00, 0x00, 0x00 }; local
444 uint8_t insn[] = { 0x48, 0xa1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, local
454 uint8_t insn[] = { 0x67, 0x48, 0xa1, 0x00, 0x00, 0x00, 0x00 }; local
463 uint8_t insn[] = { 0x66, 0xa1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, local
473 uint8_t insn[] = { 0x67, 0x66, 0xa1, 0x00, 0x00, 0x00, 0x00 }; local
482 uint8_t insn[] = { 0xa1, 0x00, 0x00, 0x00, 0x00 }; local
491 uint8_t insn[] = { 0x66, 0xa1, 0x00, 0x00, 0x00, 0x00 }; local
500 uint8_t insn[] = { 0xa1, 0x00, 0x00 }; local
509 uint8_t insn[] = { 0xc4, 0x00 }; local
519 uint8_t insn[] = { 0xc4, 0x06, 0x00, 0x00 }; local
528 uint8_t insn[] = { 0xc4, 0x05, 0x00, 0x00, 0x00, 0x00 }; local
537 uint8_t insn[] = { 0xc4, 0x40, 0x00 }; local
547 uint8_t insn[] = { 0xc4, 0x80, 0x00, 0x00 }; local
556 uint8_t insn[] = { 0xc4, 0x80, 0x00, 0x00, 0x00, 0x00 }; local
565 uint8_t insn[] = { 0xc5, 0x00 }; local
575 uint8_t insn[] = { 0xc5, 0x06, 0x00, 0x00 }; local
584 uint8_t insn[] = { 0xc5, 0x05, 0x00, 0x00, 0x00, 0x00 }; local
593 uint8_t insn[] = { 0xc5, 0x40, 0x00 }; local
603 uint8_t insn[] = { 0xc5, 0x80, 0x00, 0x00 }; local
612 uint8_t insn[] = { 0xc5, 0x80, 0x00, 0x00, 0x00, 0x00 }; local
621 uint8_t insn[] = { 0x62, 0x02, 0x05, 0x00, 0x00, 0x00 }; local
630 uint8_t insn[] = { 0x62, 0x02 }; local
640 uint8_t insn[] = { 0x62 }; local
651 uint8_t insn[] = { 0xf3, 0x0f, 0xae, 0xe7 }; local
662 uint8_t insn[] = { 0xf3, 0x0f, 0xae, 0x67, 0xcc }; local
673 uint8_t insn[] = { 0xf3, 0x48, 0x0f, 0xae, 0xe7 }; local
682 uint8_t insn[] = { 0xf3, 0x48, 0x0f, 0xae, 0x67, 0xcc }; local
[all...]
/freebsd-current/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS64/
H A DEmulateInstructionMIPS64.h85 bool (EmulateInstructionMIPS64::*callback)(llvm::MCInst &insn);
91 bool Emulate_DADDiu(llvm::MCInst &insn);
93 bool Emulate_DSUBU_DADDU(llvm::MCInst &insn);
95 bool Emulate_LUI(llvm::MCInst &insn);
97 bool Emulate_SD(llvm::MCInst &insn);
99 bool Emulate_LD(llvm::MCInst &insn);
101 bool Emulate_LDST_Imm(llvm::MCInst &insn);
103 bool Emulate_LDST_Reg(llvm::MCInst &insn);
105 bool Emulate_BXX_3ops(llvm::MCInst &insn);
107 bool Emulate_BXX_3ops_C(llvm::MCInst &insn);
[all...]
H A DEmulateInstructionMIPS64.cpp967 * of llvm::Mips::<insn> we would need "MipsGenInstrInfo.inc".
1063 bool EmulateInstructionMIPS64::Emulate_DADDiu(llvm::MCInst &insn) { argument
1069 const uint32_t imm16 = insn.getOperand(2).getImm();
1072 dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1073 src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1127 bool EmulateInstructionMIPS64::Emulate_SD(llvm::MCInst &insn) { argument
1130 uint32_t imm16 = insn.getOperand(2).getImm();
1135 src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1136 base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1183 bool EmulateInstructionMIPS64::Emulate_LD(llvm::MCInst &insn) { argument
1226 Emulate_LUI(llvm::MCInst &insn) argument
1243 Emulate_DSUBU_DADDU(llvm::MCInst &insn) argument
1329 Emulate_BXX_3ops(llvm::MCInst &insn) argument
1381 Emulate_Bcond_Link(llvm::MCInst &insn) argument
1427 Emulate_BAL(llvm::MCInst &insn) argument
1458 Emulate_BALC(llvm::MCInst &insn) argument
1493 Emulate_Bcond_Link_C(llvm::MCInst &insn) argument
1561 Emulate_BXX_2ops(llvm::MCInst &insn) argument
1617 Emulate_BC(llvm::MCInst &insn) argument
1650 Emulate_BXX_3ops_C(llvm::MCInst &insn) argument
1735 Emulate_BXX_2ops_C(llvm::MCInst &insn) argument
1801 Emulate_J(llvm::MCInst &insn) argument
1825 Emulate_JAL(llvm::MCInst &insn) argument
1856 Emulate_JALR(llvm::MCInst &insn) argument
1891 Emulate_JIALC(llvm::MCInst &insn) argument
1929 Emulate_JIC(llvm::MCInst &insn) argument
1955 Emulate_JR(llvm::MCInst &insn) argument
1982 Emulate_FP_branch(llvm::MCInst &insn) argument
2030 Emulate_BC1EQZ(llvm::MCInst &insn) argument
2066 Emulate_BC1NEZ(llvm::MCInst &insn) argument
2109 Emulate_3D_branch(llvm::MCInst &insn) argument
2162 Emulate_BNZB(llvm::MCInst &insn) argument
2166 Emulate_BNZH(llvm::MCInst &insn) argument
2170 Emulate_BNZW(llvm::MCInst &insn) argument
2174 Emulate_BNZD(llvm::MCInst &insn) argument
2178 Emulate_BZB(llvm::MCInst &insn) argument
2182 Emulate_BZH(llvm::MCInst &insn) argument
2186 Emulate_BZW(llvm::MCInst &insn) argument
2190 Emulate_BZD(llvm::MCInst &insn) argument
2194 Emulate_MSA_Branch_DF(llvm::MCInst &insn, int element_byte_size, bool bnz) argument
2254 Emulate_BNZV(llvm::MCInst &insn) argument
2258 Emulate_BZV(llvm::MCInst &insn) argument
2262 Emulate_MSA_Branch_V(llvm::MCInst &insn, bool bnz) argument
2297 Emulate_LDST_Imm(llvm::MCInst &insn) argument
2328 Emulate_LDST_Reg(llvm::MCInst &insn) argument
[all...]
/freebsd-current/sys/arm/arm/
H A Ddisassem.c62 * insn[cc][mod] [operands]
275 static void disasm_register_shift(const disasm_interface_t *di, u_int insn);
276 static void disasm_print_reglist(const disasm_interface_t *di, u_int insn);
277 static void disasm_insn_ldrstr(const disasm_interface_t *di, u_int insn,
279 static void disasm_insn_ldrhstrh(const disasm_interface_t *di, u_int insn,
281 static void disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn,
291 u_int insn; local
299 insn = di->di_readword(loc);
301 /* di->di_printf("loc=%08x insn=%08x : ", loc, insn);*/
531 disasm_register_shift(const disasm_interface_t *di, u_int insn) argument
549 disasm_print_reglist(const disasm_interface_t *di, u_int insn) argument
584 disasm_insn_ldrstr(const disasm_interface_t *di, u_int insn, u_int loc) argument
613 disasm_insn_ldrhstrh(const disasm_interface_t *di, u_int insn, u_int loc) argument
642 disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn, u_int loc) argument
[all...]
H A Dunwind.c95 uint32_t insn; member in struct:unwind_idx
351 uint8_t insn; local
354 insn = (*state->insn) >> (state->byte * 8);
359 state->insn++;
364 return insn;
372 unsigned int insn; local
381 insn = unwind_exec_read_byte(state);
383 if ((insn & INSN_VSP_MASK) == INSN_VSP_INC) {
384 state->registers[SP] += ((insn
[all...]
H A Dmachdep_ptrace.c220 arm_predict_branch(void *cookie, u_int insn, register_t pc, register_t *new_pc, argument
227 switch ((insn >> 24) & 0xf) {
230 addr = fetch_reg(cookie, (insn >> 16) & 0xf);
231 if (((insn >> 16) & 0xf) == 15)
233 if (insn & 0x0200000) {
234 offset = (insn >> 7) & 0x1e;
235 offset = (insn & 0xff) << (32 - offset) |
236 (insn & 0xff) >> offset;
238 offset = fetch_reg(cookie, insn & 0x0f);
239 if ((insn
[all...]
H A Dundefined.c88 #define ARM_COPROC_INSN(insn) (((insn) & (1 << 27)) != 0)
89 #define ARM_VFP_INSN(insn) ((((insn) & 0xfe000000) == 0xf2000000) || \
90 (((insn) & 0xff100000) == 0xf4000000))
91 #define ARM_COPROC(insn) (((insn) >> 8) & 0xf)
93 #define THUMB_32BIT_INSN(insn) ((((insn) & 0xe000) == 0xe000) && \
94 (((insn)
149 gdb_trapper(u_int addr, u_int insn, struct trapframe *frame, int code) argument
[all...]
/freebsd-current/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS/
H A DEmulateInstructionMIPS.h93 bool (EmulateInstructionMIPS::*callback)(llvm::MCInst &insn);
102 bool Emulate_ADDiu(llvm::MCInst &insn);
104 bool Emulate_SUBU_ADDU(llvm::MCInst &insn);
106 bool Emulate_LUI(llvm::MCInst &insn);
108 bool Emulate_SW(llvm::MCInst &insn);
110 bool Emulate_LW(llvm::MCInst &insn);
112 bool Emulate_ADDIUSP(llvm::MCInst &insn);
114 bool Emulate_ADDIUS5(llvm::MCInst &insn);
116 bool Emulate_SWSP(llvm::MCInst &insn);
118 bool Emulate_SWM16_32(llvm::MCInst &insn);
[all...]
H A DEmulateInstructionMIPS.cpp1075 * of llvm::Mips::<insn> we would need "MipsGenInstrInfo.inc".
1173 bool EmulateInstructionMIPS::Emulate_ADDiu(llvm::MCInst &insn) { argument
1179 const uint32_t imm16 = insn.getOperand(2).getImm();
1182 dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1183 src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1225 bool EmulateInstructionMIPS::Emulate_SW(llvm::MCInst &insn) { argument
1227 uint32_t imm16 = insn.getOperand(2).getImm();
1233 src = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1234 base = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1287 bool EmulateInstructionMIPS::Emulate_LW(llvm::MCInst &insn) { argument
1331 Emulate_SUBU_ADDU(llvm::MCInst &insn) argument
1410 Emulate_LUI(llvm::MCInst &insn) argument
1427 Emulate_ADDIUSP(llvm::MCInst &insn) argument
1454 Emulate_ADDIUS5(llvm::MCInst &insn) argument
1488 Emulate_SWSP(llvm::MCInst &insn) argument
1553 Emulate_SWM16_32(llvm::MCInst &insn) argument
1631 Emulate_LWSP(llvm::MCInst &insn) argument
1679 Emulate_LWM16_32(llvm::MCInst &insn) argument
1736 Emulate_JRADDIUSP(llvm::MCInst &insn) argument
1789 Emulate_BXX_3ops(llvm::MCInst &insn) argument
1839 Emulate_BXX_3ops_C(llvm::MCInst &insn) argument
1918 Emulate_Bcond_Link_C(llvm::MCInst &insn) argument
1987 Emulate_Bcond_Link(llvm::MCInst &insn) argument
2038 Emulate_BXX_2ops(llvm::MCInst &insn) argument
2095 Emulate_BXX_2ops_C(llvm::MCInst &insn) argument
2155 Emulate_B16_MM(llvm::MCInst &insn) argument
2182 Emulate_Branch_MM(llvm::MCInst &insn) argument
2283 Emulate_JALRx16_MM(llvm::MCInst &insn) argument
2322 Emulate_JALx(llvm::MCInst &insn) argument
2367 Emulate_JALRS(llvm::MCInst &insn) argument
2404 Emulate_BAL(llvm::MCInst &insn) argument
2435 Emulate_BALC(llvm::MCInst &insn) argument
2466 Emulate_BC(llvm::MCInst &insn) argument
2489 Emulate_J(llvm::MCInst &insn) argument
2512 Emulate_JAL(llvm::MCInst &insn) argument
2543 Emulate_JALR(llvm::MCInst &insn) argument
2578 Emulate_JIALC(llvm::MCInst &insn) argument
2616 Emulate_JIC(llvm::MCInst &insn) argument
2642 Emulate_JR(llvm::MCInst &insn) argument
2669 Emulate_FP_branch(llvm::MCInst &insn) argument
2708 Emulate_BC1EQZ(llvm::MCInst &insn) argument
2744 Emulate_BC1NEZ(llvm::MCInst &insn) argument
2787 Emulate_3D_branch(llvm::MCInst &insn) argument
2839 Emulate_BNZB(llvm::MCInst &insn) argument
2843 Emulate_BNZH(llvm::MCInst &insn) argument
2847 Emulate_BNZW(llvm::MCInst &insn) argument
2851 Emulate_BNZD(llvm::MCInst &insn) argument
2855 Emulate_BZB(llvm::MCInst &insn) argument
2859 Emulate_BZH(llvm::MCInst &insn) argument
2863 Emulate_BZW(llvm::MCInst &insn) argument
2867 Emulate_BZD(llvm::MCInst &insn) argument
2871 Emulate_MSA_Branch_DF(llvm::MCInst &insn, int element_byte_size, bool bnz) argument
2931 Emulate_BNZV(llvm::MCInst &insn) argument
2935 Emulate_BZV(llvm::MCInst &insn) argument
2939 Emulate_MSA_Branch_V(llvm::MCInst &insn, bool bnz) argument
2974 Emulate_LDST_Imm(llvm::MCInst &insn) argument
3005 Emulate_LDST_Reg(llvm::MCInst &insn) argument
[all...]
/freebsd-current/contrib/processor-trace/libipt/internal/include/
H A Dpt_insn.h122 /* Check if the instruction @insn/@iext changes the current privilege level.
124 * Returns non-zero if it does, zero if it doesn't (or @insn/@iext is NULL).
126 extern int pt_insn_changes_cpl(const struct pt_insn *insn,
129 /* Check if the instruction @insn/@iext changes CR3.
131 * Returns non-zero if it does, zero if it doesn't (or @insn/@iext is NULL).
133 extern int pt_insn_changes_cr3(const struct pt_insn *insn,
136 /* Check if the instruction @insn/@iext is a (near or far) branch.
138 * Returns non-zero if it is, zero if it isn't (or @insn/@iext is NULL).
140 extern int pt_insn_is_branch(const struct pt_insn *insn,
143 /* Check if the instruction @insn/
[all...]
/freebsd-current/sys/arm64/include/
H A Dundefined.h40 mrs_Op0(uint32_t insn) argument
44 return (2 | ((insn & MRS_Op0_MASK) >> MRS_Op0_SHIFT));
49 mrs_##op(uint32_t insn) \
52 return ((insn & MRS_##op##_MASK) >> MRS_##op##_SHIFT); \
/freebsd-current/sys/dev/psci/
H A Dsmccc_arm.S38 .macro arm_smccc_1_0 insn
39 ENTRY(arm_smccc_\insn)
43 \insn #0
50 END(arm_smccc_\insn)
H A Dsmccc_arm64.S37 .macro arm_smccc_1_0 insn
38 ENTRY(arm_smccc_\insn)
39 \insn #0
45 END(arm_smccc_\insn)
56 .macro arm_smccc_1_2 insn
57 ENTRY(arm_smccc_1_2_\insn)
69 \insn #0
83 END(arm_smccc_1_2_\insn)
/freebsd-current/sys/riscv/riscv/
H A Ddb_disasm.c80 int (*match_func)(struct riscv_op *op, uint32_t insn);
84 m_op(struct riscv_op *op, uint32_t insn) argument
87 if (((insn ^ op->match) & op->mask) == 0)
348 oprint(struct riscv_op *op, vm_offset_t loc, int insn) argument
358 rd = (insn & RD_MASK) >> RD_SHIFT;
359 rs1 = (insn & RS1_MASK) >> RS1_SHIFT;
360 rs2 = (insn & RS2_MASK) >> RS2_SHIFT;
369 rd = (insn >> 2) & 0x7;
374 rs2 = (insn >> 7) & 0x7;
379 imm = ((insn >> 1
578 uint32_t insn; local
[all...]
/freebsd-current/sys/arm64/arm64/
H A Dundefined.c54 #define INSN_COND(insn) ((insn >> 28) & ~0x1)
55 #define INSN_COND_INVERTED(insn) ((insn >> 28) & 0x1)
96 id_aa64mmfr2_handler(vm_offset_t va, uint32_t insn, struct trapframe *frame, argument
105 if ((insn & MRS_ID_AA64MMFR2_EL0_MASK) == MRS_ID_AA64MMFR2_EL0_VALUE) {
106 reg = MRS_REGISTER(insn);
122 arm_cond_match(uint32_t insn, struct trapframe *frame) argument
136 cond = INSN_COND(insn);
137 invert = INSN_COND_INVERTED(insn);
176 gdb_trapper(vm_offset_t va, uint32_t insn, struct trapframe *frame, uint32_t esr) argument
198 swp_emulate(vm_offset_t va, uint32_t insn, struct trapframe *frame, uint32_t esr) argument
318 uint32_t insn; local
[all...]
H A Ddisassem.c392 arm64_disasm_read_token(struct arm64_insn *insn, u_int opcode, argument
398 if (strcmp(insn->tokens[i].name, token) == 0) {
399 *val = (opcode >> insn->tokens[i].pos &
400 ((1 << insn->tokens[i].len) - 1));
409 arm64_disasm_read_token_sign_ext(struct arm64_insn *insn, u_int opcode, argument
416 if (strcmp(insn->tokens[i].name, token) == 0) {
417 msk = (1 << insn->tokens[i].len) - 1;
418 *val = ((opcode >> insn->tokens[i].pos) & msk);
421 if (*val & (1 << (insn->tokens[i].len - 1)))
492 uint32_t insn; local
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/
H A DVEDisassembler.cpp213 static DecodeStatus DecodeASX(MCInst &Inst, uint64_t insn, uint64_t Address,
215 static DecodeStatus DecodeLoadI32(MCInst &Inst, uint64_t insn, uint64_t Address,
217 static DecodeStatus DecodeStoreI32(MCInst &Inst, uint64_t insn,
220 static DecodeStatus DecodeLoadI64(MCInst &Inst, uint64_t insn, uint64_t Address,
222 static DecodeStatus DecodeStoreI64(MCInst &Inst, uint64_t insn,
225 static DecodeStatus DecodeLoadF32(MCInst &Inst, uint64_t insn, uint64_t Address,
227 static DecodeStatus DecodeStoreF32(MCInst &Inst, uint64_t insn,
230 static DecodeStatus DecodeLoadASI64(MCInst &Inst, uint64_t insn,
233 static DecodeStatus DecodeStoreASI64(MCInst &Inst, uint64_t insn,
236 static DecodeStatus DecodeTS1AMI64(MCInst &Inst, uint64_t insn,
316 DecodeASX(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
349 DecodeAS(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
371 DecodeMem(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder, bool isLoad, DecodeFunc DecodeSX) argument
395 DecodeMemAS(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder, bool isLoad, DecodeFunc DecodeSX) argument
419 DecodeLoadI32(MCInst &Inst, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
424 DecodeStoreI32(MCInst &Inst, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
430 DecodeLoadI64(MCInst &Inst, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
435 DecodeStoreI64(MCInst &Inst, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
441 DecodeLoadF32(MCInst &Inst, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
446 DecodeStoreF32(MCInst &Inst, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
452 DecodeLoadASI64(MCInst &Inst, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
459 DecodeStoreASI64(MCInst &Inst, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
466 DecodeCAS(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder, bool isImmOnly, bool isUImm, DecodeFunc DecodeSX) argument
504 DecodeTS1AMI64(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
510 DecodeTS1AMI32(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
516 DecodeCASI64(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
522 DecodeCASI32(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
528 DecodeCall(MCInst &Inst, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
533 DecodeSIMM7(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
540 DecodeSIMM32(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
598 DecodeBranchCondition(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
622 DecodeBranchConditionAlways(MCInst &MI, uint64_t insn, uint64_t Address, const MCDisassembler *Decoder) argument
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp184 DecodeThreeAddrSRegInstruction(MCInst &Inst, uint32_t insn, uint64_t Address,
186 static DecodeStatus DecodeMoveImmInstruction(MCInst &Inst, uint32_t insn,
190 DecodeUnsignedLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Address,
192 static DecodeStatus DecodeSignedLdStInstruction(MCInst &Inst, uint32_t insn,
196 DecodeExclusiveLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Address,
198 static DecodeStatus DecodePairLdStInstruction(MCInst &Inst, uint32_t insn,
201 static DecodeStatus DecodeAuthLoadInstruction(MCInst &Inst, uint32_t insn,
204 static DecodeStatus DecodeAddSubERegInstruction(MCInst &Inst, uint32_t insn,
207 static DecodeStatus DecodeLogicalImmInstruction(MCInst &Inst, uint32_t insn,
210 static DecodeStatus DecodeModImmInstruction(MCInst &Inst, uint32_t insn,
1051 DecodeThreeAddrSRegInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1112 DecodeMoveImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1146 DecodeUnsignedLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1204 DecodeSignedLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1403 DecodeExclusiveLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1485 DecodePairLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1619 DecodeAuthLoadInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1652 DecodeAddSubERegInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1709 DecodeLogicalImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1740 DecodeModImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1779 DecodeModImmTiedInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1797 DecodeAdrInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1815 DecodeAddSubImmShift(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1850 DecodeUnconditionalBranch(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1872 DecodeSystemPStateImm0_15Instruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1893 DecodeSystemPStateImm0_1Instruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1914 DecodeTestAndBranch(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1966 DecodeSyspXzrInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
1987 DecodeSVELogicalImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
2046 DecodeCPYMemOpInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
2071 DecodeSETMemOpInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
2095 DecodePRFMRegInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const MCDisassembler *Decoder) argument
[all...]
/freebsd-current/contrib/llvm-project/lld/ELF/Arch/
H A DHexagon.cpp186 static bool isDuplex(uint32_t insn) { argument
190 return (0xC000 & insn) == 0;
193 static uint32_t findMaskR6(uint32_t insn) { argument
194 if (isDuplex(insn))
198 if ((0xff000000 & insn) == i.cmpMask)
202 utohexstr(insn));
206 static uint32_t findMaskR8(uint32_t insn) { argument
207 if ((0xff000000 & insn) == 0xde000000)
209 if ((0xff000000 & insn) == 0x3c000000)
214 static uint32_t findMaskR11(uint32_t insn) { argument
220 findMaskR16(uint32_t insn) argument
[all...]

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