/freebsd-9.3-release/lib/msun/src/ |
H A D | s_exp2.c | 40 redux = 0x1.8p52 / TBLSIZE, 41 P1 = 0x1.62e42fefa39efp-1, 42 P2 = 0x1.ebfbdff82c575p-3, 43 P3 = 0x1.c6b08d704a0a6p-5, 44 P4 = 0x1.3b2ab88f70400p-7, 45 P5 = 0x1.5d88003875c74p-10; 51 0x1.6a09e667f3d5dp-1, 0x1.9880p-44, 52 0x1.6b052fa751744p-1, 0x1 [all...] |
H A D | s_exp2f.c | 40 redux = 0x1.8p23f / TBLSIZE, 41 P1 = 0x1.62e430p-1f, 42 P2 = 0x1.ebfbe0p-3f, 43 P3 = 0x1.c6b348p-5f, 44 P4 = 0x1.3b2c9cp-7f; 49 0x1.6a09e667f3bcdp-1, 50 0x1.7a11473eb0187p-1, 51 0x1.8ace5422aa0dbp-1, 52 0x1.9c49182a3f090p-1, 53 0x1 [all...] |
/freebsd-9.3-release/lib/msun/ld128/ |
H A D | s_exp2l.c | 50 P1 = 0x1.62e42fefa39ef35793c7673007e6p-1L, 51 P2 = 0x1.ebfbdff82c58ea86f16b06ec9736p-3L, 52 P3 = 0x1.c6b08d704a0bf8b33a762bad3459p-5L, 53 P4 = 0x1.3b2ab6fba4e7729ccbbe0b4f3fc2p-7L, 54 P5 = 0x1.5d87fe78a67311071dee13fd11d9p-10L, 55 P6 = 0x1.430912f86c7876f4b663b23c5fe5p-13L; 58 P7 = 0x1.ffcbfc588b041p-17, 59 P8 = 0x1.62c0223a5c7c7p-20, 60 P9 = 0x1.b52541ff59713p-24, 61 P10 = 0x1 [all...] |
/freebsd-9.3-release/lib/msun/ld80/ |
H A D | s_exp2l.c | 54 redux = 0x1.8p63 / TBLSIZE, 55 P1 = 0x1.62e42fefa39efp-1, 56 P2 = 0x1.ebfbdff82c58fp-3, 57 P3 = 0x1.c6b08d7049fap-5, 58 P4 = 0x1.3b2ab6fba4da5p-7, 59 P5 = 0x1.5d8804780a736p-10, 60 P6 = 0x1.430918835e33dp-13; 63 0x1.6a09e667f3bcdp-1, -0x1.bdd3413b2648p-55, 64 0x1 [all...] |
/freebsd-9.3-release/sys/dev/drm2/radeon/ |
H A D | rv250d.h | 38 #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) 39 #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) 41 #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) 42 #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) 44 #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) 45 #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) 47 #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) 48 #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) 50 #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) 51 #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) [all...] |
H A D | r100d.h | 83 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) 84 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) 86 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) 87 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) 89 #define S_0000F0_SOFT_RESET_SE(x) (((x) & 0x1) << 2) 90 #define G_0000F0_SOFT_RESET_SE(x) (((x) >> 2) & 0x1) 92 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) 93 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) 95 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) 96 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) [all...] |
H A D | rs600d.h | 36 #define S_000040_SCRATCH_INT_MASK(x) (((x) & 0x1) << 18) 37 #define G_000040_SCRATCH_INT_MASK(x) (((x) >> 18) & 0x1) 39 #define S_000040_GUI_IDLE_MASK(x) (((x) & 0x1) << 19) 40 #define G_000040_GUI_IDLE_MASK(x) (((x) >> 19) & 0x1) 42 #define S_000040_DMA_VIPH1_INT_EN(x) (((x) & 0x1) << 13) 43 #define G_000040_DMA_VIPH1_INT_EN(x) (((x) >> 13) & 0x1) 45 #define S_000040_DMA_VIPH2_INT_EN(x) (((x) & 0x1) << 14) 46 #define G_000040_DMA_VIPH2_INT_EN(x) (((x) >> 14) & 0x1) 48 #define S_000040_DMA_VIPH3_INT_EN(x) (((x) & 0x1) << 15) 49 #define G_000040_DMA_VIPH3_INT_EN(x) (((x) >> 15) & 0x1) [all...] |
H A D | r520d.h | 44 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 45 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 47 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 48 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 50 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 51 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 53 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 54 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 56 #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 57 #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) [all...] |
H A D | rv350d.h | 36 #define S_00000D_FORCE_VAP(x) (((x) & 0x1) << 21) 37 #define G_00000D_FORCE_VAP(x) (((x) >> 21) & 0x1) 39 #define S_00000D_FORCE_SR(x) (((x) & 0x1) << 25) 40 #define G_00000D_FORCE_SR(x) (((x) >> 25) & 0x1) 42 #define S_00000D_FORCE_PX(x) (((x) & 0x1) << 26) 43 #define G_00000D_FORCE_PX(x) (((x) >> 26) & 0x1) 45 #define S_00000D_FORCE_TX(x) (((x) & 0x1) << 27) 46 #define G_00000D_FORCE_TX(x) (((x) >> 27) & 0x1) 48 #define S_00000D_FORCE_US(x) (((x) & 0x1) << 28) 49 #define G_00000D_FORCE_US(x) (((x) >> 28) & 0x1) [all...] |
H A D | r420d.h | 38 #define S_0001F8_MC_IND_WR_EN(x) (((x) & 0x1) << 8) 39 #define G_0001F8_MC_IND_WR_EN(x) (((x) >> 8) & 0x1) 46 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 47 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 49 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 50 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 52 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 53 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 55 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 56 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) [all...] |
H A D | rs400d.h | 50 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 51 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 53 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 54 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 56 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 57 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 59 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 60 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 62 #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 63 #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) [all...] |
H A D | rs690d.h | 39 #define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9) 40 #define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1) 55 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 56 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 58 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 59 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 61 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 62 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 64 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 65 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) [all...] |
H A D | r300d.h | 106 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 107 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 109 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 110 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 112 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 113 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 115 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 116 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 118 #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 119 #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) [all...] |
H A D | rv515d.h | 224 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) 225 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) 227 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) 228 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) 230 #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) 231 #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) 233 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) 234 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) 236 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) 237 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) [all...] |
/freebsd-9.3-release/sys/dev/qlxgb/ |
H A D | qla_def.h | 38 #define BIT_0 (0x1 << 0) 39 #define BIT_1 (0x1 << 1) 40 #define BIT_2 (0x1 << 2) 41 #define BIT_3 (0x1 << 3) 42 #define BIT_4 (0x1 << 4) 43 #define BIT_5 (0x1 << 5) 44 #define BIT_6 (0x1 << 6) 45 #define BIT_7 (0x1 << 7) 46 #define BIT_8 (0x1 << 8) 47 #define BIT_9 (0x1 << [all...] |
/freebsd-9.3-release/contrib/binutils/opcodes/ |
H A D | ia64-asmtab.c | 1938 { 0x1, 0x1, 0, -1, -1, 13, 1, 0 }, 2026 { 0x1, 0x1, 0, 1166, -1, 20, 1, 68 }, 2095 { 0x1, 0x1, 0, -1, -1, 13, 1, 0 }, 2139 { 0x1, 0x1, 2, -1, -1, 27, 1, 12 }, 2140 { 0x1, 0x1, [all...] |
/freebsd-9.3-release/tools/regression/lib/msun/ |
H A D | test-fma.c | 193 test(fmaf, 1.0, 1.0, 0x1.0p-100, 1.0 + FLT_EPSILON, 195 test(fma, 1.0, 1.0, 0x1.0p-200, 1.0 + DBL_EPSILON, 197 test(fmal, 1.0, 1.0, 0x1.0p-200, 1.0 + LDBL_EPSILON, 200 testall(0x1.0p100, 1.0, 0x1.0p-100, 0x1.0p100, 206 test(fmaf, -1.0, 1.0, -0x1.0p-100, -(1.0 + FLT_EPSILON), 208 test(fma, -1.0, 1.0, -0x1.0p-200, -(1.0 + DBL_EPSILON), 210 test(fmal, -1.0, 1.0, -0x1.0p-200, -(1.0 + LDBL_EPSILON), 213 testall(0x1 [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonBaseInfo.h | 51 HasV2SubTOnly = 0x1, 55 NoV3SubT = 0x1, 89 SoloMask = 0x1, 93 PredicatedMask = 0x1, 95 PredicatedFalseMask = 0x1, 97 PredicatedNewMask = 0x1, 101 NewValueMask = 0x1, 105 hasNewValueMask = 0x1, 117 mayNVStoreMask = 0x1, 121 NVStoreMask = 0x1, [all...] |
/freebsd-9.3-release/sys/dev/qlxgbe/ |
H A D | ql_def.h | 38 #define BIT_0 (0x1 << 0) 39 #define BIT_1 (0x1 << 1) 40 #define BIT_2 (0x1 << 2) 41 #define BIT_3 (0x1 << 3) 42 #define BIT_4 (0x1 << 4) 43 #define BIT_5 (0x1 << 5) 44 #define BIT_6 (0x1 << 6) 45 #define BIT_7 (0x1 << 7) 46 #define BIT_8 (0x1 << 8) 47 #define BIT_9 (0x1 << [all...] |
/freebsd-9.3-release/sys/dev/usb/controller/ |
H A D | at91dci.h | 42 #define AT91_UDP_FRM_ERR (0x1 << 16) /* Frame Error */ 43 #define AT91_UDP_FRM_OK (0x1 << 17) /* Frame OK */ 46 #define AT91_UDP_GSTATE_ADDR (0x1 << 0) /* Addressed state */ 47 #define AT91_UDP_GSTATE_CONFG (0x1 << 1) /* Configured */ 48 #define AT91_UDP_GSTATE_ESR (0x1 << 2) /* Enable Send Resume */ 49 #define AT91_UDP_GSTATE_RSM (0x1 << 3) /* A Resume Has Been Sent to 51 #define AT91_UDP_GSTATE_RMW (0x1 << 4) /* Remote Wake Up Enable */ 55 #define AT91_UDP_FADDR_EN (0x1 << 8)/* Function Enable */ 64 #define AT91_UDP_INT_EP(n) (0x1 <<(n))/* Endpoint "n" Interrupt */ 65 #define AT91_UDP_INT_RXSUSP (0x1 << [all...] |
/freebsd-9.3-release/contrib/gdtoa/ |
H A D | hexnan.c | 36 L_shift(x, x1, i) ULong *x; ULong *x1; int i; 38 L_shift(ULong *x, ULong *x1, int i) 49 } while(++x < x1); 60 ULong c, h, *x, *x1, *xe; local 71 x1 = xe = x; 84 if (x < x1 && i < 8) 85 L_shift(x, x1, i); 92 x1 = x; 127 if (x < x1 [all...] |
/freebsd-9.3-release/sys/boot/i386/libfirewire/ |
H A D | fwohcireg.h | 157 #define OHCI_SPD_S200 0x1 188 #define OHCI_CNTL_CYCMATCH_S (0x1 << 31) 190 #define OHCI_CNTL_BUFFIL (0x1 << 31) 191 #define OHCI_CNTL_ISOHDR (0x1 << 30) 192 #define OHCI_CNTL_CYCMATCH_R (0x1 << 29) 193 #define OHCI_CNTL_MULTICH (0x1 << 28) 195 #define OHCI_CNTL_DMA_RUN (0x1 << 15) 196 #define OHCI_CNTL_DMA_WAKE (0x1 << 12) 197 #define OHCI_CNTL_DMA_DEAD (0x1 << 11) 198 #define OHCI_CNTL_DMA_ACTIVE (0x1 << 1 [all...] |
/freebsd-9.3-release/sys/dev/e1000/ |
H A D | e1000_82543.h | 40 #define PHY_SOF 0x1 42 #define PHY_OP_WRITE 0x1 45 #define TBI_COMPAT_ENABLED 0x1 /* Global "knob" for the workaround */
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/freebsd-9.3-release/lib/libkse/arch/sparc64/sparc64/ |
H A D | assym.s | 11 #define MC_VALID_FLAGS 0x1
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/freebsd-9.3-release/sys/boot/i386/kgzldr/ |
H A D | kgzldr.h | 29 #define KGZ_CRT 0x1 /* Video console */
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