Searched refs:sq_config (Results 1 - 10 of 10) sorted by relevance

/freebsd-9.3-release/sys/dev/drm2/radeon/
H A Devergreen_blit_kms.c283 u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2, sq_gpr_resource_mgmt_3; local
520 sq_config = 0;
522 sq_config = VC_ENABLE;
524 sq_config |= (EXPORT_SRC_C |
566 radeon_ring_write(ring, sq_config);
H A Dr600_blit.c321 u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2; local
447 sq_config = 0;
449 sq_config = R600_VC_ENABLE;
451 sq_config |= (R600_DX9_CONSTS |
486 OUT_RING(sq_config);
H A Dr600_blit_kms.c286 u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2; local
413 sq_config = 0;
415 sq_config = VC_ENABLE;
417 sq_config |= (DX9_CONSTS |
453 radeon_ring_write(ring, sq_config);
H A Dr600_cp.c724 u32 sq_config; local
957 sq_config = RADEON_READ(R600_SQ_CONFIG);
958 sq_config &= ~(R600_PS_PRIO(3) |
962 sq_config |= (R600_DX9_CONSTS |
988 sq_config &= ~R600_VC_ENABLE;
1034 RADEON_WRITE(R600_SQ_CONFIG, sq_config);
1351 u32 sq_config; local
1642 sq_config = RADEON_READ(R600_SQ_CONFIG);
1643 sq_config &= ~(R600_PS_PRIO(3) |
1647 sq_config |
[all...]
H A Drv770.c382 u32 sq_config; local
683 sq_config = RREG32(SQ_CONFIG);
684 sq_config &= ~(PS_PRIO(3) |
688 sq_config |= (DX9_CONSTS |
697 sq_config &= ~VC_ENABLE;
699 WREG32(SQ_CONFIG, sq_config);
H A Dr600_cs.c54 u32 sq_config; member in struct:r600_cs_track
314 track->sq_config = DX9_CONSTS;
1155 track->sq_config = radeon_get_ib_value(p, idx);
2150 if (track->sq_config & DX9_CONSTS) {
H A Devergreen.c1705 u32 sq_config; local
2114 sq_config = RREG32(SQ_CONFIG);
2115 sq_config &= ~(PS_PRIO(3) |
2119 sq_config |= (VC_ENABLE |
2133 sq_config &= ~VC_ENABLE;
2175 WREG32(SQ_CONFIG, sq_config);
H A Dr600.c1527 u32 sq_config; local
1740 sq_config = RREG32(SQ_CONFIG);
1741 sq_config &= ~(PS_PRIO(3) |
1745 sq_config |= (DX9_CONSTS |
1771 sq_config &= ~VC_ENABLE;
1817 WREG32(SQ_CONFIG, sq_config);
/freebsd-9.3-release/sys/dev/drm/
H A Dr600_cp.c678 u32 sq_config; local
896 sq_config = RADEON_READ(R600_SQ_CONFIG);
897 sq_config &= ~(R600_PS_PRIO(3) |
901 sq_config |= (R600_DX9_CONSTS |
927 sq_config &= ~R600_VC_ENABLE;
973 RADEON_WRITE(R600_SQ_CONFIG, sq_config);
1223 u32 sq_config; local
1484 sq_config = RADEON_READ(R600_SQ_CONFIG);
1485 sq_config &= ~(R600_PS_PRIO(3) |
1489 sq_config |
[all...]
H A Dr600_blit.c1470 u32 sq_config, sq_gpr_resource_mgmt_1, sq_gpr_resource_mgmt_2; local
1596 sq_config = 0;
1598 sq_config = R600_VC_ENABLE;
1600 sq_config |= (R600_DX9_CONSTS |
1637 OUT_RING(sq_config);

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