Searched refs:NumOps (Results 1 - 25 of 56) sorted by relevance

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/freebsd-9.3-release/contrib/llvm/include/llvm/IR/
H A DConstant.h47 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) argument
48 : User(ty, vty, Ops, NumOps) {}
H A DInlineAsm.h233 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { argument
234 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!");
236 return Kind | (NumOps << 3);
H A DUser.h52 User(Type *ty, unsigned vty, Use *OpList, unsigned NumOps) argument
53 : Value(ty, vty), OperandList(OpList), NumOperands(NumOps) {}
H A DGlobalValue.h59 GlobalValue(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps, argument
61 : Constant(ty, vty, Ops, NumOps), Linkage(linkage),
H A DInstruction.h445 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
447 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
H A DInstrTypes.h38 Use *Ops, unsigned NumOps,
40 : Instruction(Ty, iType, Ops, NumOps, InsertBefore) {}
43 Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd)
44 : Instruction(Ty, iType, Ops, NumOps, InsertAtEnd) {}
37 TerminatorInst(Type *Ty, Instruction::TermOps iType, Use *Ops, unsigned NumOps, Instruction *InsertBefore = 0) argument
42 TerminatorInst(Type *Ty, Instruction::TermOps iType, Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd) argument
/freebsd-9.3-release/contrib/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h569 unsigned NumOps = Desc.getNumOperands(); local
571 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
573 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
578 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
579 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1)
583 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
H A DX86MCCodeEmitter.cpp678 unsigned NumOps = Desc.getNumOperands(); local
680 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
682 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
687 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
688 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1)
692 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0)
958 unsigned NumOps = MI.getNumOperands(); local
960 bool isTwoAddr = NumOps > 1 &&
965 for (; i != NumOps;
1199 unsigned NumOps = Desc.getNumOperands(); local
[all...]
/freebsd-9.3-release/contrib/llvm/lib/CodeGen/
H A DMachineRegisterInfo.cpp146 unsigned NumOps = MI->getNumOperands(); local
147 if (!(MO >= MO0 && MO < MO0+NumOps)) {
241 /// Move NumOps operands from Src to Dst, updating use-def lists as needed.
250 unsigned NumOps) {
251 assert(Src != Dst && NumOps && "Noop moveOperands");
255 if (Dst >= Src && Dst < Src + NumOps) {
257 Dst += NumOps - 1;
258 Src += NumOps - 1;
287 } while (--NumOps);
248 moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps) argument
H A DCallingConvLower.cpp120 unsigned NumOps = Outs.size(); local
121 for (unsigned i = 0; i != NumOps; ++i) {
139 unsigned NumOps = ArgVTs.size(); local
140 for (unsigned i = 0; i != NumOps; ++i) {
H A DMachineInstr.cpp538 if (unsigned NumOps = MCID->getNumOperands() +
540 CapOperands = OperandCapacity::get(NumOps);
601 /// Move NumOps MachineOperands from Src to Dst, with support for overlapping
604 unsigned NumOps, MachineRegisterInfo *MRI) {
606 return MRI->moveOperands(Dst, Src, NumOps);
611 for (unsigned i = 0; i != NumOps; ++i)
614 for (unsigned i = NumOps; i ; --i)
932 unsigned NumOps;
934 i += NumOps) {
939 NumOps
603 moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps, MachineRegisterInfo *MRI) argument
1163 unsigned NumOps; local
[all...]
/freebsd-9.3-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonCallingConvLower.cpp136 unsigned NumOps = Outs.size(); local
146 for (; i != NumOps; ++i) {
164 unsigned NumOps = ArgVTs.size(); local
165 for (unsigned i = 0; i != NumOps; ++i) {
/freebsd-9.3-release/contrib/llvm/lib/Target/X86/
H A DX86CodeEmitter.cpp172 unsigned NumOps = Desc.getNumOperands(); local
173 if (NumOps) {
174 bool isTwoAddr = NumOps > 1 &&
179 for (unsigned e = NumOps; i != e; ++i) {
197 for (unsigned e = NumOps; i != e; ++i) {
209 for (; i != NumOps; ++i) {
226 if (NumOps > e && X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(e)))
243 for (unsigned e = NumOps; i != e; ++i) {
932 unsigned NumOps = Desc->getNumOperands();
934 if (NumOps >
[all...]
H A DX86FloatingPoint.cpp986 unsigned NumOps = MI->getDesc().getNumOperands();
987 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) &&
991 unsigned Reg = getFPReg(MI->getOperand(NumOps-1));
1023 MI->RemoveOperand(NumOps-1); // Remove explicit ST(0) operand
1051 unsigned NumOps = MI->getDesc().getNumOperands();
1052 assert(NumOps >= 2 && "FPRW instructions must have 2 ops!!");
1473 unsigned NumOps = 0;
1475 i != e && MI->getOperand(i).isImm(); i += 1 + NumOps) {
1477 NumOps
[all...]
/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp702 unsigned NumOps = MCID.getNumOperands(); local
703 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
704 if (HasCC && MI->getOperand(NumOps-1).isDead())
728 unsigned NumOps = MCID.getNumOperands(); local
730 if (i < NumOps && MCID.OpInfo[i].isOptionalDef())
798 unsigned NumOps = MCID.getNumOperands(); local
799 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
800 if (HasCC && MI->getOperand(NumOps-1).isDead())
824 unsigned NumOps = MCID.getNumOperands(); local
826 if (i < NumOps
[all...]
/freebsd-9.3-release/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h608 const SDUse *Ops, unsigned NumOps);
610 const SDValue *Ops, unsigned NumOps);
613 const SDValue *Ops, unsigned NumOps);
615 const SDValue *Ops, unsigned NumOps);
617 const SDValue *Ops, unsigned NumOps);
729 SDValue* Ops, unsigned NumOps, MachineMemOperand *MMO,
739 const SDValue *Ops, unsigned NumOps,
745 const SDValue *Ops, unsigned NumOps,
751 const SDValue *Ops, unsigned NumOps,
755 SDValue getMergeValues(const SDValue *Ops, unsigned NumOps, SDLo
[all...]
H A DSelectionDAGNodes.h702 const SDValue *Ops, unsigned NumOps)
705 OperandList(NumOps ? new SDUse[NumOps] : 0),
707 NumOperands(NumOps), NumValues(VTs.NumVTs),
709 for (unsigned i = 0; i != NumOps; ++i) {
986 unsigned NumOps, EVT MemoryVT, MachineMemOperand *MMO);
1137 SDValue* AllOps, SDUse *DynOps, unsigned NumOps,
1142 assert((DynOps || NumOps <= array_lengthof(Ops)) &&
1144 InitOperands(DynOps ? DynOps : Ops, AllOps, NumOps);
1181 const SDValue *Ops, unsigned NumOps,
1136 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue* AllOps, SDUse *DynOps, unsigned NumOps, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument
1180 MemIntrinsicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, const SDValue *Ops, unsigned NumOps, EVT MemoryVT, MachineMemOperand *MMO) argument
1640 CvtRndSatSDNode(EVT VT, unsigned Order, DebugLoc dl, const SDValue *Ops, unsigned NumOps, ISD::CvtCode Code) argument
[all...]
/freebsd-9.3-release/contrib/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp385 unsigned NumOps = NumInstOpsHandled[InstIdxs[i]];
386 assert(NumOps <= Inst->Operands.size() &&
389 Inst->Operands.begin()+NumOps);
732 unsigned NumOps = 0;
736 ++NumOps;
740 return NumOps;
744 unsigned NumOps = 0;
756 ++NumOps;
761 return NumOps;
H A DCodeGenInstruction.cpp71 unsigned NumOps = 1; local
91 NumOps = NumArgs;
116 OperandType, MIOperandNo, NumOps,
118 MIOperandNo += NumOps;
/freebsd-9.3-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp338 const SDValue *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
348 const SDUse *Ops, unsigned NumOps) {
349 for (; NumOps; --NumOps, ++Ops) {
770 const SDValue *Ops,unsigned NumOps,
776 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
4185 SDVTList VTList, SDValue* Ops, unsigned NumOps,
4191 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
337 AddNodeIDOperands(FoldingSetNodeID &ID, const SDValue *Ops, unsigned NumOps) argument
347 AddNodeIDOperands(FoldingSetNodeID &ID, const SDUse *Ops, unsigned NumOps) argument
769 FindModifiedNodeSlot(SDNode *N, const SDValue *Ops,unsigned NumOps, void *&InsertPos) argument
4184 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTList, SDValue* Ops, unsigned NumOps, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument
4363 getMergeValues(const SDValue *Ops, unsigned NumOps, SDLoc dl) argument
4377 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, const EVT *VTs, unsigned NumVTs, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) argument
4389 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) argument
4412 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachineMemOperand *MMO) argument
4776 getNode(unsigned Opcode, SDLoc DL, EVT VT, const SDUse *Ops, unsigned NumOps) argument
4792 getNode(unsigned Opcode, SDLoc DL, EVT VT, const SDValue *Ops, unsigned NumOps) argument
4849 getNode(unsigned Opcode, SDLoc DL, ArrayRef<EVT> ResultTys, const SDValue *Ops, unsigned NumOps) argument
4856 getNode(unsigned Opcode, SDLoc DL, const EVT *VTs, unsigned NumVTs, const SDValue *Ops, unsigned NumOps) argument
4864 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, const SDValue *Ops, unsigned NumOps) argument
5139 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) argument
5218 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, const SDValue *Ops, unsigned NumOps) argument
5225 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, const SDValue *Ops, unsigned NumOps) argument
5238 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, const SDValue *Ops, unsigned NumOps) argument
5245 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, EVT VT4, const SDValue *Ops, unsigned NumOps) argument
5286 SelectNodeTo(SDNode *N, unsigned MachineOpc, SDVTList VTs, const SDValue *Ops, unsigned NumOps) argument
5325 MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs, const SDValue *Ops, unsigned NumOps) argument
5534 unsigned NumOps = OpsArray.size(); local
5594 getNodeIfExists(unsigned Opcode, SDVTList VTList, const SDValue *Ops, unsigned NumOps) argument
6070 MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, const SDValue *Ops, unsigned NumOps, EVT memvt, MachineMemOperand *mmo) argument
[all...]
H A DScheduleDAGFast.cpp487 unsigned NumOps = Node->getNumOperands(); local
488 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
489 --NumOps; // Ignore the glue operand.
491 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
674 unsigned NumOps = N->getNumOperands(); local
675 if (unsigned NumLeft = NumOps) {
681 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) {
H A DLegalizeTypes.cpp415 for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i)
1007 unsigned NumOps = N->getNumOperands(); local
1009 if (NumOps == 0) {
1012 } else if (NumOps == 1) {
1016 } else if (NumOps == 2) {
1021 SmallVector<SDValue, 8> Ops(NumOps);
1022 for (unsigned i = 0; i < NumOps; ++i)
1026 &Ops[0], NumOps, isSigned, dl).first;
H A DInstrEmitter.cpp613 unsigned NumOps = Node->getNumOperands();
614 assert((NumOps & 1) == 1 &&
616 for (unsigned i = 1; i != NumOps; ++i) {
920 unsigned NumOps = Node->getNumOperands();
921 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
922 --NumOps; // Ignore the glue operand.
944 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
/freebsd-9.3-release/sys/contrib/dev/acpica/debugger/
H A Ddbdisply.c387 UINT32 NumOps = 0; local
428 NumOps++;
468 NumOps, NumOperators, NumOperands);
/freebsd-9.3-release/contrib/llvm/lib/IR/
H A DInstruction.cpp24 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument
26 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
38 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument
40 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {

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