Searched refs:getSubRegIndex (Results 1 - 20 of 20) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FixupBWInsts.cpp195 const auto SubRegIdx = TRI->getSubRegIndex(SuperDestReg, OrigDestReg);
324 if (TRI->getSubRegIndex(NewSrcReg, OldSrc.getReg()) !=
325 TRI->getSubRegIndex(NewDestReg, OldDest.getReg()))
H A DX86InstructionSelector.cpp204 static unsigned getSubRegIndex(const TargetRegisterClass *RC) { function
260 .addImm(getSubRegIndex(SrcRC));
289 I.getOperand(1).setSubReg(getSubRegIndex(DstRC));
932 .addImm(getSubRegIndex(SrcRC));
H A DX86InstrInfo.cpp8263 if (unsigned SubRegIdx = TRI->getSubRegIndex(DestReg, DescribedReg)) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/
H A DMCRegisterInfo.cpp44 unsigned MCRegisterInfo::getSubRegIndex(MCRegister Reg,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCQPXLoadSplat.cpp104 TRI->getSubRegIndex(SrcReg, MI->getOperand(0).getReg());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRDFRegisters.cpp182 LaneBitmask SM = TRI.getSubRegIndexLaneMask(SI.getSubRegIndex());
228 if (unsigned Idx = TRI.getSubRegIndex(R, RR.Reg))
230 if (unsigned Idx = TRI.getSubRegIndex(RR.Reg, R)) {
H A DLivePhysRegs.cpp164 unsigned SI = S.getSubRegIndex();
H A DMachineCopyPropagation.cpp343 unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
344 return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
H A DStackMaps.cpp159 unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg());
H A DAggressiveAntiDepBreaker.cpp661 unsigned NewSubRegIdx = TRI->getSubRegIndex(SuperReg, Reg);
H A DRDFLiveness.cpp866 LaneBitmask M = TRI.getSubRegIndexLaneMask(S.getSubRegIndex());
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/MIRParser/
H A DMIParser.h114 unsigned getSubRegIndex(StringRef Name);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DRDFCopy.cpp127 if (RR.Mask == TRI.getSubRegIndexLaneMask(S.getSubRegIndex()))
H A DHexagonBlockRanges.cpp245 unsigned SI = S.getSubRegIndex();
285 SRs.insert({R.Reg, I.getSubRegIndex()});
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h464 unsigned getSubRegIndex(MCRegister RegNo, MCRegister SubRegNo) const;
618 unsigned getSubRegIndex() const { function in class:llvm::MCSubRegIndexIterator
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.cpp122 unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg);
145 unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR);
/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenRegisters.cpp400 Parts.push_back(getSubRegIndex(SR->ExplicitSubRegs[j]));
485 if (Cand == this || getSubRegIndex(Cand))
496 assert(getSubRegIndex(SubReg) == SubRegIdx && "LeadingSuperRegs correct");
498 if (CodeGenSubRegIndex *SubRegIdx = getSubRegIndex(SubReg)) {
537 CodeGenSubRegIndex *SubIdx = getSubRegIndex(SI->second);
1415 CodeGenSubRegIndex *Idx3 = Reg1.getSubRegIndex(Reg3);
H A DCodeGenRegisters.h194 CodeGenSubRegIndex *getSubRegIndex(const CodeGenRegister *Reg) const { function in struct:llvm::CodeGenRegister
H A DRegisterInfoEmitter.cpp925 SRIs.push_back(Reg.getSubRegIndex(S));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/
H A DMIParser.cpp183 unsigned PerTargetMIParsingState::getSubRegIndex(StringRef Name) { function in class:PerTargetMIParsingState
1419 SubReg = PFS.Target.getSubRegIndex(Name);
1981 unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());

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