/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/ |
H A D | MCRegisterInfo.cpp | 37 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; 38 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) 39 if (*SRI == Idx) 49 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; 50 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) 52 return *SRI;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCChecker.cpp | 79 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); 80 SRI.isValid(); ++SRI) 81 if (!MCSubRegIterator(*SRI, &RI).isValid()) 83 Uses.insert(*SRI); 144 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); 145 SRI.isValid(); ++SRI) { 146 if (MCSubRegIterator(*SRI, &RI).isValid()) 150 if (R == *SRI) { [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | CriticalAntiDepBreaker.cpp | 263 for (MCSubRegIterator SRI(PhysReg, TRI, true); SRI.isValid(); ++SRI) 264 if (!MO.clobbersPhysReg(*SRI)) 296 for (MCSubRegIterator SRI(Reg, TRI, true); SRI.isValid(); ++SRI) { 297 unsigned SubregReg = *SRI;
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H A D | VirtRegMap.cpp | 295 LiveInterval::const_iterator &SRI = RangeIterPair.second; local 296 while (SRI != SR->end() && SRI->end <= MBBBegin) 297 ++SRI; 298 if (SRI == SR->end()) 300 if (SRI->start <= MBBBegin)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | GCNSchedStrategy.h | 40 const SIRegisterInfo *SRI,
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H A D | GCNSchedStrategy.cpp | 34 const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI); local 52 SGPRCriticalLimit = SRI->getRegPressureSetLimit(DAG->MF, 54 VGPRCriticalLimit = SRI->getRegPressureSetLimit(DAG->MF, 64 const SIRegisterInfo *SRI, 148 const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI); local 156 initCandidate(TryCand, SU, Zone.isTop(), RPTracker, SRI, 62 initCandidate(SchedCandidate &Cand, SUnit *SU, bool AtTop, const RegPressureTracker &RPTracker, const SIRegisterInfo *SRI, unsigned SGPRPressure, unsigned VGPRPressure) argument
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H A D | AMDGPUMachineCFGStructurizer.cpp | 2107 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI != SE; ++SRI) { 2108 unsigned SourceReg = (*SRI).first; 2118 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI != SE; ++SRI) { 2119 PHILinearize::PHISourceT Source = *SRI; 2151 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI ! [all...] |
H A D | SIFoldOperands.cpp | 439 const SIRegisterInfo &SRI = TII->getRegisterInfo(); local 443 if (!SRI.opCanUseInlineConstant(OpInfo.OperandType) ||
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/freebsd-13-stable/stand/kshim/ |
H A D | kshim.mk | 5 # Copyright (c) 2014 SRI International 8 # This software was developed by SRI International and the University of
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/freebsd-13-stable/sbin/pfctl/tests/ |
H A D | pfctl_test_list.inc | 6 * This software was developed by SRI International and the University of
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/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 137 for (CodeGenSubRegIndex *SRI : SubIdx->ConcatenationOf) 138 assert(SRI->ConcatenationOf.empty() && "No transitive closure?"); 319 SubRegMap::const_iterator SRI = Map.find(I->first); local 320 if (SRI == Map.end()) 322 // Add I->second as a name for the subreg SRI->second, assuming it is 324 if (SubRegs.count(I->second) || !Orphans.erase(SRI->second)) 327 SubRegs.insert(std::make_pair(I->second, SRI->second)); 1162 for (CodeGenSubRegIndex &SRI : SubRegIndices) { 1163 SRI.computeConcatTransitiveClosure(); 1164 if (!SRI [all...] |
H A D | RegisterInfoEmitter.cpp | 1669 for (const CodeGenSubRegIndex &SRI : RegBank.getSubRegIndices()) { 1670 OS << "SubRegIndex " << SRI.getName() << ":\n"; 1671 OS << "\tLaneMask: " << PrintLaneMask(SRI.LaneMask) << '\n'; 1672 OS << "\tAllSuperRegsCovered: " << SRI.AllSuperRegsCovered << '\n';
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H A D | GlobalISelEmitter.cpp | 2692 SubRegIndexRenderer(unsigned InsnID, const CodeGenSubRegIndex *SRI) 2693 : OperandRenderer(OR_SubRegIndex), InsnID(InsnID), SubRegIdx(SRI) {}
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/freebsd-13-stable/stand/usb/ |
H A D | usbcore.mk | 5 # Copyright (c) 2014 SRI International 8 # This software was developed by SRI International and the University of
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 5047 unsigned SRI; local 5050 case 0: SRI = PPC::sub_lt; break; 5051 case 1: SRI = PPC::sub_gt; break; 5052 case 2: SRI = PPC::sub_eq; break; 5053 case 3: SRI = PPC::sub_un; break; 5056 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg);
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