Searched refs:ResNo (Results 1 - 21 of 21) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenDAGPatterns.h478 MVT::SimpleValueType getKnownType(unsigned ResNo) const;
700 ValueTypeByHwMode getType(unsigned ResNo) const {
701 return Types[ResNo].getValueTypeByHwMode();
704 const TypeSetByHwMode &getExtType(unsigned ResNo) const {
705 return Types[ResNo];
707 TypeSetByHwMode &getExtType(unsigned ResNo) { return Types[ResNo]; } argument
708 void setType(unsigned ResNo, const TypeSetByHwMode &T) { Types[ResNo] = T; } argument
709 MVT::SimpleValueType getSimpleType(unsigned ResNo) cons
716 isTypeCompletelyUnknown(unsigned ResNo, TreePattern &TP) const argument
722 setResultIndex(unsigned ResNo, unsigned RI) argument
985 UpdateNodeType(unsigned ResNo, const TypeSetByHwMode &InTy, TreePattern &TP) argument
993 UpdateNodeType(unsigned ResNo, MVT::SimpleValueType InTy, TreePattern &TP) argument
1001 UpdateNodeType(unsigned ResNo, ValueTypeByHwMode InTy, TreePattern &TP) argument
[all...]
H A DCodeGenDAGPatterns.cpp1510 /// N, and the result number in ResNo.
1513 unsigned &ResNo) {
1516 ResNo = OpNo;
1543 unsigned ResNo = 0; // The result number being referenced. local
1544 TreePatternNode *NodeToApply = getOperandNum(OperandNo, N, NodeInfo, ResNo);
1550 return NodeToApply->UpdateNodeType(ResNo, VVT, TP);
1553 return NodeToApply->UpdateNodeType(ResNo, MVT::iPTR, TP);
1556 return TI.EnforceInteger(NodeToApply->getExtType(ResNo));
1559 return TI.EnforceFloatingPoint(NodeToApply->getExtType(ResNo));
1562 return TI.EnforceVector(NodeToApply->getExtType(ResNo));
1511 getOperandNum(unsigned OpNo, TreePatternNode *N, const SDNodeInfo &NodeInfo, unsigned &ResNo) argument
1647 UpdateNodeTypeFromInst(unsigned ResNo, Record *Operand, TreePattern &TP) argument
2127 getImplicitType(Record *R, unsigned ResNo, bool NotRegisters, bool Unnamed, TreePattern &TP) argument
2476 unsigned ResNo = NumResultsToAdd; local
[all...]
H A DDAGISelMatcherGen.cpp1075 for (unsigned ResNo = 0; ResNo < Pattern.getDstPattern()->getNumResults();
1076 ++ResNo) {
1077 Results[ResNo] = Ops[Pattern.getDstPattern()->getResultIndex(ResNo)];
H A DDAGISelMatcher.h493 unsigned ResNo; member in class:llvm::CheckTypeMatcher
496 : Matcher(CheckType), Type(type), ResNo(resno) {}
499 unsigned getResNo() const { return ResNo; }
H A DDAGISelMatcher.cpp182 OS.indent(indent) << "CheckType " << getEnumName(Type) << ", ResNo="
183 << ResNo << '\n';
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSDNodeDbgValue.h42 unsigned ResNo; ///< Valid for expressions. member in struct:llvm::SDDbgValue::__anon3576::__anon3577
64 u.s.ResNo = R;
101 /// Returns the ResNo for a register ref
102 unsigned getResNo() const { assert (kind==SDNODE); return u.s.ResNo; }
H A DLegalizeTypes.h225 /// input operand, except for the result 'ResNo', for which the corresponding
227 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
293 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
294 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
299 SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo);
325 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
338 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
339 SDValue PromoteIntRes_ADDSUBCARRY(SDNode *N, unsigned ResNo);
343 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
405 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
[all...]
H A DInstrEmitter.h42 void EmitCopyFromReg(SDNode *Node, unsigned ResNo,
H A DLegalizeVectorTypes.cpp36 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) { argument
37 LLVM_DEBUG(dbgs() << "Scalarize node result " << ResNo << ": "; N->dump(&DAG);
44 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
51 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
165 R = ScalarizeVecRes_OverflowOp(N, ResNo);
181 SetScalarizedVector(SDValue(N, ResNo), R);
239 unsigned ResNo) {
263 unsigned OtherNo = 1 - ResNo;
273 return SDValue(ScalarNode, ResNo);
277 unsigned ResNo) {
238 ScalarizeVecRes_OverflowOp(SDNode *N, unsigned ResNo) argument
276 ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) argument
808 SplitVectorResult(SDNode *N, unsigned ResNo) argument
1398 SplitVecRes_OverflowOp(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi) argument
2717 WidenVectorResult(SDNode *N, unsigned ResNo) argument
3213 WidenVecRes_OverflowOp(SDNode *N, unsigned ResNo) argument
3487 WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) argument
[all...]
H A DInstrEmitter.cpp88 EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone, bool IsCloned, argument
93 SDValue Op(Node, ResNo);
106 MVT VT = Node->getSimpleValueType(ResNo);
117 User->getOperand(2).getResNo() == ResNo) {
127 if (Op.getNode() != Node || Op.getResNo() != ResNo)
183 SDValue Op(Node, ResNo);
H A DLegalizeFloatTypes.cpp48 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { argument
49 LLVM_DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG);
56 dbgs() << "SoftenFloatResult #" << ResNo << ": ";
61 case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break;
66 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N, ResNo); break;
142 SetSoftenedFloat(SDValue(N, ResNo), R);
197 unsigned ResNo) {
198 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
235 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) { argument
1118 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) { argument
196 SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo) argument
2118 PromoteFloatResult(SDNode *N, unsigned ResNo) argument
2460 SoftPromoteHalfResult(SDNode *N, unsigned ResNo) argument
[all...]
H A DLegalizeTypesGeneric.cpp34 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo, argument
36 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
502 void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, argument
504 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
H A DScheduleDAGSDNodes.cpp122 unsigned ResNo = User->getOperand(2).getResNo(); local
128 if (ResNo >= II.getNumDefs() &&
129 II.ImplicitDefs[ResNo - II.getNumDefs()] == Reg)
135 TRI->getMinimalPhysRegClass(Reg, Def->getSimpleValueType(ResNo));
H A DLegalizeIntegerTypes.cpp37 void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) { argument
43 if (CustomLowerNode(N, N->getValueType(ResNo), true)) {
51 dbgs() << "PromoteIntegerResult #" << ResNo << ": ";
55 case ISD::MERGE_VALUES:Res = PromoteIntRes_MERGE_VALUES(N, ResNo); break;
143 case ISD::SSUBO: Res = PromoteIntRes_SADDSUBO(N, ResNo); break;
145 case ISD::USUBO: Res = PromoteIntRes_UADDSUBO(N, ResNo); break;
147 case ISD::UMULO: Res = PromoteIntRes_XMULO(N, ResNo); break;
152 case ISD::SUBCARRY: Res = PromoteIntRes_ADDSUBCARRY(N, ResNo); break;
190 Res = PromoteIntRes_AtomicCmpSwap(cast<AtomicSDNode>(N), ResNo);
212 SetPromotedInteger(SDValue(N, ResNo), Re
215 PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo) argument
259 PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo) argument
944 PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo) argument
1155 PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo) argument
1186 PromoteIntRes_ADDSUBCARRY(SDNode *N, unsigned ResNo) argument
1220 PromoteIntRes_XMULO(SDNode *N, unsigned ResNo) argument
1888 ExpandIntegerResult(SDNode *N, unsigned ResNo) argument
[all...]
H A DLegalizeTypes.cpp914 /// illegal ResNo in that case.
967 SDValue DAGTypeLegalizer::DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo) { argument
969 if (i != ResNo)
971 return SDValue(N->getOperand(ResNo));
H A DTargetLowering.cpp4476 unsigned ResNo = 0; // ResNo - The result number of the next output. local
4502 getSimpleValueType(DL, STy->getElementType(ResNo));
4504 assert(ResNo == 0 && "Asm only has one result!");
4507 ++ResNo;
H A DSelectionDAGBuilder.cpp8085 unsigned ResNo = 0; // ResNo - The result number of the next output. local
8124 DAG.getDataLayout(), STy->getElementType(ResNo));
8126 assert(ResNo == 0 && "Asm only has one result!");
8130 ++ResNo;
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h129 unsigned ResNo = 0; // Which return value of the node we are using. member in class:llvm::SDValue
136 unsigned getResNo() const { return ResNo; }
147 return Node == O.Node && ResNo == O.ResNo;
153 return std::tie(Node, ResNo) < std::tie(O.Node, O.ResNo);
212 /// Return true if there are no nodes using value ResNo of Node.
215 /// Return true if there is exactly one node using value ResNo of Node.
222 V.ResNo = -1U;
228 V.ResNo
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp294 unsigned ResNo = 0; // ResNo - The result number of the next output. local
334 TLI->getSimpleValueType(DL, STy->getElementType(ResNo));
336 assert(ResNo == 0 && "Asm only has one result!");
339 ++ResNo;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp14213 unsigned ResNo = UI.getUse().getResNo(); local
14215 if (ResNo == NumVecs)
14218 DCI.CombineTo(User, SDValue(VLDDup.getNode(), ResNo));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp[all...]

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