Searched refs:RegsToPass (Results 1 - 25 of 25) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16ISelLowering.h48 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
H A DMipsSEISelLowering.h69 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMips16ISelLowering.cpp410 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
489 RegsToPass.push_front(std::make_pair(V0Reg, Callee));
497 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee));
502 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal,
409 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
H A DMipsISelLowering.cpp3034 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
3051 RegsToPass.push_back(std::make_pair(GPReg, getGlobalReg(CLI.DAG, Ty)));
3060 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
3061 Chain = CLI.DAG.getCopyToReg(Chain, CLI.DL, RegsToPass[i].first,
3062 RegsToPass[i].second, InFlag);
3068 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
3069 Ops.push_back(CLI.DAG.getRegister(RegsToPass[i].first,
3070 RegsToPass[i].second.getValueType()));
3259 std::deque<std::pair<unsigned, SDValue>> RegsToPass; local
3283 passByValArg(Chain, DL, RegsToPass, MemOpChain
3033 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
4381 passByValArg( SDValue Chain, const SDLoc &DL, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo &MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, const CCValAssign &VA) const argument
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H A DMipsISelLowering.h501 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
587 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMipsSEISelLowering.cpp1164 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
1169 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal,
1163 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp257 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
284 // RegsToPass vector
286 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
314 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
315 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
316 RegsToPass[i].second, Glue);
339 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
340 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
341 RegsToPass[i].second.getValueType()));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp300 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
353 RegsToPass.push_back(std::make_pair(VE::SX12, Callee));
377 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
405 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
406 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first,
407 RegsToPass[i].second, InGlue);
414 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
415 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
416 RegsToPass[i].second.getValueType()));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp652 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
683 // Arguments that can be passed on register must be kept at RegsToPass
686 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
714 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) {
715 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first,
716 RegsToPass[I].second, InFlag);
747 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I)
748 Ops.push_back(DAG.getRegister(RegsToPass[I].first,
749 RegsToPass[I].second.getValueType()));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp776 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
867 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Part0));
871 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Part1));
899 // RegsToPass vector
902 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
906 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
931 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
932 Register Reg = toCallerWindow(RegsToPass[i].first);
933 Chain = DAG.getCopyToReg(Chain, dl, Reg, RegsToPass[i].second, InFlag);
955 for (unsigned i = 0, e = RegsToPass
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp355 SmallVector<std::pair<unsigned, SDValue>, MaxArgs> RegsToPass; local
381 // Push arguments into RegsToPass vector
383 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
393 for (auto &Reg : RegsToPass) {
419 for (auto &Reg : RegsToPass)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp822 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
847 // Arguments that can be passed on register must be kept at RegsToPass
850 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
888 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
889 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
890 RegsToPass[i].second, InFlag);
910 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
911 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
912 RegsToPass[i].second.getValueType()));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1139 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; local
1163 // RegsToPass vector
1165 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1188 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
1189 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
1190 RegsToPass[i].second, InFlag);
1213 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
1214 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
1215 RegsToPass[i].second.getValueType()));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp5524 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
5576 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
5577 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
5578 RegsToPass[i].second.getValueType()));
5605 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue,
5628 buildCallOperands(Ops, CFlags, dl, DAG, RegsToPass, Glue, Chain, Callee,
5865 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
5932 RegsToPass.push_back(std::make_pair(VA.getLocReg(), SVal.getValue(0)));
5935 RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(),
5938 RegsToPass
5521 buildCallOperands(SmallVectorImpl<SDValue> &Ops, PPCTargetLowering::CallFlags CFlags, const SDLoc &dl, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue, SDValue Chain, SDValue &Callee, int SPDiff, const PPCSubtarget &Subtarget) argument
5603 FinishCall( CallFlags CFlags, const SDLoc &dl, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue, SDValue Chain, SDValue CallSeqStart, SDValue &Callee, int SPDiff, unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, SmallVectorImpl<SDValue> &InVals, const CallBase *CB) const argument
6211 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
6794 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
7541 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
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H A DPPCISelLowering.h1145 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp432 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; local
493 // Arguments that can be passed on register must be kept at RegsToPass
496 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
521 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
522 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
523 RegsToPass[i].second, Glue);
538 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
539 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
540 RegsToPass[i].second, Glue);
567 for (unsigned i = 0, e = RegsToPass
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2247 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; local
2265 RegsToPass.push_back(std::make_pair(RegLo, Lo));
2279 RegsToPass.push_back(std::make_pair(RegHigh, Hi));
2321 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue));
2347 for (auto &Reg : RegsToPass) {
2355 validateCCReservedRegs(RegsToPass, MF);
2390 for (auto &Reg : RegsToPass)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1171 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
1208 // Arguments that can be passed on registers must be kept in the RegsToPass
1210 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1242 for (auto Reg : RegsToPass) {
1255 for (auto Reg : RegsToPass) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h709 SDValue &Arg, RegsToPassVector &RegsToPass,
H A DARMISelLowering.cpp2174 RegsToPassVector &RegsToPass,
2182 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id)));
2185 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id)));
2288 RegsToPassVector RegsToPass; local
2347 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i],
2352 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, VA, ArgLocs[++i],
2361 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i],
2375 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
2400 RegsToPass.push_back(std::make_pair(j, Load));
2441 for (unsigned i = 0, e = RegsToPass
2172 PassF64ArgInRegs(const SDLoc &dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVectorImpl<SDValue> &MemOpChains, ISD::ArgFlagsTy Flags) const argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h325 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
H A DSIISelLowering.cpp2547 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
2613 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg);
2683 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg);
2860 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
2870 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain);
2902 RegsToPass.emplace_back(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3, ScratchRSrcReg);
2938 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
3004 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain);
3013 for (auto &RegToPass : RegsToPass) {
3070 for (auto &RegToPass : RegsToPass) {
2543 passSpecialInputs( CallLoweringInfo &CLI, CCState &CCInfo, const SIMachineFunctionInfo &Info, SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue Chain) const argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1571 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass; local
1605 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue));
1646 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) {
1647 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first,
1648 RegsToPass[I].second, Glue);
1659 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I)
1660 Ops.push_back(DAG.getRegister(RegsToPass[I].first,
1661 RegsToPass[I].second.getValueType()));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4453 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; local
4462 RegsToPass.emplace_back(F.PReg, Val);
4541 std::find_if(RegsToPass.begin(), RegsToPass.end(),
4556 RegsToPass.emplace_back(VA.getLocReg(), Arg);
4638 for (auto &RegToPass : RegsToPass) {
4693 for (auto &RegToPass : RegsToPass)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2597 SmallVectorImpl<std::pair<Register, SDValue>> &RegsToPass, CCValAssign &VA,
2616 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo));
2617 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Hi));
3987 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass;
4069 Passv64i1ArgInRegs(dl, DAG, Arg, RegsToPass, VA, ArgLocs[++I], Subtarget);
4071 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
4086 RegsToPass.push_back(std::make_pair(ShadowReg, Arg));
4105 RegsToPass.push_back(std::make_pair(
4144 RegsToPass.push_back(std::make_pair(Register(X86::AL),
4153 RegsToPass
2595 Passv64i1ArgInRegs( const SDLoc &Dl, SelectionDAG &DAG, SDValue &Arg, SmallVectorImpl<std::pair<Register, SDValue>> &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, const X86Subtarget &Subtarget) argument
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