Searched refs:MCOI (Results 1 - 25 of 40) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h29 namespace MCOI { namespace in namespace:llvm
82 /// These are flags from the MCOI::OperandFlags enum.
95 return Flags & (1 << MCOI::LookupPtrRegClass);
100 bool isPredicate() const { return Flags & (1 << MCOI::Predicate); }
103 bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); }
106 bool isBranchTarget() const { return Flags & (1 << MCOI::BranchTarget); }
109 return OperandType >= MCOI::OPERAND_FIRST_GENERIC &&
110 OperandType <= MCOI::OPERAND_LAST_GENERIC;
115 return OperandType - MCOI::OPERAND_FIRST_GENERIC;
119 return OperandType >= MCOI
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsBaseInfo.h133 OPERAND_FIRST_MIPS_MEM_IMM = MCOI::OPERAND_FIRST_TARGET,
H A DMipsMCTargetDesc.cpp146 case MCOI::OPERAND_UNKNOWN:
147 case MCOI::OPERAND_IMMEDIATE: {
154 case MCOI::OPERAND_PCREL:
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCTargetDesc.h101 OPERAND_VPRED_R = MCOI::OPERAND_FIRST_TARGET,
H A DARMMCTargetDesc.cpp290 MCOI::OPERAND_PCREL)
328 MCOI::OPERAND_PCREL)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiMCTargetDesc.cpp102 MCOI::OPERAND_PCREL) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/Utils/
H A DRISCVBaseInfo.h76 OPERAND_FIRST_RISCV_IMM = MCOI::OPERAND_FIRST_TARGET,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h69 OPERAND_ROUNDING_CONTROL = MCOI::OPERAND_FIRST_TARGET,
1044 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
1049 Desc.getOperandConstraint(6, MCOI::TIED_TO) == 0)
1054 if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
1055 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1)
1059 if (NumOps == 9 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
1060 (Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1 ||
1061 Desc.getOperandConstraint(8, MCOI::TIED_TO) == 1))
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUMCTargetDesc.cpp125 MCOI::OPERAND_PCREL)
H A DAMDGPUInstPrinter.cpp571 case MCOI::OPERAND_IMMEDIATE:
612 case MCOI::OPERAND_UNKNOWN:
613 case MCOI::OPERAND_PCREL:
616 case MCOI::OPERAND_REGISTER:
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h366 SmallBitVector TypeIdxsCovered{MCOI::OPERAND_LAST_GENERIC -
367 MCOI::OPERAND_FIRST_GENERIC + 2};
368 SmallBitVector ImmIdxsCovered{MCOI::OPERAND_LAST_GENERIC_IMM -
369 MCOI::OPERAND_FIRST_GENERIC_IMM + 2};
374 (MCOI::OPERAND_LAST_GENERIC - MCOI::OPERAND_FIRST_GENERIC) &&
383 assert(ImmIdx <= (MCOI::OPERAND_LAST_GENERIC_IMM -
384 MCOI::OPERAND_FIRST_GENERIC_IMM) &&
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/Disassembler/
H A DWebAssemblyDisassembler.cpp206 case MCOI::OPERAND_IMMEDIATE: {
288 case MCOI::OPERAND_REGISTER:
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/
H A DWebAssemblyMCTargetDesc.h42 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp1192 const MCOperandInfo &MCOI = MCID.OpInfo[I]; local
1193 if (MCOI.OperandType != MCOI::OPERAND_REGISTER || I == OpNum)
1195 const TargetRegisterClass *RC = TRI->getRegClass(MCOI.RegClass);
1944 const MCOperandInfo &MCOI = MCID.OpInfo[I]; local
1946 // register (or frame index) operand if MCOI.RegClass contains a valid
1948 if (MCOI.OperandType == MCOI::OPERAND_MEMORY &&
1949 ((MCOI.RegClass != -1 && !Op.isReg() && !Op.isFI()) ||
1950 (MCOI
[all...]
H A DSystemZHazardRecognizer.cpp127 MID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1)
H A DSystemZShortenInst.cpp68 if (MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 &&
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineVerifier.cpp1570 const MCOperandInfo &MCOI = MCID.OpInfo[MONum]; local
1573 else if (!MO->isDef() && !MCOI.isOptionalDef())
1578 const MCOperandInfo &MCOI = MCID.OpInfo[MONum]; local
1584 if (MO->isDef() && !MCOI.isOptionalDef() && !MCID.variadicOpsAreDefs())
1591 if (MCOI.OperandType == MCOI::OPERAND_REGISTER &&
1594 if ((MCOI.OperandType == MCOI::OPERAND_IMMEDIATE ||
1595 MCOI.OperandType == MCOI
[all...]
H A DTargetInstrInfo.cpp198 MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) {
203 MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
H A DMachineInstr.cpp282 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO);
287 if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1)
1455 int ExpectedTiedIdx = MCID.getOperandConstraint(I, MCOI::TIED_TO);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIDefines.h127 OPERAND_REG_IMM_INT32 = MCOI::OPERAND_FIRST_TARGET,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp215 if (MCID.getOperandConstraint(I, MCOI::TIED_TO) != -1)
455 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
H A DScheduleDAGRRList.cpp1036 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
2823 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) {
3068 if (MCID.getOperandConstraint(j+NumRes, MCOI::TIED_TO) == -1)
H A DScheduleDAGFast.cpp256 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp159 int DefIdx = I.getDesc().getOperandConstraint(OpI, MCOI::TIED_TO);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp319 if (Desc.OpInfo[i].OperandType == MCOI::OPERAND_PCREL) {

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