/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCInstrDesc.h | 29 namespace MCOI { namespace in namespace:llvm 82 /// These are flags from the MCOI::OperandFlags enum. 95 return Flags & (1 << MCOI::LookupPtrRegClass); 100 bool isPredicate() const { return Flags & (1 << MCOI::Predicate); } 103 bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); } 106 bool isBranchTarget() const { return Flags & (1 << MCOI::BranchTarget); } 109 return OperandType >= MCOI::OPERAND_FIRST_GENERIC && 110 OperandType <= MCOI::OPERAND_LAST_GENERIC; 115 return OperandType - MCOI::OPERAND_FIRST_GENERIC; 119 return OperandType >= MCOI [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsBaseInfo.h | 133 OPERAND_FIRST_MIPS_MEM_IMM = MCOI::OPERAND_FIRST_TARGET,
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H A D | MipsMCTargetDesc.cpp | 146 case MCOI::OPERAND_UNKNOWN: 147 case MCOI::OPERAND_IMMEDIATE: { 154 case MCOI::OPERAND_PCREL:
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.h | 101 OPERAND_VPRED_R = MCOI::OPERAND_FIRST_TARGET,
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H A D | ARMMCTargetDesc.cpp | 290 MCOI::OPERAND_PCREL) 328 MCOI::OPERAND_PCREL)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiMCTargetDesc.cpp | 102 MCOI::OPERAND_PCREL) {
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/Utils/ |
H A D | RISCVBaseInfo.h | 76 OPERAND_FIRST_RISCV_IMM = MCOI::OPERAND_FIRST_TARGET,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86BaseInfo.h | 69 OPERAND_ROUNDING_CONTROL = MCOI::OPERAND_FIRST_TARGET, 1044 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) 1049 Desc.getOperandConstraint(6, MCOI::TIED_TO) == 0) 1054 if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && 1055 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1) 1059 if (NumOps == 9 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && 1060 (Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1 || 1061 Desc.getOperandConstraint(8, MCOI::TIED_TO) == 1))
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | AMDGPUMCTargetDesc.cpp | 125 MCOI::OPERAND_PCREL)
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H A D | AMDGPUInstPrinter.cpp | 571 case MCOI::OPERAND_IMMEDIATE: 612 case MCOI::OPERAND_UNKNOWN: 613 case MCOI::OPERAND_PCREL: 616 case MCOI::OPERAND_REGISTER:
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | LegalizerInfo.h | 366 SmallBitVector TypeIdxsCovered{MCOI::OPERAND_LAST_GENERIC - 367 MCOI::OPERAND_FIRST_GENERIC + 2}; 368 SmallBitVector ImmIdxsCovered{MCOI::OPERAND_LAST_GENERIC_IMM - 369 MCOI::OPERAND_FIRST_GENERIC_IMM + 2}; 374 (MCOI::OPERAND_LAST_GENERIC - MCOI::OPERAND_FIRST_GENERIC) && 383 assert(ImmIdx <= (MCOI::OPERAND_LAST_GENERIC_IMM - 384 MCOI::OPERAND_FIRST_GENERIC_IMM) &&
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/Disassembler/ |
H A D | WebAssemblyDisassembler.cpp | 206 case MCOI::OPERAND_IMMEDIATE: { 288 case MCOI::OPERAND_REGISTER:
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
H A D | WebAssemblyMCTargetDesc.h | 42 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 1192 const MCOperandInfo &MCOI = MCID.OpInfo[I]; local 1193 if (MCOI.OperandType != MCOI::OPERAND_REGISTER || I == OpNum) 1195 const TargetRegisterClass *RC = TRI->getRegClass(MCOI.RegClass); 1944 const MCOperandInfo &MCOI = MCID.OpInfo[I]; local 1946 // register (or frame index) operand if MCOI.RegClass contains a valid 1948 if (MCOI.OperandType == MCOI::OPERAND_MEMORY && 1949 ((MCOI.RegClass != -1 && !Op.isReg() && !Op.isFI()) || 1950 (MCOI [all...] |
H A D | SystemZHazardRecognizer.cpp | 127 MID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1)
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H A D | SystemZShortenInst.cpp | 68 if (MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 &&
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MachineVerifier.cpp | 1570 const MCOperandInfo &MCOI = MCID.OpInfo[MONum]; local 1573 else if (!MO->isDef() && !MCOI.isOptionalDef()) 1578 const MCOperandInfo &MCOI = MCID.OpInfo[MONum]; local 1584 if (MO->isDef() && !MCOI.isOptionalDef() && !MCID.variadicOpsAreDefs()) 1591 if (MCOI.OperandType == MCOI::OPERAND_REGISTER && 1594 if ((MCOI.OperandType == MCOI::OPERAND_IMMEDIATE || 1595 MCOI.OperandType == MCOI [all...] |
H A D | TargetInstrInfo.cpp | 198 MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { 203 MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
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H A D | MachineInstr.cpp | 282 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO); 287 if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1) 1455 int ExpectedTiedIdx = MCID.getOperandConstraint(I, MCOI::TIED_TO);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIDefines.h | 127 OPERAND_REG_IMM_INT32 = MCOI::OPERAND_FIRST_TARGET,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGSDNodes.cpp | 215 if (MCID.getOperandConstraint(I, MCOI::TIED_TO) != -1) 455 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
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H A D | ScheduleDAGRRList.cpp | 1036 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { 2823 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) { 3068 if (MCID.getOperandConstraint(j+NumRes, MCOI::TIED_TO) == -1)
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H A D | ScheduleDAGFast.cpp | 256 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | Utils.cpp | 159 int DefIdx = I.getDesc().getOperandConstraint(OpI, MCOI::TIED_TO);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.cpp | 319 if (Desc.OpInfo[i].OperandType == MCOI::OPERAND_PCREL) {
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