| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCOptAddrMode.cpp | 88 // to accomodate increment of register \p BaseReg by \p Incr
90 MachineOperand &Incr, unsigned BaseReg);
221 int64_t Incr; local
222 if (!isAddConstantOp(Add, Incr))
224 if (!isValidLoadStoreOffset(Incr))
251 fixPastUses(Uses, B, Incr);
343 MachineOperand &Incr, unsigned BaseReg) {
345 assert(Incr.isImm() && "Expected immediate increment");
346 int64_t NewOffset = Incr.getImm();
342 canFixPastUses(const ArrayRef<MachineInstr *> &Uses, MachineOperand &Incr, unsigned BaseReg) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 412 Register Incr = I->getOperand(2).getReg(); local
444 .addReg(Incr);
465 // and Incr, Incr, Mask
469 BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr).addReg(Incr).addReg(Mask);
472 // unsigned: sltu Scratch4, oldVal, Incr
473 // signed: slt Scratch4, oldVal, Incr
476 .addReg(Incr);
480 // selnez Scratch4, Incr, Scratch
634 Register Incr = I->getOperand(2).getReg(); local
[all...] |
| H A D | MipsISelLowering.cpp | 1560 Register Incr = MI.getOperand(2).getReg(); local
1601 Register IncrCopy = RegInfo.createVirtualRegister(RegInfo.getRegClass(Incr));
1603 BuildMI(*BB, II, DL, TII->get(Mips::COPY), IncrCopy).addReg(Incr);
1671 Register Incr = MI.getOperand(2).getReg(); local
1809 BuildMI(BB, DL, TII->get(Mips::SLLV), Incr2).addReg(Incr).addReg(ShiftAmt);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | IndVarSimplify.cpp | 270 auto *Incr = dyn_cast<BinaryOperator>(PN->getIncomingValue(BackEdge));
271 if (Incr == nullptr || Incr->getOpcode() != Instruction::FAdd) return false;
275 ConstantFP *IncValueVal = dyn_cast<ConstantFP>(Incr->getOperand(1));
277 if (IncValueVal == nullptr || Incr->getOperand(0) != PN ||
281 // Check Incr uses. One user is PN and the other user is an exit condition
283 Value::user_iterator IncrUse = Incr->user_begin();
285 if (IncrUse == Incr->user_end()) return false;
287 if (IncrUse != Incr->user_end()) return false;
414 Incr
[all...] |
| H A D | LoopStrengthReduce.cpp | 2135 BinaryOperator *Incr = local
2137 if (!Incr) continue;
2138 if (Incr->getOpcode() != Instruction::Add
2139 && Incr->getOpcode() != Instruction::Sub)
2144 if (Incr->getOperand(0) == PH)
2145 C = dyn_cast<ConstantInt>(Incr->getOperand(1));
2146 else if (Incr->getOperand(1) == PH)
2147 C = dyn_cast<ConstantInt>(Incr->getOperand(0));
2163 BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ?
2165 NewPH, CFP, "IV.S.next.", Incr);
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 194 Value *AlignedAddr, Value *Incr,
|
| H A D | RISCVISelLowering.cpp | 2904 IRBuilder<> &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr,
2915 Incr = Builder.CreateSExt(Incr, Builder.getInt64Ty());
2935 {AlignedAddr, Incr, Mask, SextShamt, Ordering});
2938 Builder.CreateCall(LrwOpScwLoop, {AlignedAddr, Incr, Mask, Ordering});
2903 emitMaskedAtomicRMWIntrinsic( IRBuilder< &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, Value *Mask, Value *ShiftAmt, AtomicOrdering Ord) const argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 538 int Incr; local
539 if (!HII->getIncrementValue(MJ, Incr))
543 if (!HII->isValidOffset(MI.getOpcode(), Offset+Incr, HRI))
546 MI.getOperand(OPI).setImm(Offset + Incr);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfUnit.cpp | 520 int Incr = (LittleEndian ? 1 : -1); local
525 for (; Start != Stop; Start += Incr)
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 1847 int incrementUnscheduledDeps(int Incr) { argument
1848 UnscheduledDeps += Incr;
1849 return FirstInBundle->UnscheduledDepsInBundle += Incr;
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 2626 int SubReg = 0, End = NumRegs, Incr = 1; local
2630 Incr = -1;
2633 for (; SubReg != End; SubReg += Incr) {
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| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1847 Value *AlignedAddr, Value *Incr,
1845 emitMaskedAtomicRMWIntrinsic(IRBuilder< &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, Value *Mask, Value *ShiftAmt, AtomicOrdering Ord) const argument
|