Searched refs:Div (Results 1 - 25 of 26) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DIntegerDivision.h34 /// Generate code to divide two integers, replacing Div with the generated
40 /// Replace Div with generated code.
41 bool expandDivision(BinaryOperator* Div);
57 /// Generate code to divide two integers, replacing Div with the generated
58 /// code. Uses ExpandDivision with a 32bit Div which makes it useful for
62 bool expandDivisionUpTo32Bits(BinaryOperator *Div);
64 /// Generate code to divide two integers, replacing Div with the generated
65 /// code. Uses ExpandDivision with a 64bit Div.
68 bool expandDivisionUpTo64Bits(BinaryOperator *Div);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp382 assert(!Rem->getType()->isVectorTy() && "Div over vectors not supported");
385 "Div of bitwidth other than 32 or 64 not supported");
426 /// Generate code to divide two integers, replacing Div with the generated
432 /// Replace Div with generated code.
433 bool llvm::expandDivision(BinaryOperator *Div) { argument
434 assert((Div->getOpcode() == Instruction::SDiv ||
435 Div->getOpcode() == Instruction::UDiv) &&
438 IRBuilder<> Builder(Div);
440 assert(!Div->getType()->isVectorTy() && "Div ove
583 expandDivisionUpTo32Bits(BinaryOperator *Div) argument
631 expandDivisionUpTo64Bits(BinaryOperator *Div) argument
[all...]
H A DScalarEvolutionExpander.cpp276 const SCEV *Div = SE.getConstant(CI); local
277 S = Div;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DDivRemPairs.cpp58 Instruction *Div; local
63 m_Instruction(Div)),
68 M.Key.SignedOp = Div->getOpcode() == Instruction::SDiv;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp318 BinaryOperator *Div = dyn_cast<BinaryOperator>(Op0); local
319 if (!Div || (Div->getOpcode() != Instruction::UDiv &&
320 Div->getOpcode() != Instruction::SDiv)) {
322 Div = dyn_cast<BinaryOperator>(Op1);
325 if (Div && Div->hasOneUse() &&
326 (Div->getOperand(1) == Y || Div->getOperand(1) == Neg) &&
327 (Div
[all...]
H A DInstCombineCompares.cpp2348 BinaryOperator *Div,
2357 if (!match(Div->getOperand(1), m_APInt(C2)))
2368 bool DivIsSigned = Div->getOpcode() == Instruction::SDiv;
2395 APInt RangeSize = Div->isExact() ? APInt(C2->getBitWidth(), 1) : *C2;
2436 if (Div->isExact())
2463 Value *X = Div->getOperand(0);
2472 ConstantInt::get(Div->getType(), LoBound));
2476 ConstantInt::get(Div->getType(), HiBound));
2485 ConstantInt::get(Div->getType(), LoBound));
2489 ConstantInt::get(Div
2347 foldICmpDivConstant(ICmpInst &Cmp, BinaryOperator *Div, const APInt &C) argument
[all...]
H A DInstCombineInternal.h971 Instruction *foldICmpDivConstant(ICmpInst &Cmp, BinaryOperator *Div,
/freebsd-13-stable/contrib/llvm-project/clang/include/clang/AST/
H A DStmtVisitor.h127 BINOP_FALLBACK(Mul) BINOP_FALLBACK(Div) BINOP_FALLBACK(Rem)
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCExpr.h486 Div, ///< Signed division.
536 return create(Div, LHS, RHS, Ctx);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DLoopCacheAnalysis.cpp373 const SCEV *Div = SE.getUDivExactExpr(AccessFn, ElemSize);
374 Subscripts.push_back(Div);
H A DBranchProbabilityInfo.cpp411 uint32_t Div = static_cast<uint32_t>( local
413 BP[I] = BranchProbability::getRaw(Div);
H A DScalarEvolution.cpp1606 if (auto *Div = dyn_cast<SCEVUDivExpr>(Op))
1607 return getUDivExpr(getZeroExtendExpr(Div->getLHS(), Ty, Depth + 1),
1608 getZeroExtendExpr(Div->getRHS(), Ty, Depth + 1));
3035 const SCEV *Div = getUDivExpr(Op, RHSC);
3036 if (!isa<SCEVUDivExpr>(Div) && getMulExpr(Div, RHSC) == Op) {
3039 Operands[i] = Div;
8161 if (const SCEVUDivExpr *Div = dyn_cast<SCEVUDivExpr>(V)) {
8162 const SCEV *LHS = getSCEVAtScope(Div->getLHS(), L);
8163 const SCEV *RHS = getSCEVAtScope(Div
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/
H A DMCExpr.cpp133 case MCBinaryExpr::Div: OS << '/'; break;
894 case MCBinaryExpr::Div:
904 if (ABE->getOpcode() == MCBinaryExpr::Div)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCodeGenPrepare.cpp948 Value *Div = Builder.CreateAdd(IQ, JQ); local
950 Value *Res = Div;
953 Value *Rem = Builder.CreateMul(Div, Den);
1266 for (BinaryOperator *Div : Div64ToExpand) {
1267 expandDivRem64(*Div);
H A DAMDGPUISelLowering.cpp1727 SDValue Div = DAG.getNode(ISD::ADD, DL, VT, iq, jq); local
1730 SDValue Rem = DAG.getNode(ISD::MUL, DL, VT, Div, RHS);
1737 Div = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Div, InRegSize);
1741 Div = DAG.getNode(ISD::AND, DL, VT, Div, TruncMask);
1745 return DAG.getMergeValues({ Div, Rem }, DL);
1909 SDValue Div = DAG.getSelectCC(DL, C3, Zero, Sel1, Mulhi3, ISD::SETNE); local
1914 Results.push_back(Div);
2062 SDValue Div local
2087 SDValue Div = DAG.getNode(ISD::FDIV, SL, VT, X, Y); local
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/IR/
H A DConstantFold.cpp1307 assert(!CI2->isZero() && "Div by zero handled above");
1310 assert(!CI2->isZero() && "Div by zero handled above");
1315 assert(!CI2->isZero() && "Div by zero handled above");
1318 assert(!CI2->isZero() && "Div by zero handled above");
2535 Constant *Div = ConstantExpr::getSDiv(CurrIdx, Factor); local
2539 Div->getType()->getScalarSizeInBits());
2544 Type *ExtendedTy = Type::getIntNTy(Div->getContext(), CommonExtendedWidth);
2555 if (!Div->getType()->isIntOrIntVectorTy(CommonExtendedWidth))
2556 Div = ConstantExpr::getSExt(Div, ExtendedT
[all...]
H A DAsmWriter.cpp1314 } else if (const PossiblyExactOperator *Div =
1316 if (Div->isExact())
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp6205 static bool ConvertOmodDiv(int64_t &Div) {
6206 if (Div == 1) {
6207 Div = 0;
6211 if (Div == 2) {
6212 Div = 3;
/freebsd-13-stable/contrib/llvm-project/clang/lib/CodeGen/
H A DTargetInfo.cpp6963 const unsigned Div = std::min<unsigned>(MaxSize, Alignment);
6964 llvm::Type *IntType = llvm::Type::getIntNTy(getVMContext(), Div);
6965 const uint64_t NumElements = (Size + Div - 1) / Div;
H A DCGExprScalar.cpp56 /// and signed BO_{Div,Rem}. For these opcodes, and for unsigned BO_{Div,Rem},
813 HANDLEBINOP(Div)
4761 COMPOUND_OP(Div);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/MCParser/
H A DAsmParser.cpp1554 Kind = MCBinaryExpr::Div;
1624 Kind = MCBinaryExpr::Div;
H A DMasmParser.cpp1742 Kind = MCBinaryExpr::Div;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp12009 Register Div = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); local
12010 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::DIVD : PPC::DIVW), Div)
12015 .addReg(Div)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp4140 // If the equivalent Div node also exists, update its users.
13312 SDValue Div = DAG.getNode(ISD::FDIV, SDLoc(N1), VT, Rsqrt, Y, Flags); local
13313 AddToWorklist(Div.getNode());
13314 return DAG.getNode(ISD::FMUL, DL, VT, N0, Div, Flags);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp17654 "Invalid opcode for Div/Rem lowering");
17672 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); local
17673 SDValue Mul = DAG.getNode(ISD::MUL, dl, VT, Div, Divisor);
17676 SDValue Values[2] = {Div, Rem};

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