/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ResourcePriorityQueue.cpp | 88 case ISD::CopyFromReg: NumberDeps++; break; 125 case ISD::CopyFromReg: break; 448 case ISD::CopyFromReg: 553 case ISD::CopyFromReg:
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H A D | StatepointLowering.cpp | 321 // get_return_value can either be a sequence of CopyFromReg instructions 330 while (CallEnd->getOpcode() == ISD::CopyFromReg) 1003 // different, and getValue() will use CopyFromReg of the wrong type, 1006 SDValue CopyFromReg = getCopyFromRegs(SI, RetTy); local 1008 assert(CopyFromReg.getNode()); 1009 setValue(&CI, CopyFromReg);
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H A D | ScheduleDAGRRList.cpp | 322 // Special handling for CopyFromReg of untyped values. 323 if (!Node->isMachineOpcode() && Node->getOpcode() == ISD::CopyFromReg) { 655 // FIXME: Nodes such as CopyFromReg probably should not advance the current 711 case ISD::CopyFromReg: 1279 if (N->getOpcode() == ISD::CopyFromReg) { 1280 // CopyFromReg has: "chain, Val, glue" so operand 1 gives the type. 2271 if (PN->getOpcode() == ISD::CopyFromReg) { 2355 /// CopyFromReg from a virtual register. 2362 PredSU->getNode()->getOpcode() == ISD::CopyFromReg) { 2397 // set isVRegCycle for its CopyFromReg operand [all...] |
H A D | InstrEmitter.cpp | 85 /// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an 340 // with CopyFromReg nodes, so don't emit kill flags for them. 346 Op.getNode()->getOpcode() != ISD::CopyFromReg && 919 // virtual registers, we emit a CopyFromReg for one of the implicitly 922 // 2. A CopyFromReg reading a physreg may be glued to this instruction. 947 if (F->getOpcode() == ISD::CopyFromReg) { 1018 case ISD::CopyFromReg: {
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H A D | ScheduleDAGSDNodes.cpp | 123 if (Def->getOpcode() == ISD::CopyFromReg && 552 if (Node->getOpcode() == ISD::CopyFromReg)
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H A D | ScheduleDAGFast.cpp | 428 if (N->getOpcode() == ISD::CopyFromReg) { 429 // CopyFromReg has: "chain, Val, glue" so operand 1 gives the type.
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H A D | SelectionDAGDumper.cpp | 172 case ISD::CopyFromReg: return "CopyFromReg";
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H A D | SelectionDAGBuilder.cpp | 1397 /// emit CopyFromReg of the specified type Ty. Return empty SDValue() otherwise. 1420 // to do this first, so that we don't create a CopyFromReg if we already 5349 case ISD::CopyFromReg: { 8844 if (HasDef && (CallEnd->getOpcode() == ISD::CopyFromReg)) 9435 assert((Op.getOpcode() != ISD::CopyFromReg || 9948 if (Res.getOpcode() == ISD::CopyFromReg && isSwiftErrorArg) { 9957 if (Res.getOpcode() == ISD::CopyFromReg) {
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H A D | SelectionDAGISel.cpp | 2783 case ISD::CopyFromReg:
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H A D | DAGCombiner.cpp | 1940 case ISD::CopyFromReg: 7621 bool IsCopyOrSelect = BinOpLHSVal.getOpcode() == ISD::CopyFromReg || 21898 case ISD::CopyFromReg: 21899 // Always forward past past CopyFromReg.
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H A D | TargetLowering.cpp | 91 // (We look for a CopyFromReg reading a virtual register that is used 94 if (Value->getOpcode() != ISD::CopyFromReg)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelDAGToDAG.cpp | 250 if (CopyFromRegOp->getOpcode() == ISD::CopyFromReg) { 300 SDValue CopyFromReg = local 303 OutOps.push_back(CopyFromReg);
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 189 /// CopyFromReg - This node indicates that the input value is a virtual or 192 CopyFromReg, enumerator in enum:llvm::ISD::NodeType
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H A D | SelectionDAG.h | 747 return getNode(ISD::CopyFromReg, dl, VTs, Ops); 757 return getNode(ISD::CopyFromReg, dl, VTs,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 392 // register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may 399 Opc != ISD::CopyFromReg;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 462 // CopyFromReg previous node to avoid duplicate copies. 465 if (SrcReg->getReg() == Reg && Chain->getOpcode() == ISD::CopyFromReg) 468 // But usually we'll create a new CopyFromReg for a different register. 792 // t4: i64,ch,glue = CopyFromReg t3, Register:i64 $sx0, t3:1
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 384 if (OtherOp->getOpcode() == ISD::CopyFromReg && 2221 RHS.getNode()->getOpcode() == ISD::CopyFromReg ||
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H A D | X86ISelLowering.cpp | 4463 if (Arg.getOpcode() == ISD::CopyFromReg) { 11278 // t2: v4i64,ch = CopyFromReg t0, Register:v4i64 %0 23209 // Exclude CopyFromReg to avoid partial register stalls. 23210 T1.getOpcode() != ISD::CopyFromReg && T2.getOpcode()!=ISD::CopyFromReg){ [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1305 // CopyFromReg previous node to avoid duplicate copies. 1308 if (SrcReg->getReg() == Reg && Chain->getOpcode() == ISD::CopyFromReg) 1311 // But usually we'll create a new CopyFromReg for a different register.
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 11476 assert(N->getOpcode() == ISD::CopyFromReg); 11483 } while (N->getOpcode() == ISD::CopyFromReg); 11491 case ISD::CopyFromReg:
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 3323 // of the CopyFromReg, or else we can't replace the CopyFromReg with 3338 if (Ptr.getOpcode() == ISD::CopyFromReg &&
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H A D | ARMISelLowering.cpp | 2718 if (Arg.getOpcode() == ISD::CopyFromReg) { 13426 // t2: f32,ch = CopyFromReg t0, Register:f32 %0 13432 Copy->getOpcode() == ISD::CopyFromReg) { 13435 DCI.DAG.getNode(ISD::CopyFromReg, SDLoc(N), N->getValueType(0), Ops);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 4239 return AddrOp.getOpcode() == ISD::CopyFromReg;
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