Searched refs:BasePtr (Results 1 - 25 of 46) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp66 BasePtr = Use64BitReg ? X86::RBX : X86::EBX;
71 BasePtr = X86::ESI;
552 Register BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); local
553 for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr))
663 return MRI->canReserveReg(BasePtr);
688 Register BasePtr = MI.getOperand(1).getReg();
693 BasePtr = getX86SubSuperRegister(BasePtr, 32);
697 TII->copyPhysReg(*MI.getParent(), II, MI.getDebugLoc(), NewDestReg, BasePtr,
729 Register BasePtr; local
[all...]
H A DX86RegisterInfo.h46 /// BasePtr - X86 physical register used as a base ptr in complex stack
49 unsigned BasePtr; member in class:llvm::final
136 Register getBaseRegister() const { return BasePtr; }
H A DX86FrameLowering.cpp1372 Register BasePtr = TRI->getBaseRegister();
1819 BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
1841 assert(UsedReg == BasePtr);
2372 // Spill the BasePtr if it's used.
2610 // Spill the BasePtr if it's used.
2612 Register BasePtr = TRI->getBaseRegister();
2614 BasePtr = getX86SubSuperRegister(BasePtr, 64);
2615 SavedRegs.set(BasePtr);
3335 Register BasePtr
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp115 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::R4 : MSP430::SP); local
136 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
153 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMVEGatherScatterLowering.cpp126 Value *tryCreateIncrementingGatScat(IntrinsicInst *I, Value *BasePtr,
132 Value *tryCreateIncrementingWBGatScat(IntrinsicInst *I, Value *BasePtr,
429 Value *BasePtr = checkGEP(Offsets, ResultTy, GEP, Builder); local
430 if (!BasePtr)
434 Value *Load = tryCreateIncrementingGatScat(I, BasePtr, Offsets, GEP, Builder);
439 BasePtr->getType()->getPointerElementType()->getPrimitiveSizeInBits(),
449 {ResultTy, BasePtr->getType(), Offsets->getType(), Mask->getType()},
450 {BasePtr, Offsets, Builder.getInt32(OriginalTy->getScalarSizeInBits()),
455 {ResultTy, BasePtr->getType(), Offsets->getType()},
456 {BasePtr, Offset
569 Value *BasePtr = checkGEP(Offsets, InputTy, GEP, Builder); local
601 tryCreateIncrementingGatScat( IntrinsicInst *I, Value *BasePtr, Value *Offsets, GetElementPtrInst *GEP, IRBuilder<> &Builder) argument
671 tryCreateIncrementingWBGatScat( IntrinsicInst *I, Value *BasePtr, Value *Offsets, unsigned TypeScale, IRBuilder<> &Builder) argument
[all...]
H A DARMBaseRegisterInfo.h99 /// BasePtr - ARM physical register used as a base ptr in complex stack
102 unsigned BasePtr = ARM::R6; member in class:llvm::ARMBaseRegisterInfo
180 Register getBaseRegister() const { return BasePtr; }
H A DARMBaseRegisterInfo.cpp200 markSuperRegs(Reserved, BasePtr);
237 markSuperRegs(Reserved, BasePtr);
447 return MRI->canReserveReg(BasePtr);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp267 Register BasePtr; local
268 int64_t Offset = (TFI->getFrameIndexReference(MF, FrameIndex, BasePtr) +
273 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false);
288 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
311 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
319 .addReg(BasePtr).addImm(HighOffset).addReg(0);
325 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCLoopInstrFormPrep.cpp256 static bool IsPtrInBounds(Value *BasePtr) { argument
257 Value *StrippedBasePtr = BasePtr;
503 Value *BasePtr = GetPointerOperand(MemI); local
504 assert(BasePtr && "No pointer operand");
508 BasePtr->getType()->getPointerAddressSpace());
567 cast<GetElementPtrInst>(PtrInc)->setIsInBounds(IsPtrInBounds(BasePtr));
574 if (PtrInc->getType() != BasePtr->getType())
576 PtrInc, BasePtr->getType(),
595 cast<GetElementPtrInst>(PtrInc)->setIsInBounds(IsPtrInBounds(BasePtr));
600 if (NewPHI->getType() != BasePtr
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H A DPPCISelLowering.cpp7986 SDValue BasePtr = LD->getBasePtr(); local
7991 BasePtr, MVT::i8, MMO);
8011 SDValue BasePtr = ST->getBasePtr(); local
8017 return DAG.getTruncStore(Chain, dl, Value, BasePtr, MVT::i8, MMO);
9946 SDValue BasePtr = LD->getBasePtr(); local
9948 BasePtr = DAG.getNode(ISD::ADD, dl, getPointerTy(DAG.getDataLayout()),
9949 BasePtr, DAG.getIntPtrConstant(Offset, dl));
9952 BasePtr, // BasePtr
10751 SDValue BasePtr local
10839 SDValue BasePtr = SN->getBasePtr(); local
15223 SDNode *BasePtr = Add->getOperand(0).getNode(); local
15239 SDNode *BasePtr = Add->getOperand(0).getNode(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DShadowStackGCLowering.cpp79 Type *Ty, Value *BasePtr, int Idx1,
82 Type *Ty, Value *BasePtr, int Idx1, int Idx2,
258 Value *BasePtr, int Idx,
264 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name);
272 IRBuilder<> &B, Type *Ty, Value *BasePtr,
276 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name);
256 CreateGEP(LLVMContext &Context, IRBuilder<> &B, Type *Ty, Value *BasePtr, int Idx, int Idx2, const char *Name) argument
271 CreateGEP(LLVMContext &Context, IRBuilder<> &B, Type *Ty, Value *BasePtr, int Idx, const char *Name) argument
H A DInterleavedLoadCombinePass.cpp870 Value *BasePtr; local
880 computePolynomialFromPointer(*LI->getPointerOperand(), Offset, BasePtr, DL);
883 Result.PV = BasePtr;
954 /// \param BasePtr pointer the polynomial is based on
957 Value *&BasePtr,
963 BasePtr = nullptr;
974 computePolynomialFromPointer(*CI.getOperand(0), Result, BasePtr, DL);
977 BasePtr = &Ptr;
991 BasePtr = GEP.getPointerOperand();
1009 BasePtr
956 computePolynomialFromPointer(Value &Ptr, Polynomial &Result, Value *&BasePtr, const DataLayout &DL) argument
[all...]
H A DMachineOperand.cpp969 const Value *BasePtr = V.get<const Value *>(); local
970 if (BasePtr == nullptr)
974 BasePtr, Align(1), APInt(DL.getPointerSizeInBits(), Offset + Size), DL);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp327 SDValue BasePtr = ST->getBasePtr(); local
330 if (isa<FrameIndexSDNode>(BasePtr) || isa<ConstantSDNode>(BasePtr) ||
331 BasePtr.isUndef()) {
335 const RegisterSDNode *RN = dyn_cast<RegisterSDNode>(BasePtr.getOperand(0));
341 int CST = (int)cast<ConstantSDNode>(BasePtr.getOperand(1))->getZExtValue();
346 SDValue Ops[] = {BasePtr.getOperand(0), Offset, ST->getValue(), Chain};
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFrameLowering.cpp241 Register BasePtr = MRI.createVirtualRegister(PtrRC); local
242 FI->setBasePointerVreg(BasePtr);
243 BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::COPY), BasePtr)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64StackTagging.cpp83 Value *BasePtr; member in class:__anon3875::InitializerBuilder
99 InitializerBuilder(uint64_t Size, const DataLayout *DL, Value *BasePtr, argument
102 : Size(Size), DL(DL), BasePtr(BasePtr), SetTagFn(SetTagFn),
234 Value *Ptr = BasePtr;
244 Value *Ptr = BasePtr;
253 Value *Ptr = BasePtr;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp424 SDValue BasePtr = LD->getBasePtr(); local
430 if (DAG.isBaseWithConstantOffset(BasePtr) &&
431 isWordAligned(BasePtr->getOperand(0), DAG)) {
432 SDValue NewBasePtr = BasePtr->getOperand(0);
433 Offset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue();
437 if (TLI.isGAPlusOffset(BasePtr.getNode(), GV, Offset) &&
440 BasePtr->getValueType(0));
448 DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain, BasePtr,
451 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr,
466 // Lower to a call to __misaligned_load(BasePtr)
498 SDValue BasePtr = ST->getBasePtr(); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/DebugInfo/CodeView/
H A DSymbolRecordMapping.cpp505 case EncodedFramePtrReg::BasePtr: return RegisterId::EBX;
513 case EncodedFramePtrReg::BasePtr: return RegisterId::R13;
539 return EncodedFramePtrReg::BasePtr;
551 return EncodedFramePtrReg::BasePtr;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopIdiomRecognize.cpp930 Value *BasePtr =
932 if (mayLoopAccessLocation(BasePtr, ModRefInfo::ModRef, CurLoop, BECount,
936 RecursivelyDeleteTriviallyDeadInstructions(BasePtr, TLI);
958 NewCall = Builder.CreateMemSet(BasePtr, SplatValue, NumBytes,
978 NewCall = Builder.CreateCall(MSP, {BasePtr, PatternPtr, NumBytes});
H A DLowerMatrixIntrinsics.cpp92 // Given an element pointer \p BasePtr to the start of a (sub) matrix, compute
132 Value *computeVectorAddr(Value *BasePtr, Value *VecIdx, Value *Stride, argument
139 unsigned AS = cast<PointerType>(BasePtr->getType())->getAddressSpace();
147 VecStart = BasePtr;
149 VecStart = Builder.CreateGEP(EltType, BasePtr, VecStart, "vec.gep");
739 /// Turns \p BasePtr into an elementwise pointer to \p EltType.
740 Value *createElementPtr(Value *BasePtr, Type *EltType, IRBuilder<> &Builder) { argument
741 unsigned AS = cast<PointerType>(BasePtr->getType())->getAddressSpace();
743 return Builder.CreatePointerCast(BasePtr, EltPtrType);
H A DSROA.cpp1379 /// This will return the BasePtr if that is valid, or build a new GEP
1381 static Value *buildGEP(IRBuilderTy &IRB, Value *BasePtr,
1384 return BasePtr;
1389 return BasePtr;
1391 return IRB.CreateInBoundsGEP(BasePtr->getType()->getPointerElementType(),
1392 BasePtr, Indices, NamePrefix + "sroa_idx");
1395 /// Get a natural GEP off of the BasePtr walking through Ty toward
1405 Value *BasePtr, Type *Ty, Type *TargetTy,
1409 return buildGEP(IRB, BasePtr, Indices, NamePrefix);
1412 unsigned OffsetSize = DL.getIndexTypeSizeInBits(BasePtr
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp1769 SDValue BasePtr = ST->getBasePtr();
1776 if (SelectDirectAddr(BasePtr, Addr)) {
1793 ? SelectADDRsi64(BasePtr.getNode(), BasePtr, Base, Offset)
1794 : SelectADDRsi(BasePtr.getNode(), BasePtr, Base, Offset)) {
1812 ? SelectADDRri64(BasePtr.getNode(), BasePtr, Base, Offset)
1813 : SelectADDRri(BasePtr.getNode(), BasePtr, Bas
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp4924 SDValue BasePtr = LD->getBasePtr(); local
4937 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
4972 BasePtr = DAG.getObjectPtrOffset(dl, BasePtr, Increment);
4979 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
4984 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
5071 SDValue BasePtr = LD->getBasePtr(); local
5084 DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, LD->getPointerInfo(),
5089 SDValue NewBasePtr = DAG.getObjectPtrOffset(dl, BasePtr, Offset);
5110 SDValue BasePtr local
5174 SDValue BasePtr = ST->getBasePtr(); local
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeView.h540 BasePtr = 3, member in class:llvm::codeview::CallingConvention::ClassOptions::FrameProcedureOptions::FunctionOptions::HfaKind::MemberAccess::MethodKind::MethodOptions::ModifierOptions::PointerKind::PointerMode::PointerOptions::PointerToMemberRepresentation::VFTableSlotKind::WindowsRTClassKind::ExportFlags::EncodedFramePtrReg
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp343 const DstOp &Dst, const SrcOp &BasePtr,
350 return buildLoad(Dst, BasePtr, *OffsetMMO);
352 LLT PtrTy = BasePtr.getLLTTy(*getMRI());
355 auto Ptr = buildPtrAdd(PtrTy, BasePtr, ConstOffset);
342 buildLoadFromOffset( const DstOp &Dst, const SrcOp &BasePtr, MachineMemOperand &BaseMMO, int64_t Offset) argument

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