Searched refs:getDef (Results 1 - 25 of 39) sorted by relevance

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/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenInstruction.cpp35 if (Init->getDef()->getName() != "outs")
47 if (Init->getDef()->getName() != "ins")
75 Record *Rec = Arg->getDef();
97 cast<DefInit>(MIOpInfo->getOperator())->getDef()->getName() != "ops")
518 return Constraint->getDef()->isSubClassOf("TypedOperand") &&
519 Constraint->getDef()->getValueAsBit(PropertyName);
536 Record *ResultRecord = ADI ? ADI->getDef() : nullptr;
538 if (ADI && ADI->getDef() == InstOpRec) {
553 if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand"))
554 ADI = ADI->getDef()
[all...]
H A DOptParserEmitter.cpp113 OS << getOptionName(*DI->getDef());
161 GroupFlags = DI->getDef()->getValueAsListInit("Flags");
162 OS << getOptionName(*DI->getDef());
169 OS << getOptionName(*DI->getDef());
194 << cast<DefInit>(I)->getDef()->getName();
198 << cast<DefInit>(I)->getDef()->getName();
H A DPseudoLoweringEmitter.cpp80 if (DI->getDef()->isSubClassOf("Register") ||
81 DI->getDef()->getName() == "zero_reg") {
83 OperandMap[BaseIdx + i].Data.Reg = DI->getDef();
92 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec)
94 "Pseudo operand type '" + DI->getDef()->getName() +
134 Record *Operator = OpDef->getDef();
H A DRegisterBankEmitter.cpp59 const Record &getDef() const { return TheDef; } function in class:__anon5937::RegisterBank
66 for (const auto &RCDef : getDef().getValueAsListOfDefs("RegisterClasses"))
307 PrintWarning(Bank.getDef().getLoc(), "Register bank names should be "
310 PrintNote(Bank.getDef().getLoc(), "RegisterBank was declared here");
H A DOptRSTEmitter.cpp45 OptionsByGroup[DI->getDef()->getValueAsString("Name")].push_back(Opts[i]);
H A DGICombinerEmitter.cpp201 const Record &getDef() const { return TheDef; } function in class:__anon5927::CombineRule
285 if (OpI->getDef()->getName() == Def)
296 if (OpI->getDef()->isSubClassOf(Cls))
297 return OpI->getDef();
310 if (OpI->getDef()->getName() == Name)
324 if (OpI->getDef()->isSubClassOf(Cls))
742 const Record &RuleDef = Rule->getDef();
869 PrintFatalError(Rule->getDef().getLoc(), "All rules must have a root");
993 Record *CombinerDef = RK.getDef(Combiner);
H A DCodeGenDAGPatterns.cpp1361 Record *R = DI->getDef();
1572 !static_cast<DefInit*>(NodeToApply->getLeafValue())->getDef()
1579 auto VVT = getValueTypeByHwMode(DI->getDef(), T.getHwModes());
1801 Op = DI->getDef();
1900 return ((DI->getDef() == NDI->getDef())
1961 cast<DefInit>(Val)->getDef()->getName() == "node")) {
2253 Rec = DI->getDef();
2270 if (DI && DI->getDef()->isSubClassOf("Operand")) {
2271 DagInit *MIOps = DI->getDef()
[all...]
H A DRISCVCompressInstEmitter.cpp209 if (DI->getDef()->isSubClassOf("Register")) {
211 if (!validateRegister(DI->getDef(), Inst.Operands[i].Rec))
214 "'Register: '" + DI->getDef()->getName() +
218 OperandMap[i].Data.Reg = DI->getDef();
225 if (!validateTypes(DI->getDef(), Inst.Operands[i].Rec, IsSourceInst))
229 DI->getDef()->getName() +
292 return Type1->getDef() == Type2->getDef();
H A DSearchableTableEmitter.cpp123 return Field.Enum->EntryMap[cast<DefInit>(I)->getDef()]->first;
130 return DI->getDef()->isSubClassOf("Intrinsic");
137 Intr = std::make_unique<CodeGenIntrinsic>(cast<DefInit>(I)->getDef());
232 Record *LHSr = cast<DefInit>(LHSI)->getDef();
233 Record *RHSr = cast<DefInit>(RHSI)->getDef();
248 auto LHSr = cast<DefInit>(LHSI)->getDef();
249 auto RHSr = cast<DefInit>(RHSI)->getDef();
529 Record *TypeRec = DI->getDef();
H A DCodeEmitterGen.cpp272 EncodingInfoByHwMode EBM(DI->getDef(), HWM);
369 EncodingInfoByHwMode EBM(DI->getDef(), HWM);
411 EncodingInfoByHwMode EBM(DI->getDef(), HWM);
H A DX86FoldTablesEmitter.cpp303 Record *AltRegInstRec = Records.getDef(AltRegInstStr);
649 Record *RegInstIter = Records.getDef(Entry.RegInstStr);
650 Record *MemInstIter = Records.getDef(Entry.MemInstStr);
H A DGlobalISelEmitter.cpp376 if (VDefInit->getDef()->isSubClassOf("RegisterOperand"))
377 return VDefInit->getDef()->getValueAsDef("RegClass");
378 if (VDefInit->getDef()->isSubClassOf("RegisterClass"))
379 return VDefInit->getDef();
1308 RC.getDef() == cast<RegisterBankOperandMatcher>(&B)->RC.getDef();
3511 &Target.getInstruction(RK.getDef("G_CONSTANT")));
3730 Record *CCDef = DI ? DI->getDef() : nullptr;
3820 auto *ChildRec = ChildDefInit->getDef();
3934 auto *ChildRec = ChildDefInit->getDef();
[all...]
H A DInstrDocsEmitter.cpp166 cast<DefInit>(Op.MIOperandInfo->getArg(SubOpIdx))->getDef();
H A DX86EVEX2VEXTablesEmitter.cpp208 Record *AltInstRec = Records.getDef(AltInstStr);
H A DInstrInfoEmitter.cpp131 auto *OpR = cast<DefInit>(MIOI->getArg(j))->getDef();
389 OperandRecords.push_back(cast<DefInit>(Arg)->getDef());
H A DFastISelEmitter.cpp261 Record *OpLeafRec = OpDI->getDef();
436 Record *OpLeafRec = cast<DefInit>(Op->getLeafValue())->getDef();
507 SubRegNo = getQualifiedName(SR->getDef());
/freebsd-12-stable/contrib/llvm-project/clang/utils/TableGen/
H A DClangOptionDocEmitter.cpp62 R = G->getDef();
73 Group = SkipFlattened(G->getDef());
79 Aliases[A->getDef()].push_back(R);
98 Group = SkipFlattened(G->getDef());
384 const Record *DocInfo = Records.getDef("GlobalDocumentation");
H A DClangSACheckersEmitter.cpp32 name = getPackageFullName(DI->getDef());
136 return isHidden(DI->getDef());
H A DClangDiagnosticsEmitter.cpp85 std::string CatName = getCategoryFromDiagGroup(Group->getDef(),
171 std::string GroupName = DI->getDef()->getValueAsString("GroupName");
227 const Record *NextDiagGroup = GroupInit->getDef();
246 const Record *NextDiagGroup = GroupInit->getDef();
382 const Record *GroupRec = Group->getDef();
401 if (groupInPedantic(Group->getDef()))
1228 const Record *GroupRec = Group->getDef();
1260 DiagsInGroup.find(DI->getDef()->getValueAsString("GroupName"));
1676 const Record *Documentation = Records.getDef("GlobalDocumentation");
H A DClangOpcodesEmitter.cpp74 for (auto *Type : TypeClass->getDef()->getValueAsListOfDefs("Types")) {
294 auto Cases = TypeClass->getDef()->getValueAsListOfDefs("Types");
H A DMveEmitter.cpp1025 return getType(Def->getDef(), Param);
1053 Record *Op = cast<DefInit>(D->getOperator())->getDef();
1119 Record *Op = cast<DefInit>(D->getOperator())->getDef();
1168 Record *TypeRec = cast<DefInit>(D->getArg(0))->getDef();
1232 Record *Rec = DI->getDef();
1311 if (TypeDI->getDef()->isSubClassOf("unpromoted"))
1323 Record *TypeRec = TypeDI->getDef();
1369 Record *MainOp = cast<DefInit>(CodeDag->getOperator())->getDef();
/freebsd-12-stable/contrib/llvm-project/llvm/lib/TableGen/
H A DSetTheory.cpp214 cast<DefInit>(Expr->getOperator())->getDef()->getRecords();
225 Record *Rec = Records.getDef(OS.str());
285 if (const RecVec *Result = expand(Def->getDef()))
287 Elts.insert(Def->getDef());
302 auto I = Operators.find(OpInit->getDef()->getName());
H A DJSONBackend.cpp81 obj["def"] = Def->getDef()->getName();
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DMemoryDependenceAnalysis.cpp219 return MemDepResult::getDef(Inst);
429 return MemDepResult::getDef(ClosestDependency);
436 MemDepResult::getDef(ClosestDependency), nullptr));
540 return MemDepResult::getDef(II);
587 return MemDepResult::getDef(Inst);
614 return MemDepResult::getDef(Inst);
655 return MemDepResult::getDef(Inst);
670 return MemDepResult::getDef(Inst);
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DMemoryDependenceAnalysis.h131 static MemDepResult getDef(Instruction *Inst) { function in class:llvm::MemDepResult

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