| /freebsd-12-stable/sys/cddl/dev/dtrace/arm/ |
| H A D | regset.h | 47 #define REG_SP R12
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiBaseInfo.h | 72 case Lanai::R12:
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 51 case R8: case R9: case R10: case R11: case R12:
63 case R8: case R9: case R10: case R11: case R12:
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| H A D | ARMFrameLowering.cpp | 423 case ARM::R12:
544 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ARM::R12)
550 .addReg(ARM::R12, RegState::Kill)
632 case ARM::R12:
665 case ARM::R12:
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| H A D | Thumb1FrameLowering.cpp | 276 case ARM::R12:
357 case ARM::R12: {
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430RegisterInfo.cpp | 54 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15,
60 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15,
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| H A D | MSP430ISelLowering.cpp | 460 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15
465 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15
783 unsigned R12 = MSP430::R12; local
785 Chain = DAG.getCopyToReg(Chain, dl, R12, Val, Flag);
787 RetOps.push_back(DAG.getRegister(R12, getPointerTy(DAG.getDataLayout())));
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| /freebsd-12-stable/contrib/gcc/config/rs6000/ |
| H A D | darwin-world.asm | 77 USES: R0 R11 R12 */
114 /* set R12 pointing at Vector Reg save area */
165 USES: R0 R10 R11 R12 and R7 R8
200 USES: R0 R11 R12 [R7/R8]
213 /* R12 := HAS_VEC */
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCFrameLowering.cpp | 159 StackSlotsUsedByFunclet = Last - ARC::R12;
271 StackSlotsUsedByFunclet = Last - ARC::R12;
373 for (unsigned Which = Last; Which > ARC::R12; Which--) {
386 if (I.getReg() > ARC::R12)
|
| /freebsd-12-stable/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/ |
| H A D | fastmath2_dlib_asm.S | 265 #define c8001 R12
272 #define mantal_ R12
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 354 Value *R11, *R12; local
356 if (decomposeBitTestICmp(R1, R2, PredR, R11, R12, R2)) {
359 D = R12;
360 } else if (R12 == L11 || R12 == L12 || R12 == L21 || R12 == L22) {
361 A = R12;
370 if (!match(R1, m_And(m_Value(R11), m_Value(R12)))) {
374 R12
[all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 168 {codeview::RegisterId::R12, X86::R12},
651 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
688 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
724 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
760 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
761 return X86::R12;
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| H A D | X86AsmBackend.cpp | 832 case X86::R12:
1003 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0
|
| H A D | X86BaseInfo.h | 1105 case X86::R12: case X86::R13: case X86::R14: case X86::R15:
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 158 Lanai::R12, Lanai::R13, Lanai::R14, Lanai::RCA, Lanai::R16, Lanai::R17,
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 597 - If MBB is an entry or exit block, set SR1 and SR2 to R0 and R12
601 - If the defaults (R0/R12) are available, return true
620 unsigned R12 = Subtarget.isPPC64() ? PPC::X12 : PPC::R12; local
628 *SR2 = R12;
631 // If MBB is an entry or exit block, use R0 and R12 as the scratch registers.
652 // Note that we only return here if both R0 and R12 are available because
655 if (!RS.isRegUsed(R0) && !RS.isRegUsed(R12))
837 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg
838 // ...(R12/X1
[all...] |
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 185 ENTRY(R12) \
203 ENTRY(R12) \
|
| /freebsd-12-stable/contrib/llvm-project/libunwind/src/ |
| H A D | UnwindCursor.hpp | 553 _msContext.R12 = r.getRegister(UNW_X86_64_R12);
607 _msContext.R12 = r.getRegister(UNW_ARM_R12);
673 case UNW_X86_64_R12: return _msContext.R12;
690 case UNW_ARM_R12: return _msContext.R12;
723 case UNW_X86_64_R12: _msContext.R12 = value; break;
740 case UNW_ARM_R12: _msContext.R12 = value; break;
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 115 ARC::R7, ARC::R8, ARC::R9, ARC::R10, ARC::R11, ARC::R12, ARC::R13,
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 60 R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, 0
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 88 MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15
|
| /freebsd-12-stable/sys/amd64/amd64/ |
| H A D | bpf_jit_machdep.h | 54 #define R12 4 macro
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 556 case MSP430::R12: return MSP430::R12B;
|
| /freebsd-12-stable/contrib/subversion/subversion/libsvn_subr/ |
| H A D | win32_crashrpt.c | 249 "R12=%016I64x R13=%016I64x R14=%016I64x R15=%016I64x\n",
250 context->R12, context->R13, context->R14, context->R15);
|
| /freebsd-12-stable/contrib/gdb/gdb/ |
| H A D | wince.c | 230 context_offset (R12),
361 context_offset (R12),
|