| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackendELF.h | 23 return createARMELFObjectWriter(OS, OSABI, isLittle());
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| H A D | ARMAsmBackend.h | 75 bool isLittle() const { return IsLittleEndian; } function in class:__anon2797::ARMAsmBackend
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| H A D | ARMAsmBackend.cpp | 1060 bool isLittle) {
1074 return new ARMAsmBackendELF(T, TheTriple, OSABI, isLittle);
1057 createARMAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TheTriple, StringRef CPU, bool isLittle) argument
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| /freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsTargetMachine.cpp | 49 bool isLittle) {
54 if (isLittle)
89 CodeGenOpt::Level OL, bool isLittle)
90 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
92 isLittle(isLittle), TLOF(make_unique<MipsTargetObjectFile>()),
94 Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this),
96 isLittle, *this),
98 isLittle, *this) {
159 I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle,
47 computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) argument
85 MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument
[all...] |
| H A D | MipsTargetMachine.h | 30 bool isLittle; member in class:llvm::MipsTargetMachine
44 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
67 bool isLittleEndian() const { return isLittle; }
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| H A D | MipsSubtarget.h | 218 bool isLittle() const { return IsLittle; } function in class:llvm::MipsSubtarget
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| H A D | MipsSEFrameLowering.cpp | 302 if (!Subtarget.isLittle())
350 int64_t Offset = 4 * (Subtarget.isLittle() ? N : (1 - N));
445 if (!STI.isLittle())
461 if (!STI.isLittle())
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| H A D | MipsISelLowering.cpp | 1242 if (Subtarget.isLittle()) {
1487 if (Subtarget.isLittle()) {
1889 if (!Subtarget.isLittle() && ArgSizeInBytes < ArgSlotSizeInBytes) {
2179 bool IsLittle = Subtarget.isLittle();
2300 return lowerUnalignedIntStore(SD, DAG, Subtarget.isLittle());
2368 if (ArgFlags.isInReg() && !Subtarget.isLittle()) {
2643 FirstByValReg, LastByValReg, Flags, Subtarget.isLittle(),
2664 if (!Subtarget.isLittle())
3010 if (!Subtarget.isLittle())
3680 unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle,
3675 passByValArg( SDValue Chain, SDLoc DL, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, const CCValAssign &VA) const argument
[all...] |
| H A D | MipsAsmPrinter.cpp | 504 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
507 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;
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| H A D | MipsSEISelDAGToDAG.cpp | 496 MinSizeInBits, !Subtarget->isLittle()))
897 !Subtarget->isLittle()))
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| H A D | MipsISelLowering.h | 471 const ISD::ArgFlagsTy &Flags, bool isLittle,
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| H A D | MipsSEISelLowering.cpp | 682 bool IsLittleEndian = !Subtarget.isLittle();
863 EltSize, !Subtarget.isLittle()) ||
1233 if (!Subtarget.isLittle())
1256 if (!Subtarget.isLittle())
1641 !Subtarget.isLittle());
1677 !Subtarget.isLittle());
2357 !Subtarget.isLittle()) && SplatBitSize <= 64) {
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| H A D | MipsFastISel.cpp | 1186 if (ArgSize < 8 && !Subtarget->isLittle())
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| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMTargetMachine.h | 36 bool isLittle; member in class:llvm::ARMBaseTargetMachine
43 CodeGenOpt::Level OL, bool isLittle);
48 bool isLittleEndian() const { return isLittle; }
68 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
103 bool isLittle);
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| H A D | ARMTargetMachine.cpp | 123 bool isLittle) {
127 if (isLittle)
180 CodeGenOpt::Level OL, bool isLittle)
181 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
185 Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) {
235 I = llvm::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle);
252 CodeGenOpt::Level OL, bool isLittle)
253 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) {
121 computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) argument
176 ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument
[all...] |
| H A D | ARMSubtarget.h | 451 bool isLittle() const { return IsLittle; } function in class:llvm::ARMSubtarget
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| H A D | ARMISelLowering.cpp | 1464 if (!Subtarget->isLittle())
1481 if (!Subtarget->isLittle())
1535 unsigned id = Subtarget->isLittle() ? 0 : 1;
2282 bool isLittleEndian = Subtarget->isLittle();
3050 if (!Subtarget->isLittle())
10742 if (Subtarget->hasNEON() && (AllowsUnaligned || Subtarget->isLittle())) {
12098 if (!Subtarget->isLittle())
12140 if (!Subtarget->isLittle())
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| /freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetMachine.h | 49 bool isLittle; member in class:llvm::AArch64TargetMachine
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| H A D | AArch64TargetMachine.cpp | 134 isLittle(LittleEndian) {
159 isLittle);
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| /freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCAsmBackend.cpp | 79 PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T), argument
80 IsLittleEndian(isLittle) {}
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| /freebsd-11.0-release/contrib/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 551 bool isLittle() const { return IsLittleEndian; } function in class:__anon2919::MipsAsmParser
3084 if (isLittle()) {
3155 if (isLittle()) {
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