/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | R600ClauseMergePass.cpp | 77 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::COUNT)).getImm(); 83 TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::Enabled)).getImm(); 124 if (LatrCFAlu->getOperand(Mode0Idx).getImm() && 125 RootCFAlu->getOperand(Mode0Idx).getImm() && 126 (LatrCFAlu->getOperand(KBank0Idx).getImm() != 127 RootCFAlu->getOperand(KBank0Idx).getImm() || 128 LatrCFAlu->getOperand(KBank0LineIdx).getImm() != 129 RootCFAlu->getOperand(KBank0LineIdx).getImm())) { 140 if (LatrCFAlu->getOperand(Mode1Idx).getImm() && 141 RootCFAlu->getOperand(Mode1Idx).getImm() [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMOptimizeBarriersPass.cpp | 66 if (MI.getOperand(0).getImm() == DMBType) { 71 DMBType = MI.getOperand(0).getImm(); 76 DMBType = MI.getOperand(0).getImm();
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/freebsd-11.0-release/contrib/llvm/lib/MC/ |
H A D | MCInstrAnalysis.cpp | 19 int64_t Imm = Inst.getOperand(0).getImm();
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/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | R600MCCodeEmitter.cpp | 100 uint32_t InstWord2 = MI.getOperand(2).getImm(); // Offset 109 int64_t Sampler = MI.getOperand(14).getImm(); 112 MI.getOperand(2).getImm(), 113 MI.getOperand(3).getImm(), 114 MI.getOperand(4).getImm(), 115 MI.getOperand(5).getImm() 118 MI.getOperand(6).getImm() & 0x1F, 119 MI.getOperand(7).getImm() & 0x1F, 120 MI.getOperand(8).getImm() & 0x1F 176 return MO.getImm(); [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/InstPrinter/ |
H A D | AMDGPUInstPrinter.cpp | 33 O << formatHex(MI->getOperand(OpNo).getImm() & 0xff); 38 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffff); 43 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffffffff); 48 O << formatDec(MI->getOperand(OpNo).getImm() & 0xff); 53 O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff); 58 if (MI->getOperand(OpNo).getImm()) 64 if (MI->getOperand(OpNo).getImm()) 70 if (MI->getOperand(OpNo).getImm()) 76 if (MI->getOperand(OpNo).getImm()) { 84 uint16_t Imm = MI->getOperand(OpNo).getImm(); [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/MSP430/InstPrinter/ |
H A D | MSP430InstPrinter.cpp | 39 O << Op.getImm(); 53 O << '#' << Op.getImm(); 82 O << Disp.getImm(); 92 unsigned CC = MI->getOperand(OpNo).getImm();
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 80 switch (MI->getOperand(0).getImm()) { 121 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm())); 132 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); 143 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm())); 152 if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { 158 << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())) << markup(">"); 181 MI->getOperand(3).getImm() == -4) { 210 MI->getOperand(4).getImm() == 4) { 305 MI->getOperand(0).getImm() == 0 && 327 O << markup("<imm:") << '#' << formatImm(Op.getImm()) << marku [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/X86/InstPrinter/ |
H A D | X86ATTInstPrinter.cpp | 75 int64_t Imm = MI->getOperand(Op).getImm(); 115 int64_t Imm = MI->getOperand(Op).getImm(); 131 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; 147 O << formatImm(Op.getImm()); 170 O << markup("<imm:") << '$' << formatImm((int64_t)Op.getImm()) 177 (Op.getImm() > 255 || Op.getImm() < -256)) 178 *CommentStream << format("imm = 0x%" PRIX64 "\n", (uint64_t)Op.getImm()); 204 int64_t DispVal = DispSpec.getImm(); 220 unsigned ScaleVal = MI->getOperand(Op + X86::AddrScaleAmt).getImm(); [all...] |
H A D | X86IntelInstPrinter.cpp | 56 int64_t Imm = MI->getOperand(Op).getImm(); 96 int64_t Imm = MI->getOperand(Op).getImm(); 112 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; 127 O << formatImm(Op.getImm()); 150 O << formatImm((int64_t)Op.getImm()); 160 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm(); 192 int64_t DispVal = DispSpec.getImm(); 245 O << formatImm(DispSpec.getImm()); 256 O << formatImm(MI->getOperand(Op).getImm() & 0xff);
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H A D | X86InstComments.cpp | 227 MI->getOperand(MI->getNumOperands() - 1).getImm(), 243 MI->getOperand(MI->getNumOperands() - 1).getImm(), 259 MI->getOperand(MI->getNumOperands() - 1).getImm(), 273 MI->getOperand(MI->getNumOperands() - 1).getImm(), 288 DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands() - 1).getImm(), 341 MI->getOperand(MI->getNumOperands() - 1).getImm(), 352 MI->getOperand(MI->getNumOperands() - 1).getImm(), 368 MI->getOperand(MI->getNumOperands() - 1).getImm(), 383 MI->getOperand(MI->getNumOperands() - 1).getImm(), 398 MI->getOperand(MI->getNumOperands() - 1).getImm(), [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/InstPrinter/ |
H A D | PPCInstPrinter.cpp | 60 unsigned char SH = MI->getOperand(2).getImm(); 61 unsigned char MB = MI->getOperand(3).getImm(); 62 unsigned char ME = MI->getOperand(4).getImm(); 93 unsigned char SH = MI->getOperand(2).getImm(); 94 unsigned char ME = MI->getOperand(3).getImm(); 116 unsigned char TH = MI->getOperand(0).getImm(); 159 unsigned Code = MI->getOperand(OpNo).getImm(); 255 unsigned int Value = MI->getOperand(OpNo).getImm(); 262 unsigned int Value = MI->getOperand(OpNo).getImm(); 269 unsigned int Value = MI->getOperand(OpNo).getImm(); [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/InstPrinter/ |
H A D | SystemZInstPrinter.cpp | 45 O << MO.getImm(); 65 int64_t Value = MI->getOperand(OpNum).getImm(); 72 int64_t Value = MI->getOperand(OpNum).getImm(); 139 uint64_t Value = MI->getOperand(OpNum).getImm(); 149 O.write_hex(MO.getImm()); 185 MI->getOperand(OpNum + 1).getImm(), 0, O); 191 MI->getOperand(OpNum + 1).getImm(), 198 uint64_t Disp = MI->getOperand(OpNum + 1).getImm(); 199 uint64_t Length = MI->getOperand(OpNum + 2).getImm(); 209 MI->getOperand(OpNum + 1).getImm(), [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 211 return static_cast<unsigned>(MO.getImm()); 222 ImmVal = static_cast<uint32_t>(MO.getImm()); 243 return MO.getImm(); 268 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && 270 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); 274 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12)); 296 return MO.getImm(); 318 return MO.getImm(); 334 unsigned SignExtend = MI.getOperand(OpIdx).getImm(); 335 unsigned DoShift = MI.getOperand(OpIdx + 1).getImm(); [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 38 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) && 39 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && 42 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) { 43 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) { 44 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) { 51 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) { 58 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 && 59 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) { 70 MI.getOperand(1).getImm() != 8) { 256 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm() [all...] |
H A D | ARMMCCodeEmitter.cpp | 194 ARM_AM::AMSubMode Mode = (ARM_AM::AMSubMode)MI.getOperand(OpIdx).getImm(); 294 unsigned SoImm = MO.getImm(); 322 return MO.getImm(); 329 unsigned SoImm = MI.getOperand(Op).getImm(); 362 return 64 - MI.getOperand(Op).getImm(); 543 return static_cast<unsigned>(MO.getImm()); 562 int32_t SImm = MO1.getImm(); 590 if (MO.isImm()) return MO.getImm(); 628 return encodeThumbBLOffset(MO.getImm()); 641 return encodeThumbBLOffset(MO.getImm()); [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/BPF/InstPrinter/ |
H A D | BPFInstPrinter.cpp | 59 O << (int32_t)Op.getImm(); 72 O << formatDec(OffsetOp.getImm()); 85 O << (uint64_t)Op.getImm();
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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 74 if (Op2.isImm() && Op2.getImm() == 0 && Op3.isImm()) { 77 switch (Op3.getImm()) { 113 int64_t immr = Op2.getImm(); 114 int64_t imms = Op3.getImm(); 144 if (Op2.getImm() > Op3.getImm()) { 147 << ", #" << (Is64Bit ? 64 : 32) - Op2.getImm() << ", #" << Op3.getImm() + 1; 155 << ", #" << Op2.getImm() << ", #" << Op3.getImm() [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 70 LowOffsetOp.setImm(LowOffsetOp.getImm() + 8); 78 unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm()); 79 unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm()); 95 OffsetMO.getImm()); 115 MI->getOperand(1).setImm(uint32_t(MI->getOperand(1).getImm())); 148 MI->getOperand(2).getImm()); 204 MI->getOperand(2).getImm() == 0 && 229 MI->getOperand(1).getImm() != 0 || 231 MI->getOperand(4).getImm() != 0) 235 int64_t Length = MI->getOperand(2).getImm(); [all...] |
H A D | SystemZAsmPrinter.cpp | 35 .addImm(MI->getOperand(1).getImm()); 40 .addImm(MI->getOperand(2).getImm()); 49 .addImm(MI->getOperand(1).getImm()); 54 .addImm(MI->getOperand(2).getImm()); 64 .addImm(MI->getOperand(3).getImm()) 65 .addImm(MI->getOperand(4).getImm()) 66 .addImm(MI->getOperand(5).getImm()); 89 .addImm(MI->getOperand(2).getImm()) 99 .addImm(MI->getOperand(2).getImm()) 156 .addImm(MI->getOperand(2).getImm()); [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/AsmParser/ |
H A D | PPCAsmParser.cpp | 390 int64_t getImm() const { function in struct:__anon2961::PPCOperand 447 bool isU1Imm() const { return Kind == Immediate && isUInt<1>(getImm()); } 448 bool isU2Imm() const { return Kind == Immediate && isUInt<2>(getImm()); } 449 bool isU3Imm() const { return Kind == Immediate && isUInt<3>(getImm()); } 450 bool isU4Imm() const { return Kind == Immediate && isUInt<4>(getImm()); } 451 bool isU5Imm() const { return Kind == Immediate && isUInt<5>(getImm()); } 452 bool isS5Imm() const { return Kind == Immediate && isInt<5>(getImm()); } 453 bool isU6Imm() const { return Kind == Immediate && isUInt<6>(getImm()); } 455 isUInt<6>(getImm()) && 456 (getImm() [all...] |
/freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | StackMaps.h | 72 MI->getOperand(getMetaIdx(NArgPos)).getImm(); 111 return MI->getOperand(NCallArgsPos).getImm() + MetaEnd; 115 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); } 119 return MI->getOperand(NBytesPos).getImm();
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/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/InstPrinter/ |
H A D | SparcInstPrinter.cpp | 68 MI->getOperand(2).getImm() == 8) { 118 O << (int)MO.getImm(); 141 if (MO.isImm() && MO.getImm() == 0) 152 int CC = (int)MI->getOperand(opNum).getImm();
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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ConditionOptimizer.cpp | 158 unsigned ShiftAmt = AArch64_AM::getShiftValue(I->getOperand(3).getImm()); 162 } else if (I->getOperand(2).getImm() << ShiftAmt >= 0xfff) { 238 const int OldImm = (int)CmpMI->getOperand(2).getImm(); 289 if (Cond[0].getImm() != -1) { 291 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); 365 const int HeadImm = (int)HeadCmpMI->getOperand(2).getImm(); 366 const int TrueImm = (int)TrueCmpMI->getOperand(2).getImm();
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/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonCopyToCombine.cpp | 145 bool NotExt = Op1.isImm() && isInt<8>(Op1.getImm()); 162 return !Op.isImm() || !isInt<N>(Op.getImm()); 554 .addImm(LoOperand.getImm()); 559 .addImm(HiOperand.getImm()) 570 .addImm(LoOperand.getImm()); 575 .addImm(HiOperand.getImm()) 585 .addImm(LoOperand.getImm()); 590 .addImm(HiOperand.getImm()) 600 .addImm(LoOperand.getImm()); 605 .addImm(HiOperand.getImm()) [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCCodeEmitter.cpp | 57 int64_t Shift = Inst.getOperand(2).getImm(); 96 int64_t pos = InstIn.getOperand(2).getImm(); 98 int64_t size = InstIn.getOperand(3).getImm(); 228 if (MO.isImm()) return MO.getImm() >> 2; 251 if (MO.isImm()) return MO.getImm() >> 1; 273 if (MO.isImm()) return MO.getImm() >> 1; 295 if (MO.isImm()) return MO.getImm() >> 1; 318 if (MO.isImm()) return MO.getImm() >> 2; 341 if (MO.isImm()) return MO.getImm() >> 2; 364 return MO.getImm() >> [all...] |