Searched refs:SrcReg2 (Results 1 - 17 of 17) sorted by relevance

/freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZElimCompare.cpp394 unsigned SrcReg2 = (Compare->getOperand(1).isReg() ? local
399 (SrcReg2 && MBBI->modifiesRegister(SrcReg2, TRI)))
425 // Clear any intervening kills of SrcReg and SrcReg2.
429 if (SrcReg2)
430 MBBI->clearRegisterKills(SrcReg2, TRI);
H A DSystemZInstrInfo.h155 unsigned &SrcReg2, int &Mask, int &Value) const override;
157 unsigned SrcReg2, int Mask, int Value,
H A DSystemZInstrInfo.cpp406 unsigned &SrcReg, unsigned &SrcReg2,
414 SrcReg2 = 0;
490 unsigned SrcReg, unsigned SrcReg2,
493 assert(!SrcReg2 && "Only optimizing constant comparisons so far");
405 analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const argument
489 optimizeCompareInstr(MachineInstr *Compare, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const argument
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h155 /// in SrcReg and SrcReg2, and the value it compares against in CmpValue.
158 unsigned &SrcReg2, int &CmpMask,
163 unsigned SrcReg2, int CmpMask, int CmpValue,
H A DAArch64InstrInfo.cpp649 /// in SrcReg and SrcReg2, and the value it compares against in CmpValue.
652 unsigned &SrcReg2, int &CmpMask,
671 SrcReg2 = MI->getOperand(2).getReg();
680 SrcReg2 = 0;
690 SrcReg2 = 0;
828 MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask,
856 if (CmpValue != 0 || SrcReg2 != 0)
2663 unsigned SrcReg2 = Root.getOperand(IdxOtherOpd).getReg();
2672 if (TargetRegisterInfo::isVirtualRegister(SrcReg2))
2673 MRI.constrainRegClass(SrcReg2, R
827 optimizeCompareInstr( MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const argument
[all...]
/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h252 unsigned &SrcReg, unsigned &SrcReg2,
256 unsigned SrcReg, unsigned SrcReg2,
H A DPPCFastISel.cpp860 unsigned SrcReg2 = 0; local
862 SrcReg2 = getRegForValue(SrcValue2);
863 if (SrcReg2 == 0)
875 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt))
877 SrcReg2 = ExtReg;
883 .addReg(SrcReg1).addReg(SrcReg2);
1247 unsigned SrcReg2 = getRegForValue(I->getOperand(1)); local
1248 if (SrcReg2 == 0) return false;
1252 std::swap(SrcReg1, SrcReg2);
1255 .addReg(SrcReg1).addReg(SrcReg2);
[all...]
H A DPPCInstrInfo.cpp1500 unsigned &SrcReg, unsigned &SrcReg2,
1511 SrcReg2 = 0;
1522 SrcReg2 = MI->getOperand(2).getReg();
1528 unsigned SrcReg, unsigned SrcReg2,
1629 if (SrcReg2 != 0)
1668 Instr.getOperand(2).getReg() == SrcReg2) ||
1669 (Instr.getOperand(1).getReg() == SrcReg2 &&
1715 ShouldSwap = SrcReg2 != 0 && Sub->getOperand(1).getReg() == SrcReg2 &&
1499 analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const argument
1527 optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const argument
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h252 /// in SrcReg and SrcReg2 if having two register operands, and the value it
256 unsigned &SrcReg2, int &CmpMask,
264 unsigned SrcReg2, int CmpMask, int CmpValue,
H A DARMFastISel.cpp1434 unsigned SrcReg2 = 0; local
1436 SrcReg2 = getRegForValue(Src2Value);
1437 if (SrcReg2 == 0) return false;
1445 SrcReg2 = ARMEmitIntExt(SrcVT, SrcReg2, MVT::i32, isZExt);
1446 if (SrcReg2 == 0) return false;
1453 SrcReg2 = constrainOperandRegClass(II, SrcReg2, 1);
1455 .addReg(SrcReg1).addReg(SrcReg2));
1772 unsigned SrcReg2 local
[all...]
H A DARMBaseInstrInfo.cpp2281 /// in SrcReg and SrcReg2 if having two register operands, and the value it
2285 analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, argument
2292 SrcReg2 = 0;
2299 SrcReg2 = MI->getOperand(1).getReg();
2306 SrcReg2 = 0;
2359 unsigned SrcReg2, int ImmValue,
2366 OI->getOperand(2).getReg() == SrcReg2) ||
2367 (OI->getOperand(1).getReg() == SrcReg2 &&
2389 optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, argument
2427 if (SrcReg2 !
2358 isRedundantFlagInstr(MachineInstr *CmpI, unsigned SrcReg, unsigned SrcReg2, int ImmValue, MachineInstr *OI) argument
[all...]
/freebsd-11.0-release/contrib/llvm/lib/Target/X86/
H A DX86InstrInfo.h501 /// in SrcReg and SrcReg2 if having two register operands, and the value it
505 unsigned &SrcReg2, int &CmpMask,
512 unsigned SrcReg2, int CmpMask, int CmpValue,
H A DX86InstrInfo.cpp2889 unsigned SrcReg2; local
2892 SrcReg2, isKill2, isUndef2, ImplicitOp2))
2902 NewMI = addRegReg(MIB, SrcReg, isKill, SrcReg2, isKill2);
2909 LV->replaceKillInstruction(SrcReg2, MI, NewMI);
4701 analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, argument
4713 SrcReg2 = 0;
4723 SrcReg2 = 0;
4732 SrcReg2 = MI->getOperand(2).getReg();
4744 SrcReg2 = 0;
4753 SrcReg2
4778 isRedundantFlagInstr(MachineInstr *FlagI, unsigned SrcReg, unsigned SrcReg2, int ImmValue, MachineInstr *OI) argument
4924 optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const argument
[all...]
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/
H A DPeepholeOptimizer.cpp565 unsigned SrcReg, SrcReg2; local
567 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) ||
569 (SrcReg2 != 0 && TargetRegisterInfo::isPhysicalRegister(SrcReg2)))
573 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) {
/freebsd-11.0-release/contrib/llvm/include/llvm/Target/
H A DTargetInstrInfo.h1092 /// in SrcReg and SrcReg2 if having two register operands, and the value it
1096 unsigned &SrcReg, unsigned &SrcReg2,
1105 unsigned SrcReg, unsigned SrcReg2,
1095 analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const argument
1104 optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const argument
/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h227 /// in SrcReg and SrcReg2 if having two register operands, and the value it
231 unsigned &SrcReg, unsigned &SrcReg2,
H A DHexagonInstrInfo.cpp1286 /// \p SrcReg and \p SrcReg2 if having two register operands, and the value it
1290 unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const {
1350 SrcReg2 = MI->getOperand(2).getReg();
1365 SrcReg2 = 0;
1289 analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const argument

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