Searched refs:Q2 (Results 1 - 17 of 17) sorted by relevance

/freebsd-11.0-release/lib/msun/src/
H A Ds_expm1f.c37 Q2 = 1.5807170421e-3; /* 0xcf3010.0p-33 */ variable
92 r1 = one+hxs*(Q1+hxs*Q2);
H A Ds_expm1.c42 * R1(z) ~ 1.0 + Q1*z + Q2*z**2 + Q3*z**3 + Q4*z**4 + Q5*z**5
44 * Q2 = 3.9682539681370365873E-4,
125 Q2 = 1.58730158725481460165e-03, /* 3F5A01A0 19FE5585 */ variable
186 r1 = one+hxs*(Q1+hxs*(Q2+hxs*(Q3+hxs*(Q4+hxs*Q5))));
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.h40 static const MCPhysReg QRegList[] = {AArch64::Q0, AArch64::Q1, AArch64::Q2,
H A DAArch64PBQPRegAlloc.cpp130 case AArch64::Q2:
H A DAArch64FastISel.cpp2858 { AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4,
H A DAArch64ISelLowering.cpp2605 AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3,
/freebsd-11.0-release/lib/msun/bsdsrc/
H A Db_tgamma.c104 #define Q2 -2.07474561943859936441469926649e-01 macro
254 q = Q0 +z*(Q1+z*(Q2+z*(Q3+z*(Q4+z*(Q5+z*(Q6+z*(Q7+z*Q8)))))));
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/
H A DARMCallingConv.h171 static const MCPhysReg QRegList[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3 };
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/InstPrinter/
H A DAArch64InstPrinter.cpp1178 case AArch64::Q1: Reg = AArch64::Q2; break;
1179 case AArch64::Q2: Reg = AArch64::Q3; break;
/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp100 SP::Q2, SP::Q10, ~0U, ~0U,
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp256 AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4,
436 AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4,
/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp132 Sparc::Q0, Sparc::Q1, Sparc::Q2, Sparc::Q3,
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp536 case ARM::Q0: case ARM::Q1: case ARM::Q2: case ARM::Q3:
/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp556 Hexagon::Q2, Hexagon::Q3};
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1043 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3,
1062 ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6,
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp1873 .Case("v2", AArch64::Q2)
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp3311 case ARM::Q2: return ARM::D4;

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