Searched refs:isSExt (Results 1 - 18 of 18) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMachineFunctionInfo.cpp49 return LiveIn.second.isSExt();
H A DPPCISelDAGToDAG.cpp4653 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; local
4656 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load");
4662 case MVT::i16: Opcode = isSExt ? PPC::LHAU : PPC::LHZU; break;
4668 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load");
4673 case MVT::i16: Opcode = isSExt ? PPC::LHAU8 : PPC::LHZU8; break;
4690 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; local
4693 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load");
4701 case MVT::i16: Opcode = isSExt ? PPC::LHAUX : PPC::LHZUX; break;
4707 assert((!isSExt || LoadedVT == MVT::i16 || LoadedVT == MVT::i32) &&
4712 case MVT::i32: Opcode = isSExt
[all...]
H A DPPCISelLowering.cpp3749 if (Flags.isSExt())
5748 Arg = DAG.getNode(Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
6081 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
6644 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
6922 LocInfo = ArgFlags.isSExt() ? CCValAssign::LocInfo::SExt
6993 if (Flags.isSExt())
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineFrameInfo.h180 bool isSExt = false; member in struct:llvm::MachineFrameInfo::StackObject
514 return Objects[ObjectIdx+NumFixedObjects].isSExt;
520 Objects[ObjectIdx+NumFixedObjects].isSExt = IsSExt;
H A DTargetCallingConv.h71 bool isSExt() const { return IsSExt; } function in struct:llvm::ISD::ArgFlagsTy
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp861 bool isSExt = false; local
865 isSExt = true;
879 if (isSExt) {
H A DARMFastISel.cpp2150 if (Outs[0].Flags.isZExt() || Outs[0].Flags.isSExt()) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp389 if (Flags.isSExt())
H A DMipsFastISel.cpp1759 if (Outs[0].Flags.isZExt() || Outs[0].Flags.isSExt()) {
H A DMipsISelLowering.cpp2876 if (ArgFlags.isSExt())
2888 if (ArgFlags.isSExt())
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp1523 StVal = DAG.getNode(Outs[OIdx].Flags.isSExt() ? ISD::SIGN_EXTEND
2612 unsigned Extend = Ins[InsIdx].Flags.isSExt() ? ISD::SIGN_EXTEND
2700 RetVal = DAG.getNode(Outs[i].Flags.isSExt() ? ISD::SIGN_EXTEND
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp1229 if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt())
1235 if (Outs[0].Flags.isSExt())
3260 if (Flags.isSExt())
H A DX86ISelLowering.cpp4455 Flags.isSExt() != MFI.isObjectSExt(FI)) {
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp382 if (ArgFlags.isSExt())
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp507 if (ArgFlags.isSExt())
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp863 bool isSExt; local
867 isSExt = false;
871 isSExt = true;
877 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3918 if (!Outs[0].Flags.isZExt() && !Outs[0].Flags.isSExt())
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp1453 if (Arg && (Arg->Flags.isSExt() || Arg->Flags.isZExt()) &&
2149 DAG, VT, MemVT, DL, Chain, Offset, Align, Ins[i].Flags.isSExt(), &Ins[i]);

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