/freebsd-11-stable/sys/compat/linuxkpi/common/include/linux/ |
H A D | cache.h | 34 #define cache_line_size() CACHE_LINE_SIZE macro
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/freebsd-11-stable/sys/dev/isci/scil/ |
H A D | intel_pci.h | 83 U8 cache_line_size; member in struct:sci_pci_common_header
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/freebsd-11-stable/contrib/ofed/libmlx5/ |
H A D | dbrec.c | 57 pp = ps / context->cache_line_size; 108 db = page->buf.buf + (i * 8 * sizeof(long) + j) * context->cache_line_size; 131 i = ((void *) db - page->buf.buf) / context->cache_line_size;
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H A D | mlx5-abi.h | 87 __u32 cache_line_size; member in struct:mlx5_alloc_ucontext_resp
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H A D | mlx5.c | 815 context->cache_line_size = resp.cache_line_size;
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H A D | mlx5.h | 242 int cache_line_size; member in struct:mlx5_context
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/freebsd-11-stable/sys/ofed/include/uapi/rdma/ |
H A D | mlx5-abi.h | 100 __u32 cache_line_size; member in struct:mlx5_ib_alloc_ucontext_resp
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Host/common/ |
H A D | NativeProcessProtocol.cpp | 671 static const size_t cache_line_size = local 683 cache_line_size - (curr_addr % cache_line_size);
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/freebsd-11-stable/sys/dev/mly/ |
H A D | mlyreg.h | 185 u_int8_t cache_line_size; /* see 8.4 */ member in struct:mly_param_controller 690 u_int8_t cache_line_size; /* see 8.4 */ member in struct:mly_ioctl_getlogdevinfovalid 916 u_int8_t cache_line_size; /* see 8.4 */ member in struct:mly_ldd
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/freebsd-11-stable/sys/dev/nxge/include/ |
H A D | xgehal-regs.h | 1191 u8 cache_line_size; // 0x0c member in struct:xge_hal_pci_config_le_t 1258 u8 cache_line_size; // 0x0c member in struct:xge_hal_pci_config_t 1314 u8 cache_line_size; // 0x0c
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/freebsd-11-stable/sys/dev/vxge/vxgehal/ |
H A D | vxgehal-regs.h | 50 u8 cache_line_size; /* 0x0c */ member in struct:vxge_hal_pci_config_le_t 96 u8 cache_line_size; /* 0x0c */ member in struct:vxge_hal_pci_config_t 131 u8 cache_line_size; /* 0x0c */
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H A D | vxgehal-mgmtaux.c | 210 __HAL_AUX_ENTRY("cache_line_size", 211 pci_config->cache_line_size, "0x%02X");
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/freebsd-11-stable/sys/dev/pms/freebsd/driver/ini/src/ |
H A D | agtiapi.c | 105 #define cache_line_size() CACHE_LINE_SIZE macro 5052 ccb_sz = roundup2(AGTIAPI_CCB_SIZE, cache_line_size()); 5053 hdr_sz = roundup2(sizeof(*hdr), cache_line_size()); 5177 ccb_sz = roundup2(AGTIAPI_CCB_SIZE, cache_line_size()); 5178 hdr_sz = roundup2(sizeof(*hdr), cache_line_size()); 5856 hdr_sz = roundup2(sizeof(*hdr), cache_line_size());
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Target/ |
H A D | Process.cpp | 1991 const size_t cache_line_size = m_memory_cache.GetMemoryCacheLineSize(); 1997 cache_line_size - (curr_addr % cache_line_size); 2039 const size_t cache_line_size = m_memory_cache.GetMemoryCacheLineSize(); 2045 cache_line_size - (curr_addr % cache_line_size);
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H A D | Target.cpp | 1843 const size_t cache_line_size = 512; local 1850 cache_line_size - (curr_addr % cache_line_size);
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/freebsd-11-stable/sys/dev/mlx4/mlx4_core/ |
H A D | mlx4_main.c | 269 if (cache_line_size() == 128 || cache_line_size() == 256) { 278 if (cache_line_size() != 32 && cache_line_size() != 64)
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H A D | mlx4_fw.c | 1883 (ilog2(cache_line_size()) - 4) << 5; 1934 dev->caps.eqe_size = cache_line_size(); 1935 dev->caps.cqe_size = cache_line_size();
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/freebsd-11-stable/sys/dev/nxge/xgehal/ |
H A D | xgehal-mgmtaux.c | 1164 __HAL_AUX_ENTRY("cache_line_size", 1165 pci_config.cache_line_size, "0x%02X");
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/freebsd-11-stable/sys/dev/qlnx/qlnxe/ |
H A D | ecore_dev.c | 2910 u32 val, wr_mbs, cache_line_size; local 2930 cache_line_size = OSAL_MIN_T(u32, OSAL_CACHE_LINE_SIZE, wr_mbs); 2931 switch (cache_line_size) { 2947 cache_line_size);
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/freebsd-11-stable/sys/dev/mlx5/mlx5_ib/ |
H A D | mlx5_ib_cq.c | 949 cqe_size = cache_line_size() == 128 ? 128 : 64;
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H A D | mlx5_ib_main.c | 1171 resp.cache_line_size = cache_line_size();
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