Searched refs:VA (Results 1 - 25 of 64) sorted by relevance

123

/freebsd-11-stable/contrib/gcc/
H A Dvarray.h200 /* Grow/shrink the virtual array VA to N elements. */
203 #define VARRAY_GROW(VA, N) ((VA) = varray_grow (VA, N))
205 #define VARRAY_SIZE(VA) ((VA)->num_elements)
207 #define VARRAY_ACTIVE_SIZE(VA) ((VA)->elements_used)
208 #define VARRAY_POP_ALL(VA) ((VA)
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp27 bool MipsCallLowering::MipsHandler::assign(Register VReg, const CCValAssign &VA, argument
29 if (VA.isRegLoc()) {
30 assignValueToReg(VReg, VA, VT);
31 } else if (VA.isMemLoc()) {
32 assignValueToAddress(VReg, VA);
96 void assignValueToReg(Register ValVReg, const CCValAssign &VA,
99 Register getStackAddress(const CCValAssign &VA,
102 void assignValueToAddress(Register ValVReg, const CCValAssign &VA) override;
113 void buildLoad(Register Val, const CCValAssign &VA) { argument
115 Register Addr = getStackAddress(VA, MM
136 assignValueToReg(Register ValVReg, const CCValAssign &VA, const EVT &VT) argument
180 getStackAddress(const CCValAssign &VA, MachineMemOperand *&MMO) argument
201 assignValueToAddress(Register ValVReg, const CCValAssign &VA) argument
250 assignValueToReg(Register ValVReg, const CCValAssign &VA, const EVT &VT) argument
287 getStackAddress(const CCValAssign &VA, MachineMemOperand *&MMO) argument
313 assignValueToAddress(Register ValVReg, const CCValAssign &VA) argument
321 extendRegister(Register ValReg, const CCValAssign &VA) argument
400 const CCValAssign &VA = ArgLocs[i]; local
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H A DMipsCallLowering.h46 bool assign(Register VReg, const CCValAssign &VA, const EVT &VT);
48 virtual Register getStackAddress(const CCValAssign &VA,
51 virtual void assignValueToReg(Register ValVReg, const CCValAssign &VA,
55 const CCValAssign &VA) = 0;
H A DMipsFastISel.cpp1156 CCValAssign &VA = ArgLocs[i]; local
1157 const Value *ArgVal = CLI.OutVals[VA.getValNo()];
1158 MVT ArgVT = OutVTs[VA.getValNo()];
1163 VA.convertToReg(Mips::F12);
1166 VA.convertToReg(Mips::D6_64);
1168 VA.convertToReg(Mips::D6);
1173 VA.convertToReg(Mips::F14);
1176 VA.convertToReg(Mips::D7_64);
1178 VA.convertToReg(Mips::D7);
1184 VA
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H A DMipsISelLowering.cpp3255 CCValAssign &VA = ArgLocs[i]; local
3256 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT();
3273 VA);
3279 switch (VA.getLocInfo()) {
3283 if (VA.isRegLoc()) {
3295 Register LocRegLo = VA.getLocReg();
3328 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits();
3330 ISD::SHL, DL, VA.getLocVT(), Arg,
3331 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA
3481 CCValAssign &VA = RVLocs[i]; local
3531 UnpackFromArgumentSlot(SDValue Val, const CCValAssign &VA, EVT ArgVT, const SDLoc &DL, SelectionDAG &DAG) argument
3624 CCValAssign &VA = ArgLocs[i]; local
3798 CCValAssign &VA = RVLocs[i]; local
4303 copyByValRegs( SDValue Chain, const SDLoc &DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, const Argument *FuncArg, unsigned FirstReg, unsigned LastReg, const CCValAssign &VA, MipsCCState &State) const argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp116 CCValAssign &VA) override {
117 assert(VA.isRegLoc() && "Value shouldn't be assigned to reg");
118 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?");
120 assert(VA.getValVT().getSizeInBits() <= 64 && "Unsupported value size");
121 assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size");
123 Register ExtReg = extendRegister(ValVReg, VA);
129 MachinePointerInfo &MPO, CCValAssign &VA) override {
133 Register ExtReg = extendRegister(ValVReg, VA);
135 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(),
144 CCValAssign VA variable
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp263 CCValAssign &VA = ArgLocs[i]; local
267 switch (VA.getLocInfo()) {
273 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
276 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
279 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
285 if (VA.isRegLoc()) {
286 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
288 assert(VA.isMemLoc() && "Must be register or memory argument.");
293 SDValue SOffset = DAG.getIntPtrConstant(VA.getLocMemOffset(), dl);
377 const CCValAssign &VA local
480 CCValAssign &VA = ArgLocs[i]; local
632 CCValAssign &VA = RVLocs[i]; local
660 CCValAssign &VA = RVLocs[i]; local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp292 CCValAssign &VA = ArgLocs[j];
293 assert(VA.getValNo() == i && "Location doesn't correspond to current arg");
295 if (VA.needsCustom()) {
304 MVT VAVT = VA.getValVT();
305 if (VA.isRegLoc()) {
317 VA = ArgLocs[j + Part];
318 Handler.assignValueToReg(Args[i].Regs[Part], VA.getLocReg(), VA);
329 Handler.assignValueToReg(NewReg, VA.getLocReg(), VA);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp234 CCValAssign &VA = RVLocs[i]; local
235 assert(VA.isRegLoc() && "Can only return in registers!");
239 if (VA.needsCustom()) {
240 assert(VA.getLocVT() == MVT::v2i32);
251 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Flag);
253 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
254 VA = RVLocs[++i]; // skip ahead to next loc
255 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part1,
258 Chain = DAG.getCopyToReg(Chain, DL, VA
317 CCValAssign &VA = RVLocs[i]; local
402 CCValAssign &VA = ArgLocs[i]; local
594 CCValAssign &VA = ArgLocs[i]; local
788 CCValAssign &VA = ArgLocs[i]; local
1049 const CCValAssign &VA = ArgLocs[i]; local
1302 CCValAssign &VA = RVLocs[i]; local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp226 for (auto &VA : ArgLocs) {
227 if (VA.isRegLoc()) {
229 EVT RegVT = VA.getLocVT();
241 RegInfo.addLiveIn(VA.getLocReg(), VReg);
246 if (VA.getLocInfo() == CCValAssign::SExt)
248 DAG.getValueType(VA.getValVT()));
249 else if (VA.getLocInfo() == CCValAssign::ZExt)
251 DAG.getValueType(VA.getValVT()));
253 if (VA.getLocInfo() != CCValAssign::Full)
254 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA
327 CCValAssign &VA = ArgLocs[i]; local
434 CCValAssign &VA = RVLocs[i]; local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp125 CCValAssign &VA) override {
137 unsigned ValSize = VA.getValVT().getSizeInBits();
138 unsigned LocSize = VA.getLocVT().getSizeInBits();
144 ExtReg = extendRegister(ValVReg, VA);
150 MachinePointerInfo &MPO, CCValAssign &VA) override {
151 Register ExtReg = extendRegister(ValVReg, VA);
153 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(),
250 MachinePointerInfo &MPO, CCValAssign &VA) override {
258 CCValAssign &VA) override {
261 switch (VA
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1611 CCValAssign VA = PendingLocs[0]; local
1615 return CC_RISCVAssign2XLen(XLen, State, VA, AF, ValNo, ValVT, LocVT,
1714 const CCValAssign &VA, const SDLoc &DL) {
1715 switch (VA.getLocInfo()) {
1721 if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) {
1725 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val);
1734 const CCValAssign &VA, const SDLoc &DL) {
1737 EVT LocVT = VA.getLocVT();
1757 RegInfo.addLiveIn(VA
1713 convertLocVTToValVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL) argument
1733 unpackFromRegLoc(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) argument
1766 convertValVTToLocVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL) argument
1788 unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) argument
1816 unpackF64OnRV32DSoftABI(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) argument
1956 CCValAssign &VA = ArgLocs[i]; local
2199 CCValAssign &VA = ArgLocs[i]; local
2444 CCValAssign &VA = RVLocs[i]; local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp457 CCValAssign &VA = ArgLocs[i]; local
458 if (VA.isRegLoc()) {
460 EVT RegVT = VA.getLocVT();
464 RegInfo.addLiveIn(VA.getLocReg(), VReg);
470 if (VA.getLocInfo() == CCValAssign::SExt)
472 DAG.getValueType(VA.getValVT()));
473 else if (VA.getLocInfo() == CCValAssign::ZExt)
475 DAG.getValueType(VA.getValVT()));
477 if (VA.getLocInfo() != CCValAssign::Full)
478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA
554 CCValAssign &VA = RVLocs[i]; local
658 CCValAssign &VA = ArgLocs[I]; local
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/freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-pdbutil/
H A DPrettyCompilandDumper.cpp194 uint64_t VA = Symbol.getVirtualAddress(); local
197 WithColor(Printer, PDB_ColorItem::Address).get() << format_hex(VA, 10);
202 << "[" << format_hex(VA, 10) << " - "
203 << format_hex(VA + Symbol.getLength(), 10) << "]";
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1068 const CCValAssign &VA = RVLocs[i]; local
1069 if (VA.isRegLoc()) {
1070 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(),
1075 assert(VA.isMemLoc());
1076 ResultMemLocs.push_back(std::make_pair(VA.getLocMemOffset(),
1143 CCValAssign &VA = ArgLocs[i]; local
1147 switch (VA.getLocInfo()) {
1151 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
1154 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA
1297 CCValAssign &VA = ArgLocs[i]; local
1470 CCValAssign &VA = RVLocs[i]; local
1498 CCValAssign &VA = RVLocs[i]; local
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/freebsd-11-stable/contrib/binutils/opcodes/
H A Dppc-opc.c478 /* The VA field in a VA, VX or VXR form instruction. */
479 #define VA UI + 1
482 /* The VB field in a VA, VX or VXR form instruction. */
483 #define VB VA + 1
486 /* The VC field in a VA form instruction. */
490 /* The VD or VS field in a VA, VX, VXR or X form instruction. */
504 /* The SHB field in a VA form instruction. */
1381 /* An VA form instruction. */
1384 /* The mask for an VA for
477 #define VA macro
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h135 CCValAssign &VA) = 0;
142 CCValAssign &VA) = 0;
155 Register extendRegister(Register ValReg, CCValAssign &VA);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp640 CCValAssign &VA = ArgLocs[i]; local
641 if (VA.isRegLoc()) {
643 EVT RegVT = VA.getLocVT();
655 RegInfo.addLiveIn(VA.getLocReg(), VReg);
661 if (VA.getLocInfo() == CCValAssign::SExt)
663 DAG.getValueType(VA.getValVT()));
664 else if (VA.getLocInfo() == CCValAssign::ZExt)
666 DAG.getValueType(VA.getValVT()));
668 if (VA.getLocInfo() != CCValAssign::Full)
669 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA
762 CCValAssign &VA = RVLocs[i]; local
828 CCValAssign &VA = ArgLocs[i]; local
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/freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-readobj/
H A DWin64EHDumper.cpp115 static std::error_code getSymbol(const COFFObjectFile &COFF, uint64_t VA, argument
121 if (*Address == VA) {
191 getSectionContaining(const COFFObjectFile &COFF, uint64_t VA) { argument
196 if (VA >= Address && (VA - Address) <= Size)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1066 for (CCValAssign &VA : ArgLocs) {
1069 if (VA.isRegLoc()) {
1070 EVT RegVT = VA.getLocVT();
1080 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
1089 switch (VA.getLocInfo()) {
1095 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue);
1099 DAG.getValueType(VA.getValVT()));
1100 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
1104 DAG.getValueType(VA.getValVT()));
1105 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA
1198 CCValAssign &VA = ArgLocs[AI]; local
1241 CCValAssign &VA = ArgLocs[Loc]; local
1401 CCValAssign &VA = RVLocs[i]; local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1393 CCValAssign &VA = ArgLocs[I]; local
1394 MVT ArgVT = ArgVTs[VA.getValNo()];
1399 !VA.isRegLoc() || VA.needsCustom())
1403 if (VA.getLocInfo() == CCValAssign::BCvt)
1431 CCValAssign &VA = ArgLocs[I]; local
1432 unsigned Arg = ArgRegs[VA.getValNo()];
1433 MVT ArgVT = ArgVTs[VA.getValNo()];
1436 switch (VA.getLocInfo()) {
1442 MVT DestVT = VA
1505 CCValAssign &VA = RVLocs[0]; local
1718 CCValAssign &VA = ValLocs[0]; local
1742 CCValAssign &VA = ValLocs[i]; local
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/freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-xray/
H A Dxray-graph.cpp397 const auto &VA = V.second; local
401 << (VA.SymbolName.size() > 40 ? VA.SymbolName.substr(0, 40) + "..."
402 : VA.SymbolName);
404 OS << "|" << VA.S.getString(VT) << "}\"";
410 std::sqrt(VA.S.getDouble(VC) / G.GraphVertexMax.getDouble(VC)))
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/DebugInfo/PDB/DIA/
H A DDIARawSymbol.h38 uint64_t VA) const override;
48 findInlineFramesByVA(uint64_t VA) const override;
57 findInlineeLinesByVA(uint64_t VA, uint32_t Length) const override;
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/DebugInfo/PDB/
H A DIPDBRawSymbol.h68 uint64_t VA) const = 0;
78 findInlineFramesByVA(uint64_t VA) const = 0;
87 findInlineeLinesByVA(uint64_t VA, uint32_t Length) const = 0;
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/DebugInfo/PDB/Native/
H A DNativeRawSymbol.h43 uint64_t VA) const override;
53 findInlineFramesByVA(uint64_t VA) const override;
62 findInlineeLinesByVA(uint64_t VA, uint32_t Length) const override;

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