/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZCallingConv.cpp | 1 //===-- SystemZCallingConv.cpp - Calling conventions for SystemZ ----------===// 14 const MCPhysReg SystemZ::ArgGPRs[SystemZ::NumArgGPRs] = { 15 SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D 18 const MCPhysReg SystemZ::ArgFPRs[SystemZ [all...] |
H A D | SystemZShortenInst.cpp | 32 return "SystemZ Instruction Shortening"; 81 (SystemZ::GRH32BitRegClass.contains(Reg) ? SystemZ::subreg_h32 82 : SystemZ::subreg_l32); 84 (thisSubRegIdx == SystemZ::subreg_l32 ? SystemZ::subreg_h32 85 : SystemZ::subreg_l32); 87 TRI->getMatchingSuperReg(Reg, thisSubRegIdx, &SystemZ::GR64BitRegClass); 93 if (SystemZ::isImmLL(Imm)) { 98 if (SystemZ [all...] |
H A D | SystemZInstrInfo.cpp | 1 //===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===// 9 // This file contains the SystemZ implementation of the TargetInstrInfo class. 15 #include "SystemZ.h" 59 : SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP), 81 HighRegOp.setReg(RI.getSubReg(HighRegOp.getReg(), SystemZ::subreg_h64)); 82 LowRegOp.setReg(RI.getSubReg(LowRegOp.getReg(), SystemZ::subreg_l64)); 125 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset); 141 bool IsHigh = SystemZ::isHighReg(Reg); 156 bool DestIsHigh = SystemZ [all...] |
H A D | SystemZAsmPrinter.cpp | 1 //===-- SystemZAsmPrinter.cpp - SystemZ LLVM assembly printer -------------===// 9 // Streams SystemZ assembly language and associated data, in the form of 131 case SystemZ::Return: 132 LoweredMI = MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D); 135 case SystemZ::CondReturn: 136 LoweredMI = MCInstBuilder(SystemZ::BCR) 139 .addReg(SystemZ::R14D); 142 case SystemZ::CRBReturn: 143 LoweredMI = MCInstBuilder(SystemZ [all...] |
H A D | SystemZLongBranch.cpp | 1 //===-- SystemZLongBranch.cpp - Branch lengthening for SystemZ ------------===// 34 // On SystemZ, long branches are only needed for functions bigger than 64k, 55 #include "SystemZ.h" 141 StringRef getPassName() const override { return "SystemZ Long Branch"; } 218 case SystemZ::J: 222 case SystemZ::BRC: 226 case SystemZ::BRCT: 227 case SystemZ::BRCTG: 231 case SystemZ::BRCTH: 235 case SystemZ [all...] |
H A D | SystemZElimCompare.cpp | 15 #include "SystemZ.h" 72 return "SystemZ Comparison Elimination"; 112 case SystemZ::LR: 113 case SystemZ::LGR: 114 case SystemZ::LGFR: 115 case SystemZ::LTR: 116 case SystemZ::LTGR: 117 case SystemZ::LTGFR: 118 case SystemZ::LER: 119 case SystemZ [all...] |
H A D | SystemZRegisterInfo.cpp | 1 //===-- SystemZRegisterInfo.cpp - SystemZ register information ------------===// 25 : SystemZGenRegisterInfo(SystemZ::R14D) {} 34 if (SystemZ::GR32BitRegClass.hasSubClassEq(RC) || 35 MO.getSubReg() == SystemZ::subreg_l32 || 36 MO.getSubReg() == SystemZ::subreg_hl32) 37 return &SystemZ::GR32BitRegClass; 38 if (SystemZ::GRH32BitRegClass.hasSubClassEq(RC) || 39 MO.getSubReg() == SystemZ::subreg_h32 || 40 MO.getSubReg() == SystemZ::subreg_hh32) 41 return &SystemZ [all...] |
H A D | SystemZTDC.cpp | 46 #include "SystemZ.h" 116 "SystemZ Test Data Class optimization", false, false) 161 SystemZ::TDCMASK_ZERO, // eq 162 SystemZ::TDCMASK_POSITIVE, // gt 163 SystemZ::TDCMASK_NEGATIVE, // lt 164 SystemZ::TDCMASK_NAN, // un 167 SystemZ::TDCMASK_INFINITY_PLUS, // eq 169 (SystemZ::TDCMASK_ZERO | 170 SystemZ::TDCMASK_NEGATIVE | 171 SystemZ [all...] |
H A D | SystemZMachineFunctionInfo.h | 1 //=== SystemZMachineFunctionInfo.h - SystemZ machine function info -*- C++ -*-// 16 namespace SystemZ { namespace in namespace:llvm 30 SystemZ::GPRRegs SpillGPRRegs; 31 SystemZ::GPRRegs RestoreGPRRegs; 49 SystemZ::GPRRegs getSpillGPRRegs() const { return SpillGPRRegs; } 59 SystemZ::GPRRegs getRestoreGPRRegs() const { return RestoreGPRRegs; }
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H A D | SystemZFrameLowering.cpp | 1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===// 27 { SystemZ::R2D, 0x10 }, 28 { SystemZ::R3D, 0x18 }, 29 { SystemZ::R4D, 0x20 }, 30 { SystemZ::R5D, 0x28 }, 31 { SystemZ::R6D, 0x30 }, 32 { SystemZ::R7D, 0x38 }, 33 { SystemZ::R8D, 0x40 }, 34 { SystemZ::R9D, 0x48 }, 35 { SystemZ [all...] |
H A D | SystemZRegisterInfo.h | 1 //===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===// 12 #include "SystemZ.h" 22 namespace SystemZ { namespace in namespace:llvm 35 if (SystemZ::GRH32BitRegClass.contains(Reg)) 37 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32"); 40 } // end namespace SystemZ 52 return &SystemZ::ADDR64BitRegClass;
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H A D | SystemZISelLowering.cpp | 1 //===-- SystemZISelLowering.cpp - SystemZ DAG lowering implementation -----===// 87 addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass); 89 addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass); 90 addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass); 92 addRegisterClass(MVT::f32, &SystemZ::VR32BitRegClass); 93 addRegisterClass(MVT::f64, &SystemZ::VR64BitRegClass); 95 addRegisterClass(MVT::f32, &SystemZ::FP32BitRegClass); 96 addRegisterClass(MVT::f64, &SystemZ::FP64BitRegClass); 99 addRegisterClass(MVT::f128, &SystemZ::VR128BitRegClass); 101 addRegisterClass(MVT::f128, &SystemZ [all...] |
H A D | SystemZPostRewrite.cpp | 16 #include "SystemZ.h" 24 #define SYSTEMZ_POSTREWRITE_NAME "SystemZ Post Rewrite pass" 91 bool DestIsHigh = SystemZ::isHighReg(DestReg); 92 bool SrcIsHigh = SystemZ::isHighReg(SrcReg); 113 bool DestIsHigh = SystemZ::isHighReg(DestReg); 114 bool Src1IsHigh = SystemZ::isHighReg(Src1Reg); 115 bool Src2IsHigh = SystemZ::isHighReg(Src2Reg); 123 TII->get(SystemZ::COPY), DestReg) 130 TII->get(SystemZ::COPY), DestReg) 193 BuildMI(&MBB, DL, TII->get(SystemZ [all...] |
H A D | SystemZLDCleanup.cpp | 36 return "SystemZ Local Dynamic TLS Access Clean-up"; 95 case SystemZ::TLS_LDCALL: 120 TII->get(TargetOpcode::COPY), SystemZ::R2D) 135 *TLSBaseAddrReg = RegInfo.createVirtualRegister(&SystemZ::GR64BitRegClass); 141 .addReg(SystemZ::R2D);
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H A D | SystemZISelDAGToDAG.cpp | 1 //===-- SystemZISelDAGToDAG.cpp - A dag to dag inst selector for SystemZ --===// 9 // This file defines an instruction selector for the SystemZ target. 363 return "SystemZ DAG->DAG Pattern Instruction Selection"; 777 if (RxSBG.Opcode == SystemZ::RNSBG) 787 if (RxSBG.Opcode == SystemZ::RNSBG) 810 if (RxSBG.Opcode != SystemZ::RNSBG) 851 if (RxSBG.Opcode != SystemZ::RNSBG) { 890 if (RxSBG.Opcode == SystemZ::RNSBG) { 917 if (RxSBG.Opcode == SystemZ::RNSBG || Opcode == ISD::SRA) { 946 return CurDAG->getTargetInsertSubreg(SystemZ [all...] |
H A D | SystemZCallingConv.h | 1 //===-- SystemZCallingConv.h - Calling conventions for SystemZ --*- C++ -*-===// 17 namespace SystemZ { namespace in namespace:llvm 23 } // end namespace SystemZ 110 unsigned Reg = State.AllocateReg(SystemZ::ArgGPRs);
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H A D | SystemZSelectionDAGInfo.cpp | 1 //===-- SystemZSelectionDAGInfo.cpp - SystemZ SelectionDAG Info -----------===// 173 DAG.getConstant(30 - SystemZ::IPM_CC, DL, MVT::i32)); 214 DAG.getTargetConstant(SystemZ::CCMASK_SRST, DL, MVT::i32), 215 DAG.getTargetConstant(SystemZ::CCMASK_SRST_FOUND, DL, MVT::i32), CCReg};
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCTargetDesc.cpp | 1 //===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===// 32 SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L, 33 SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L, 34 SystemZ [all...] |
H A D | SystemZMCObjectWriter.cpp | 1 //===-- SystemZMCObjectWriter.cpp - SystemZ ELF writer --------------------===// 59 case SystemZ::FK_390_PC12DBL: return ELF::R_390_PC12DBL; 60 case SystemZ::FK_390_PC16DBL: return ELF::R_390_PC16DBL; 61 case SystemZ::FK_390_PC24DBL: return ELF::R_390_PC24DBL; 62 case SystemZ::FK_390_PC32DBL: return ELF::R_390_PC32DBL; 90 case SystemZ::FK_390_TLS_CALL: return ELF::R_390_TLS_LDCALL; 100 case SystemZ::FK_390_TLS_CALL: return ELF::R_390_TLS_GDCALL; 108 case SystemZ::FK_390_PC12DBL: return ELF::R_390_PLT12DBL; 109 case SystemZ::FK_390_PC16DBL: return ELF::R_390_PLT16DBL; 110 case SystemZ [all...] |
H A D | SystemZMCFixups.h | 1 //===-- SystemZMCFixups.h - SystemZ-specific fixup entries ------*- C++ -*-===// 15 namespace SystemZ { namespace in namespace:llvm 28 } // end namespace SystemZ
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H A D | SystemZMCAsmBackend.cpp | 1 //===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===// 28 case SystemZ::FK_390_PC12DBL: 29 case SystemZ::FK_390_PC16DBL: 30 case SystemZ::FK_390_PC24DBL: 31 case SystemZ::FK_390_PC32DBL: 34 case SystemZ::FK_390_TLS_CALL: 50 return SystemZ::NumTargetFixupKinds; 68 llvm_unreachable("SystemZ does do not have assembler relaxation"); 80 const static MCFixupKindInfo Infos[SystemZ::NumTargetFixupKinds] = {
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H A D | SystemZMCCodeEmitter.cpp | 1 //===-- SystemZMCCodeEmitter.cpp - Convert SystemZ code to machine code ---===// 106 SystemZ::FK_390_PC16DBL, 2, false); 112 SystemZ::FK_390_PC32DBL, 2, false); 118 SystemZ::FK_390_PC16DBL, 2, true); 124 SystemZ::FK_390_PC32DBL, 2, true); 130 SystemZ::FK_390_PC12DBL, 1, false); 136 SystemZ::FK_390_PC16DBL, 4, false); 142 SystemZ::FK_390_PC24DBL, 3, false); 295 (MCFixupKind)SystemZ::FK_390_TLS_CALL));
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/ |
H A D | SystemZAsmParser.cpp | 1 //===-- SystemZAsmParser.cpp - Parse SystemZ assembly instructions --------===// 585 { "e", SystemZ::InsnE, 1, 587 { "ri", SystemZ::InsnRI, 3, 589 { "rie", SystemZ::InsnRIE, 4, 591 { "ril", SystemZ::InsnRIL, 3, 593 { "rilu", SystemZ::InsnRILU, 3, 595 { "ris", SystemZ::InsnRIS, 5, 597 { "rr", SystemZ::InsnRR, 3, 599 { "rre", SystemZ::InsnRRE, 3, 601 { "rrf", SystemZ [all...] |
/freebsd-11-stable/contrib/llvm-project/clang/lib/Basic/Targets/ |
H A D | SystemZ.cpp | 1 //===--- SystemZ.cpp - Implement SystemZ target feature support -----------===// 9 // This file implements SystemZ TargetInfo objects. 13 #include "SystemZ.h" 151 return llvm::makeArrayRef(BuiltinInfo, clang::SystemZ::LastTSBuiltin -
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/freebsd-11-stable/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | TargetBuiltins.h | 192 /// SystemZ builtins 193 namespace SystemZ { namespace in namespace:clang
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