Searched refs:ShiftOp (Results 1 - 7 of 7) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp774 unsigned ShiftOp = MI->getOperand(OpNum).getImm();
775 bool isASR = (ShiftOp & (1 << 5)) != 0;
776 unsigned Amt = ShiftOp & 0x1f;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp704 unsigned ShiftOp; local
708 ShiftOp = ISD::SRA;
712 ShiftOp = ISD::SRL;
729 return DAG.getNode(ShiftOp, dl, PromotedType, Result, ShiftAmount);
788 unsigned ShiftOp = Signed ? ISD::SRA : ISD::SRL; local
789 return DAG.getNode(ShiftOp, dl, PromotedType, Result,
3366 SDValue ShiftOp = N->getOperand(1); local
3371 if (ShiftOp.getValueType() != ShiftTy)
3372 ShiftOp = DAG.getZExtOrTrunc(ShiftOp, d
[all...]
H A DDAGCombiner.cpp2059 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1); local
2061 if (!C || ShiftOp.getOpcode() != ISD::SRL)
2065 SDValue Not = ShiftOp.getOperand(0);
2070 EVT VT = ShiftOp.getValueType();
2071 SDValue ShAmt = ShiftOp.getOperand(1);
6480 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); local
6481 if (!ShiftOp)
6484 uint64_t BitShift = ShiftOp->getZExtValue();
7251 auto matchFirstShift = [&](SDValue V, SDValue &ShiftOp,
7261 ShiftOp
[all...]
H A DSelectionDAGBuilder.cpp2719 SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), dl, Reg, VT); local
2728 ShiftOp, DAG.getConstant(countTrailingZeros(B.Mask), dl, VT),
2734 ShiftOp, DAG.getConstant(countTrailingOnes(B.Mask), dl, VT),
2739 DAG.getConstant(1, dl, VT), ShiftOp);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp1859 unsigned ShiftOp = TrueOp->getSExtValue() == 1 ? ISD::SRL : ISD::SRA; local
1860 Result = CurDAG->getNode(ShiftOp, DL, MVT::i32, Result,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp3342 unsigned ShiftOp = Subtarget.isABI_N64() ? Mips::DSLL : Mips::SLL; local
3387 BuildMI(*BB, MI, DL, TII->get(ShiftOp), LaneTmp1)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp208 for (auto ShiftOp : {ISD::FSHL, ISD::FSHR}) {
209 setOperationAction(ShiftOp , MVT::i16 , Custom);
210 setOperationAction(ShiftOp , MVT::i32 , Custom);
212 setOperationAction(ShiftOp , MVT::i64 , Custom);
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