| /freebsd-11-stable/contrib/gcc/config/i386/ |
| H A D | crtfastmath.c | 38 #define SSE (1 << 25) macro
50 /* All 64-bit targets have SSE and DAZ; only check them explicitly
75 if (edx & SSE)
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| /freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| H A D | RangedConstraintManager.cpp | 42 } else if (const SymSymExpr *SSE = dyn_cast<SymSymExpr>(Sym)) {
50 BinaryOperator::Opcode Op = SSE->getOpcode();
54 if (Loc::isLocType(SSE->getLHS()->getType()) &&
55 Loc::isLocType(SSE->getRHS()->getType())) {
58 SymMgr.getSymSymExpr(SSE->getRHS(), BO_Sub, SSE->getLHS(), DiffTy);
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| H A D | RangeConstraintManager.cpp | 362 if (const SymSymExpr *SSE = dyn_cast<SymSymExpr>(SE)) {
364 if (BinaryOperator::isEqualityOp(SSE->getOpcode()) ||
365 BinaryOperator::isRelationalOp(SSE->getOpcode())) {
370 if (Loc::isLocType(SSE->getLHS()->getType())) {
371 return Loc::isLocType(SSE->getRHS()->getType());
523 if (const SymSymExpr *SSE = dyn_cast<SymSymExpr>(Sym)) {
524 if (SSE->getOpcode() == BO_Sub) {
527 SymbolRef negSym = SymMgr.getSymSymExpr(SSE->getRHS(), BO_Sub,
528 SSE->getLHS(), T);
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| /freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | RegisterContext_x86.h | 96 // SSE Registers
159 // SSE Vector Registers
311 SSE = FP << 1, member in class:lldb_private::XSAVE_HDR::XFeature
312 YMM = SSE << 1,
340 // are in FXSAVE.xmm for compatibility with SSE)
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/ |
| H A D | LLVMContextImpl.cpp | 226 for (const auto &SSE : SSC)
227 SSNs[SSE.second] = SSE.first();
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| /freebsd-11-stable/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| H A D | SMTConstraintManager.h | 283 if (const SymSymExpr *SSE = dyn_cast<SymSymExpr>(BSE))
284 return canReasonAbout(SVB.makeSymbolVal(SSE->getLHS())) &&
285 canReasonAbout(SVB.makeSymbolVal(SSE->getRHS()));
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | VFABIDemangling.cpp | 38 .Case("b", VFISAKind::SSE)
|
| /freebsd-11-stable/sys/conf/ |
| H A D | kern.mk | 95 # cache tag lines). Explicitly prohibit the use of FPU, SSE and other SIMD
143 # For AMD64, we explicitly prohibit the use of FPU, SSE and other SIMD
|
| /freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | TargetInfo.cpp | 958 /// Returns true if this type can be passed in SSE registers with the
980 /// Returns true if this aggregate is small enough to be passed in SSE registers
1519 // Otherwise, if the type contains an SSE vector type, the alignment is 16.
2059 SSE, enumerator in enum:__anon29::X86_64ABIInfo::Class
2082 /// final MEMORY or SSE classes when necessary.
2164 /// GCC classifies <1 x long long> as SSE but some platform ABIs choose to
2490 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole
2494 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
2506 if (AggregateSize > 128 && (Lo != SSE || H
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | VectorUtils.h | 47 SSE, // x86 SSE member in class:llvm::VFISAKind
|
| /freebsd-11-stable/sys/dev/aic7xxx/ |
| H A D | aic7xxx_pci.c | 670 #define SSE 0x40 macro
2038 if (status1 & SSE) {
2059 if ((status1 & (DPE|SSE|RMA|RTA|STA|DPR)) == 0) {
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| H A D | aic79xx_pci.c | 778 #define SSE 0x40 macro
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| H A D | aic79xx_reg.h | 3322 #define SSE 0x40 macro
|