1260401Sscottl/* 2260401Sscottl * DO NOT EDIT - This file is automatically generated 3260401Sscottl * from the following source files: 4260401Sscottl * 5260401Sscottl * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#119 $ 6260401Sscottl * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#76 $ 7260401Sscottl * 8260401Sscottl * $FreeBSD$ 9260401Sscottl */ 10260401Sscottltypedef int (ahd_reg_print_t)(u_int, u_int *, u_int); 11260401Sscottltypedef struct ahd_reg_parse_entry { 12260401Sscottl char *name; 13260401Sscottl uint8_t value; 14260401Sscottl uint8_t mask; 15260401Sscottl} ahd_reg_parse_entry_t; 16260401Sscottl 17260401Sscottl#if AIC_DEBUG_REGISTERS 18260401Sscottlahd_reg_print_t ahd_mode_ptr_print; 19260401Sscottl#else 20260401Sscottl#define ahd_mode_ptr_print(regvalue, cur_col, wrap) \ 21260401Sscottl ahd_print_register(NULL, 0, "MODE_PTR", 0x00, regvalue, cur_col, wrap) 22260401Sscottl#endif 23260401Sscottl 24260401Sscottl#if AIC_DEBUG_REGISTERS 25260401Sscottlahd_reg_print_t ahd_intstat_print; 26260401Sscottl#else 27260401Sscottl#define ahd_intstat_print(regvalue, cur_col, wrap) \ 28260401Sscottl ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap) 29260401Sscottl#endif 30260401Sscottl 31260401Sscottl#if AIC_DEBUG_REGISTERS 32260401Sscottlahd_reg_print_t ahd_seqintcode_print; 33260401Sscottl#else 34260401Sscottl#define ahd_seqintcode_print(regvalue, cur_col, wrap) \ 35260401Sscottl ahd_print_register(NULL, 0, "SEQINTCODE", 0x02, regvalue, cur_col, wrap) 36260401Sscottl#endif 37260401Sscottl 38260401Sscottl#if AIC_DEBUG_REGISTERS 39260401Sscottlahd_reg_print_t ahd_clrint_print; 40260401Sscottl#else 41260401Sscottl#define ahd_clrint_print(regvalue, cur_col, wrap) \ 42260401Sscottl ahd_print_register(NULL, 0, "CLRINT", 0x03, regvalue, cur_col, wrap) 43260401Sscottl#endif 44260401Sscottl 45260401Sscottl#if AIC_DEBUG_REGISTERS 46260401Sscottlahd_reg_print_t ahd_error_print; 47260401Sscottl#else 48260401Sscottl#define ahd_error_print(regvalue, cur_col, wrap) \ 49260401Sscottl ahd_print_register(NULL, 0, "ERROR", 0x04, regvalue, cur_col, wrap) 50260401Sscottl#endif 51260401Sscottl 52260401Sscottl#if AIC_DEBUG_REGISTERS 53260401Sscottlahd_reg_print_t ahd_clrerr_print; 54260401Sscottl#else 55260401Sscottl#define ahd_clrerr_print(regvalue, cur_col, wrap) \ 56260401Sscottl ahd_print_register(NULL, 0, "CLRERR", 0x04, regvalue, cur_col, wrap) 57260401Sscottl#endif 58260401Sscottl 59260401Sscottl#if AIC_DEBUG_REGISTERS 60260401Sscottlahd_reg_print_t ahd_hcntrl_print; 61260401Sscottl#else 62260401Sscottl#define ahd_hcntrl_print(regvalue, cur_col, wrap) \ 63260401Sscottl ahd_print_register(NULL, 0, "HCNTRL", 0x05, regvalue, cur_col, wrap) 64260401Sscottl#endif 65260401Sscottl 66260401Sscottl#if AIC_DEBUG_REGISTERS 67260401Sscottlahd_reg_print_t ahd_hnscb_qoff_print; 68260401Sscottl#else 69260401Sscottl#define ahd_hnscb_qoff_print(regvalue, cur_col, wrap) \ 70260401Sscottl ahd_print_register(NULL, 0, "HNSCB_QOFF", 0x06, regvalue, cur_col, wrap) 71260401Sscottl#endif 72260401Sscottl 73260401Sscottl#if AIC_DEBUG_REGISTERS 74260401Sscottlahd_reg_print_t ahd_hescb_qoff_print; 75260401Sscottl#else 76260401Sscottl#define ahd_hescb_qoff_print(regvalue, cur_col, wrap) \ 77260401Sscottl ahd_print_register(NULL, 0, "HESCB_QOFF", 0x08, regvalue, cur_col, wrap) 78260401Sscottl#endif 79260401Sscottl 80260401Sscottl#if AIC_DEBUG_REGISTERS 81260401Sscottlahd_reg_print_t ahd_hs_mailbox_print; 82260401Sscottl#else 83260401Sscottl#define ahd_hs_mailbox_print(regvalue, cur_col, wrap) \ 84260401Sscottl ahd_print_register(NULL, 0, "HS_MAILBOX", 0x0b, regvalue, cur_col, wrap) 85260401Sscottl#endif 86260401Sscottl 87260401Sscottl#if AIC_DEBUG_REGISTERS 88260401Sscottlahd_reg_print_t ahd_seqintstat_print; 89260401Sscottl#else 90260401Sscottl#define ahd_seqintstat_print(regvalue, cur_col, wrap) \ 91260401Sscottl ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap) 92260401Sscottl#endif 93260401Sscottl 94260401Sscottl#if AIC_DEBUG_REGISTERS 95260401Sscottlahd_reg_print_t ahd_clrseqintstat_print; 96260401Sscottl#else 97260401Sscottl#define ahd_clrseqintstat_print(regvalue, cur_col, wrap) \ 98260401Sscottl ahd_print_register(NULL, 0, "CLRSEQINTSTAT", 0x0c, regvalue, cur_col, wrap) 99260401Sscottl#endif 100260401Sscottl 101260401Sscottl#if AIC_DEBUG_REGISTERS 102260401Sscottlahd_reg_print_t ahd_swtimer_print; 103260401Sscottl#else 104260401Sscottl#define ahd_swtimer_print(regvalue, cur_col, wrap) \ 105260401Sscottl ahd_print_register(NULL, 0, "SWTIMER", 0x0e, regvalue, cur_col, wrap) 106260401Sscottl#endif 107260401Sscottl 108260401Sscottl#if AIC_DEBUG_REGISTERS 109260401Sscottlahd_reg_print_t ahd_snscb_qoff_print; 110260401Sscottl#else 111260401Sscottl#define ahd_snscb_qoff_print(regvalue, cur_col, wrap) \ 112260401Sscottl ahd_print_register(NULL, 0, "SNSCB_QOFF", 0x10, regvalue, cur_col, wrap) 113260401Sscottl#endif 114260401Sscottl 115260401Sscottl#if AIC_DEBUG_REGISTERS 116260401Sscottlahd_reg_print_t ahd_sescb_qoff_print; 117260401Sscottl#else 118260401Sscottl#define ahd_sescb_qoff_print(regvalue, cur_col, wrap) \ 119260401Sscottl ahd_print_register(NULL, 0, "SESCB_QOFF", 0x12, regvalue, cur_col, wrap) 120260401Sscottl#endif 121260401Sscottl 122260401Sscottl#if AIC_DEBUG_REGISTERS 123260401Sscottlahd_reg_print_t ahd_sdscb_qoff_print; 124260401Sscottl#else 125260401Sscottl#define ahd_sdscb_qoff_print(regvalue, cur_col, wrap) \ 126260401Sscottl ahd_print_register(NULL, 0, "SDSCB_QOFF", 0x14, regvalue, cur_col, wrap) 127260401Sscottl#endif 128260401Sscottl 129260401Sscottl#if AIC_DEBUG_REGISTERS 130260401Sscottlahd_reg_print_t ahd_qoff_ctlsta_print; 131260401Sscottl#else 132260401Sscottl#define ahd_qoff_ctlsta_print(regvalue, cur_col, wrap) \ 133260401Sscottl ahd_print_register(NULL, 0, "QOFF_CTLSTA", 0x16, regvalue, cur_col, wrap) 134260401Sscottl#endif 135260401Sscottl 136260401Sscottl#if AIC_DEBUG_REGISTERS 137260401Sscottlahd_reg_print_t ahd_intctl_print; 138260401Sscottl#else 139260401Sscottl#define ahd_intctl_print(regvalue, cur_col, wrap) \ 140260401Sscottl ahd_print_register(NULL, 0, "INTCTL", 0x18, regvalue, cur_col, wrap) 141260401Sscottl#endif 142260401Sscottl 143260401Sscottl#if AIC_DEBUG_REGISTERS 144260401Sscottlahd_reg_print_t ahd_dfcntrl_print; 145260401Sscottl#else 146260401Sscottl#define ahd_dfcntrl_print(regvalue, cur_col, wrap) \ 147260401Sscottl ahd_print_register(NULL, 0, "DFCNTRL", 0x19, regvalue, cur_col, wrap) 148260401Sscottl#endif 149260401Sscottl 150260401Sscottl#if AIC_DEBUG_REGISTERS 151260401Sscottlahd_reg_print_t ahd_dscommand0_print; 152260401Sscottl#else 153260401Sscottl#define ahd_dscommand0_print(regvalue, cur_col, wrap) \ 154260401Sscottl ahd_print_register(NULL, 0, "DSCOMMAND0", 0x19, regvalue, cur_col, wrap) 155260401Sscottl#endif 156260401Sscottl 157260401Sscottl#if AIC_DEBUG_REGISTERS 158260401Sscottlahd_reg_print_t ahd_dfstatus_print; 159260401Sscottl#else 160260401Sscottl#define ahd_dfstatus_print(regvalue, cur_col, wrap) \ 161260401Sscottl ahd_print_register(NULL, 0, "DFSTATUS", 0x1a, regvalue, cur_col, wrap) 162260401Sscottl#endif 163260401Sscottl 164260401Sscottl#if AIC_DEBUG_REGISTERS 165260401Sscottlahd_reg_print_t ahd_sg_cache_shadow_print; 166260401Sscottl#else 167260401Sscottl#define ahd_sg_cache_shadow_print(regvalue, cur_col, wrap) \ 168260401Sscottl ahd_print_register(NULL, 0, "SG_CACHE_SHADOW", 0x1b, regvalue, cur_col, wrap) 169260401Sscottl#endif 170260401Sscottl 171260401Sscottl#if AIC_DEBUG_REGISTERS 172260401Sscottlahd_reg_print_t ahd_sg_cache_pre_print; 173260401Sscottl#else 174260401Sscottl#define ahd_sg_cache_pre_print(regvalue, cur_col, wrap) \ 175260401Sscottl ahd_print_register(NULL, 0, "SG_CACHE_PRE", 0x1b, regvalue, cur_col, wrap) 176260401Sscottl#endif 177260401Sscottl 178260401Sscottl#if AIC_DEBUG_REGISTERS 179260401Sscottlahd_reg_print_t ahd_arbctl_print; 180260401Sscottl#else 181260401Sscottl#define ahd_arbctl_print(regvalue, cur_col, wrap) \ 182260401Sscottl ahd_print_register(NULL, 0, "ARBCTL", 0x1b, regvalue, cur_col, wrap) 183260401Sscottl#endif 184260401Sscottl 185260401Sscottl#if AIC_DEBUG_REGISTERS 186260401Sscottlahd_reg_print_t ahd_lqin_print; 187260401Sscottl#else 188260401Sscottl#define ahd_lqin_print(regvalue, cur_col, wrap) \ 189260401Sscottl ahd_print_register(NULL, 0, "LQIN", 0x20, regvalue, cur_col, wrap) 190260401Sscottl#endif 191260401Sscottl 192260401Sscottl#if AIC_DEBUG_REGISTERS 193260401Sscottlahd_reg_print_t ahd_typeptr_print; 194260401Sscottl#else 195260401Sscottl#define ahd_typeptr_print(regvalue, cur_col, wrap) \ 196260401Sscottl ahd_print_register(NULL, 0, "TYPEPTR", 0x20, regvalue, cur_col, wrap) 197260401Sscottl#endif 198260401Sscottl 199260401Sscottl#if AIC_DEBUG_REGISTERS 200260401Sscottlahd_reg_print_t ahd_tagptr_print; 201260401Sscottl#else 202260401Sscottl#define ahd_tagptr_print(regvalue, cur_col, wrap) \ 203260401Sscottl ahd_print_register(NULL, 0, "TAGPTR", 0x21, regvalue, cur_col, wrap) 204260401Sscottl#endif 205260401Sscottl 206260401Sscottl#if AIC_DEBUG_REGISTERS 207260401Sscottlahd_reg_print_t ahd_lunptr_print; 208260401Sscottl#else 209260401Sscottl#define ahd_lunptr_print(regvalue, cur_col, wrap) \ 210260401Sscottl ahd_print_register(NULL, 0, "LUNPTR", 0x22, regvalue, cur_col, wrap) 211260401Sscottl#endif 212260401Sscottl 213260401Sscottl#if AIC_DEBUG_REGISTERS 214260401Sscottlahd_reg_print_t ahd_datalenptr_print; 215260401Sscottl#else 216260401Sscottl#define ahd_datalenptr_print(regvalue, cur_col, wrap) \ 217260401Sscottl ahd_print_register(NULL, 0, "DATALENPTR", 0x23, regvalue, cur_col, wrap) 218260401Sscottl#endif 219260401Sscottl 220260401Sscottl#if AIC_DEBUG_REGISTERS 221260401Sscottlahd_reg_print_t ahd_statlenptr_print; 222260401Sscottl#else 223260401Sscottl#define ahd_statlenptr_print(regvalue, cur_col, wrap) \ 224260401Sscottl ahd_print_register(NULL, 0, "STATLENPTR", 0x24, regvalue, cur_col, wrap) 225260401Sscottl#endif 226260401Sscottl 227260401Sscottl#if AIC_DEBUG_REGISTERS 228260401Sscottlahd_reg_print_t ahd_cmdlenptr_print; 229260401Sscottl#else 230260401Sscottl#define ahd_cmdlenptr_print(regvalue, cur_col, wrap) \ 231260401Sscottl ahd_print_register(NULL, 0, "CMDLENPTR", 0x25, regvalue, cur_col, wrap) 232260401Sscottl#endif 233260401Sscottl 234260401Sscottl#if AIC_DEBUG_REGISTERS 235260401Sscottlahd_reg_print_t ahd_attrptr_print; 236260401Sscottl#else 237260401Sscottl#define ahd_attrptr_print(regvalue, cur_col, wrap) \ 238260401Sscottl ahd_print_register(NULL, 0, "ATTRPTR", 0x26, regvalue, cur_col, wrap) 239260401Sscottl#endif 240260401Sscottl 241260401Sscottl#if AIC_DEBUG_REGISTERS 242260401Sscottlahd_reg_print_t ahd_flagptr_print; 243260401Sscottl#else 244260401Sscottl#define ahd_flagptr_print(regvalue, cur_col, wrap) \ 245260401Sscottl ahd_print_register(NULL, 0, "FLAGPTR", 0x27, regvalue, cur_col, wrap) 246260401Sscottl#endif 247260401Sscottl 248260401Sscottl#if AIC_DEBUG_REGISTERS 249260401Sscottlahd_reg_print_t ahd_cmdptr_print; 250260401Sscottl#else 251260401Sscottl#define ahd_cmdptr_print(regvalue, cur_col, wrap) \ 252260401Sscottl ahd_print_register(NULL, 0, "CMDPTR", 0x28, regvalue, cur_col, wrap) 253260401Sscottl#endif 254260401Sscottl 255260401Sscottl#if AIC_DEBUG_REGISTERS 256260401Sscottlahd_reg_print_t ahd_qnextptr_print; 257260401Sscottl#else 258260401Sscottl#define ahd_qnextptr_print(regvalue, cur_col, wrap) \ 259260401Sscottl ahd_print_register(NULL, 0, "QNEXTPTR", 0x29, regvalue, cur_col, wrap) 260260401Sscottl#endif 261260401Sscottl 262260401Sscottl#if AIC_DEBUG_REGISTERS 263260401Sscottlahd_reg_print_t ahd_idptr_print; 264260401Sscottl#else 265260401Sscottl#define ahd_idptr_print(regvalue, cur_col, wrap) \ 266260401Sscottl ahd_print_register(NULL, 0, "IDPTR", 0x2a, regvalue, cur_col, wrap) 267260401Sscottl#endif 268260401Sscottl 269260401Sscottl#if AIC_DEBUG_REGISTERS 270260401Sscottlahd_reg_print_t ahd_abrtbyteptr_print; 271260401Sscottl#else 272260401Sscottl#define ahd_abrtbyteptr_print(regvalue, cur_col, wrap) \ 273260401Sscottl ahd_print_register(NULL, 0, "ABRTBYTEPTR", 0x2b, regvalue, cur_col, wrap) 274260401Sscottl#endif 275260401Sscottl 276260401Sscottl#if AIC_DEBUG_REGISTERS 277260401Sscottlahd_reg_print_t ahd_abrtbitptr_print; 278260401Sscottl#else 279260401Sscottl#define ahd_abrtbitptr_print(regvalue, cur_col, wrap) \ 280260401Sscottl ahd_print_register(NULL, 0, "ABRTBITPTR", 0x2c, regvalue, cur_col, wrap) 281260401Sscottl#endif 282260401Sscottl 283260401Sscottl#if AIC_DEBUG_REGISTERS 284260401Sscottlahd_reg_print_t ahd_maxcmdbytes_print; 285260401Sscottl#else 286260401Sscottl#define ahd_maxcmdbytes_print(regvalue, cur_col, wrap) \ 287260401Sscottl ahd_print_register(NULL, 0, "MAXCMDBYTES", 0x2d, regvalue, cur_col, wrap) 288260401Sscottl#endif 289260401Sscottl 290260401Sscottl#if AIC_DEBUG_REGISTERS 291260401Sscottlahd_reg_print_t ahd_maxcmd2rcv_print; 292260401Sscottl#else 293260401Sscottl#define ahd_maxcmd2rcv_print(regvalue, cur_col, wrap) \ 294260401Sscottl ahd_print_register(NULL, 0, "MAXCMD2RCV", 0x2e, regvalue, cur_col, wrap) 295260401Sscottl#endif 296260401Sscottl 297260401Sscottl#if AIC_DEBUG_REGISTERS 298260401Sscottlahd_reg_print_t ahd_shortthresh_print; 299260401Sscottl#else 300260401Sscottl#define ahd_shortthresh_print(regvalue, cur_col, wrap) \ 301260401Sscottl ahd_print_register(NULL, 0, "SHORTTHRESH", 0x2f, regvalue, cur_col, wrap) 302260401Sscottl#endif 303260401Sscottl 304260401Sscottl#if AIC_DEBUG_REGISTERS 305260401Sscottlahd_reg_print_t ahd_lunlen_print; 306260401Sscottl#else 307260401Sscottl#define ahd_lunlen_print(regvalue, cur_col, wrap) \ 308260401Sscottl ahd_print_register(NULL, 0, "LUNLEN", 0x30, regvalue, cur_col, wrap) 309260401Sscottl#endif 310260401Sscottl 311260401Sscottl#if AIC_DEBUG_REGISTERS 312260401Sscottlahd_reg_print_t ahd_cdblimit_print; 313260401Sscottl#else 314260401Sscottl#define ahd_cdblimit_print(regvalue, cur_col, wrap) \ 315260401Sscottl ahd_print_register(NULL, 0, "CDBLIMIT", 0x31, regvalue, cur_col, wrap) 316260401Sscottl#endif 317260401Sscottl 318260401Sscottl#if AIC_DEBUG_REGISTERS 319260401Sscottlahd_reg_print_t ahd_maxcmd_print; 320260401Sscottl#else 321260401Sscottl#define ahd_maxcmd_print(regvalue, cur_col, wrap) \ 322260401Sscottl ahd_print_register(NULL, 0, "MAXCMD", 0x32, regvalue, cur_col, wrap) 323260401Sscottl#endif 324260401Sscottl 325260401Sscottl#if AIC_DEBUG_REGISTERS 326260401Sscottlahd_reg_print_t ahd_maxcmdcnt_print; 327260401Sscottl#else 328260401Sscottl#define ahd_maxcmdcnt_print(regvalue, cur_col, wrap) \ 329260401Sscottl ahd_print_register(NULL, 0, "MAXCMDCNT", 0x33, regvalue, cur_col, wrap) 330260401Sscottl#endif 331260401Sscottl 332260401Sscottl#if AIC_DEBUG_REGISTERS 333260401Sscottlahd_reg_print_t ahd_lqrsvd01_print; 334260401Sscottl#else 335260401Sscottl#define ahd_lqrsvd01_print(regvalue, cur_col, wrap) \ 336260401Sscottl ahd_print_register(NULL, 0, "LQRSVD01", 0x34, regvalue, cur_col, wrap) 337260401Sscottl#endif 338260401Sscottl 339260401Sscottl#if AIC_DEBUG_REGISTERS 340260401Sscottlahd_reg_print_t ahd_lqrsvd16_print; 341260401Sscottl#else 342260401Sscottl#define ahd_lqrsvd16_print(regvalue, cur_col, wrap) \ 343260401Sscottl ahd_print_register(NULL, 0, "LQRSVD16", 0x35, regvalue, cur_col, wrap) 344260401Sscottl#endif 345260401Sscottl 346260401Sscottl#if AIC_DEBUG_REGISTERS 347260401Sscottlahd_reg_print_t ahd_lqrsvd17_print; 348260401Sscottl#else 349260401Sscottl#define ahd_lqrsvd17_print(regvalue, cur_col, wrap) \ 350260401Sscottl ahd_print_register(NULL, 0, "LQRSVD17", 0x36, regvalue, cur_col, wrap) 351260401Sscottl#endif 352260401Sscottl 353260401Sscottl#if AIC_DEBUG_REGISTERS 354260401Sscottlahd_reg_print_t ahd_cmdrsvd0_print; 355260401Sscottl#else 356260401Sscottl#define ahd_cmdrsvd0_print(regvalue, cur_col, wrap) \ 357260401Sscottl ahd_print_register(NULL, 0, "CMDRSVD0", 0x37, regvalue, cur_col, wrap) 358260401Sscottl#endif 359260401Sscottl 360260401Sscottl#if AIC_DEBUG_REGISTERS 361260401Sscottlahd_reg_print_t ahd_lqctl0_print; 362260401Sscottl#else 363260401Sscottl#define ahd_lqctl0_print(regvalue, cur_col, wrap) \ 364260401Sscottl ahd_print_register(NULL, 0, "LQCTL0", 0x38, regvalue, cur_col, wrap) 365260401Sscottl#endif 366260401Sscottl 367260401Sscottl#if AIC_DEBUG_REGISTERS 368260401Sscottlahd_reg_print_t ahd_lqctl1_print; 369260401Sscottl#else 370260401Sscottl#define ahd_lqctl1_print(regvalue, cur_col, wrap) \ 371260401Sscottl ahd_print_register(NULL, 0, "LQCTL1", 0x38, regvalue, cur_col, wrap) 372260401Sscottl#endif 373260401Sscottl 374260401Sscottl#if AIC_DEBUG_REGISTERS 375260401Sscottlahd_reg_print_t ahd_lqctl2_print; 376260401Sscottl#else 377260401Sscottl#define ahd_lqctl2_print(regvalue, cur_col, wrap) \ 378260401Sscottl ahd_print_register(NULL, 0, "LQCTL2", 0x39, regvalue, cur_col, wrap) 379260401Sscottl#endif 380260401Sscottl 381260401Sscottl#if AIC_DEBUG_REGISTERS 382260401Sscottlahd_reg_print_t ahd_scsbist0_print; 383260401Sscottl#else 384260401Sscottl#define ahd_scsbist0_print(regvalue, cur_col, wrap) \ 385260401Sscottl ahd_print_register(NULL, 0, "SCSBIST0", 0x39, regvalue, cur_col, wrap) 386260401Sscottl#endif 387260401Sscottl 388260401Sscottl#if AIC_DEBUG_REGISTERS 389260401Sscottlahd_reg_print_t ahd_scsiseq0_print; 390260401Sscottl#else 391260401Sscottl#define ahd_scsiseq0_print(regvalue, cur_col, wrap) \ 392260401Sscottl ahd_print_register(NULL, 0, "SCSISEQ0", 0x3a, regvalue, cur_col, wrap) 393260401Sscottl#endif 394260401Sscottl 395260401Sscottl#if AIC_DEBUG_REGISTERS 396260401Sscottlahd_reg_print_t ahd_scsbist1_print; 397260401Sscottl#else 398260401Sscottl#define ahd_scsbist1_print(regvalue, cur_col, wrap) \ 399260401Sscottl ahd_print_register(NULL, 0, "SCSBIST1", 0x3a, regvalue, cur_col, wrap) 400260401Sscottl#endif 401260401Sscottl 402260401Sscottl#if AIC_DEBUG_REGISTERS 403260401Sscottlahd_reg_print_t ahd_scsiseq1_print; 404260401Sscottl#else 405260401Sscottl#define ahd_scsiseq1_print(regvalue, cur_col, wrap) \ 406260401Sscottl ahd_print_register(NULL, 0, "SCSISEQ1", 0x3b, regvalue, cur_col, wrap) 407260401Sscottl#endif 408260401Sscottl 409260401Sscottl#if AIC_DEBUG_REGISTERS 410260401Sscottlahd_reg_print_t ahd_businitid_print; 411260401Sscottl#else 412260401Sscottl#define ahd_businitid_print(regvalue, cur_col, wrap) \ 413260401Sscottl ahd_print_register(NULL, 0, "BUSINITID", 0x3c, regvalue, cur_col, wrap) 414260401Sscottl#endif 415260401Sscottl 416260401Sscottl#if AIC_DEBUG_REGISTERS 417260401Sscottlahd_reg_print_t ahd_sxfrctl0_print; 418260401Sscottl#else 419260401Sscottl#define ahd_sxfrctl0_print(regvalue, cur_col, wrap) \ 420260401Sscottl ahd_print_register(NULL, 0, "SXFRCTL0", 0x3c, regvalue, cur_col, wrap) 421260401Sscottl#endif 422260401Sscottl 423260401Sscottl#if AIC_DEBUG_REGISTERS 424260401Sscottlahd_reg_print_t ahd_dlcount_print; 425260401Sscottl#else 426260401Sscottl#define ahd_dlcount_print(regvalue, cur_col, wrap) \ 427260401Sscottl ahd_print_register(NULL, 0, "DLCOUNT", 0x3c, regvalue, cur_col, wrap) 428260401Sscottl#endif 429260401Sscottl 430260401Sscottl#if AIC_DEBUG_REGISTERS 431260401Sscottlahd_reg_print_t ahd_sxfrctl1_print; 432260401Sscottl#else 433260401Sscottl#define ahd_sxfrctl1_print(regvalue, cur_col, wrap) \ 434260401Sscottl ahd_print_register(NULL, 0, "SXFRCTL1", 0x3d, regvalue, cur_col, wrap) 435260401Sscottl#endif 436260401Sscottl 437260401Sscottl#if AIC_DEBUG_REGISTERS 438260401Sscottlahd_reg_print_t ahd_bustargid_print; 439260401Sscottl#else 440260401Sscottl#define ahd_bustargid_print(regvalue, cur_col, wrap) \ 441260401Sscottl ahd_print_register(NULL, 0, "BUSTARGID", 0x3e, regvalue, cur_col, wrap) 442260401Sscottl#endif 443260401Sscottl 444260401Sscottl#if AIC_DEBUG_REGISTERS 445260401Sscottlahd_reg_print_t ahd_sxfrctl2_print; 446260401Sscottl#else 447260401Sscottl#define ahd_sxfrctl2_print(regvalue, cur_col, wrap) \ 448260401Sscottl ahd_print_register(NULL, 0, "SXFRCTL2", 0x3e, regvalue, cur_col, wrap) 449260401Sscottl#endif 450260401Sscottl 451260401Sscottl#if AIC_DEBUG_REGISTERS 452260401Sscottlahd_reg_print_t ahd_dffstat_print; 453260401Sscottl#else 454260401Sscottl#define ahd_dffstat_print(regvalue, cur_col, wrap) \ 455260401Sscottl ahd_print_register(NULL, 0, "DFFSTAT", 0x3f, regvalue, cur_col, wrap) 456260401Sscottl#endif 457260401Sscottl 458260401Sscottl#if AIC_DEBUG_REGISTERS 459260401Sscottlahd_reg_print_t ahd_scsisigo_print; 460260401Sscottl#else 461260401Sscottl#define ahd_scsisigo_print(regvalue, cur_col, wrap) \ 462260401Sscottl ahd_print_register(NULL, 0, "SCSISIGO", 0x40, regvalue, cur_col, wrap) 463260401Sscottl#endif 464260401Sscottl 465260401Sscottl#if AIC_DEBUG_REGISTERS 466260401Sscottlahd_reg_print_t ahd_multargid_print; 467260401Sscottl#else 468260401Sscottl#define ahd_multargid_print(regvalue, cur_col, wrap) \ 469260401Sscottl ahd_print_register(NULL, 0, "MULTARGID", 0x40, regvalue, cur_col, wrap) 470260401Sscottl#endif 471260401Sscottl 472260401Sscottl#if AIC_DEBUG_REGISTERS 473260401Sscottlahd_reg_print_t ahd_scsisigi_print; 474260401Sscottl#else 475260401Sscottl#define ahd_scsisigi_print(regvalue, cur_col, wrap) \ 476260401Sscottl ahd_print_register(NULL, 0, "SCSISIGI", 0x41, regvalue, cur_col, wrap) 477260401Sscottl#endif 478260401Sscottl 479260401Sscottl#if AIC_DEBUG_REGISTERS 480260401Sscottlahd_reg_print_t ahd_scsiphase_print; 481260401Sscottl#else 482260401Sscottl#define ahd_scsiphase_print(regvalue, cur_col, wrap) \ 483260401Sscottl ahd_print_register(NULL, 0, "SCSIPHASE", 0x42, regvalue, cur_col, wrap) 484260401Sscottl#endif 485260401Sscottl 486260401Sscottl#if AIC_DEBUG_REGISTERS 487260401Sscottlahd_reg_print_t ahd_scsidat0_img_print; 488260401Sscottl#else 489260401Sscottl#define ahd_scsidat0_img_print(regvalue, cur_col, wrap) \ 490260401Sscottl ahd_print_register(NULL, 0, "SCSIDAT0_IMG", 0x43, regvalue, cur_col, wrap) 491260401Sscottl#endif 492260401Sscottl 493260401Sscottl#if AIC_DEBUG_REGISTERS 494260401Sscottlahd_reg_print_t ahd_scsidat_print; 495260401Sscottl#else 496260401Sscottl#define ahd_scsidat_print(regvalue, cur_col, wrap) \ 497260401Sscottl ahd_print_register(NULL, 0, "SCSIDAT", 0x44, regvalue, cur_col, wrap) 498260401Sscottl#endif 499260401Sscottl 500260401Sscottl#if AIC_DEBUG_REGISTERS 501260401Sscottlahd_reg_print_t ahd_scsibus_print; 502260401Sscottl#else 503260401Sscottl#define ahd_scsibus_print(regvalue, cur_col, wrap) \ 504260401Sscottl ahd_print_register(NULL, 0, "SCSIBUS", 0x46, regvalue, cur_col, wrap) 505260401Sscottl#endif 506260401Sscottl 507260401Sscottl#if AIC_DEBUG_REGISTERS 508260401Sscottlahd_reg_print_t ahd_targidin_print; 509260401Sscottl#else 510260401Sscottl#define ahd_targidin_print(regvalue, cur_col, wrap) \ 511260401Sscottl ahd_print_register(NULL, 0, "TARGIDIN", 0x48, regvalue, cur_col, wrap) 512260401Sscottl#endif 513260401Sscottl 514260401Sscottl#if AIC_DEBUG_REGISTERS 515260401Sscottlahd_reg_print_t ahd_selid_print; 516260401Sscottl#else 517260401Sscottl#define ahd_selid_print(regvalue, cur_col, wrap) \ 518260401Sscottl ahd_print_register(NULL, 0, "SELID", 0x49, regvalue, cur_col, wrap) 519260401Sscottl#endif 520260401Sscottl 521260401Sscottl#if AIC_DEBUG_REGISTERS 522260401Sscottlahd_reg_print_t ahd_optionmode_print; 523260401Sscottl#else 524260401Sscottl#define ahd_optionmode_print(regvalue, cur_col, wrap) \ 525260401Sscottl ahd_print_register(NULL, 0, "OPTIONMODE", 0x4a, regvalue, cur_col, wrap) 526260401Sscottl#endif 527260401Sscottl 528260401Sscottl#if AIC_DEBUG_REGISTERS 529260401Sscottlahd_reg_print_t ahd_sblkctl_print; 530260401Sscottl#else 531260401Sscottl#define ahd_sblkctl_print(regvalue, cur_col, wrap) \ 532260401Sscottl ahd_print_register(NULL, 0, "SBLKCTL", 0x4a, regvalue, cur_col, wrap) 533260401Sscottl#endif 534260401Sscottl 535260401Sscottl#if AIC_DEBUG_REGISTERS 536260401Sscottlahd_reg_print_t ahd_simode0_print; 537260401Sscottl#else 538260401Sscottl#define ahd_simode0_print(regvalue, cur_col, wrap) \ 539260401Sscottl ahd_print_register(NULL, 0, "SIMODE0", 0x4b, regvalue, cur_col, wrap) 540260401Sscottl#endif 541260401Sscottl 542260401Sscottl#if AIC_DEBUG_REGISTERS 543260401Sscottlahd_reg_print_t ahd_sstat0_print; 544260401Sscottl#else 545260401Sscottl#define ahd_sstat0_print(regvalue, cur_col, wrap) \ 546260401Sscottl ahd_print_register(NULL, 0, "SSTAT0", 0x4b, regvalue, cur_col, wrap) 547260401Sscottl#endif 548260401Sscottl 549260401Sscottl#if AIC_DEBUG_REGISTERS 550260401Sscottlahd_reg_print_t ahd_clrsint0_print; 551260401Sscottl#else 552260401Sscottl#define ahd_clrsint0_print(regvalue, cur_col, wrap) \ 553260401Sscottl ahd_print_register(NULL, 0, "CLRSINT0", 0x4b, regvalue, cur_col, wrap) 554260401Sscottl#endif 555260401Sscottl 556260401Sscottl#if AIC_DEBUG_REGISTERS 557260401Sscottlahd_reg_print_t ahd_sstat1_print; 558260401Sscottl#else 559260401Sscottl#define ahd_sstat1_print(regvalue, cur_col, wrap) \ 560260401Sscottl ahd_print_register(NULL, 0, "SSTAT1", 0x4c, regvalue, cur_col, wrap) 561260401Sscottl#endif 562260401Sscottl 563260401Sscottl#if AIC_DEBUG_REGISTERS 564260401Sscottlahd_reg_print_t ahd_clrsint1_print; 565260401Sscottl#else 566260401Sscottl#define ahd_clrsint1_print(regvalue, cur_col, wrap) \ 567260401Sscottl ahd_print_register(NULL, 0, "CLRSINT1", 0x4c, regvalue, cur_col, wrap) 568260401Sscottl#endif 569260401Sscottl 570260401Sscottl#if AIC_DEBUG_REGISTERS 571260401Sscottlahd_reg_print_t ahd_sstat2_print; 572260401Sscottl#else 573260401Sscottl#define ahd_sstat2_print(regvalue, cur_col, wrap) \ 574260401Sscottl ahd_print_register(NULL, 0, "SSTAT2", 0x4d, regvalue, cur_col, wrap) 575260401Sscottl#endif 576260401Sscottl 577260401Sscottl#if AIC_DEBUG_REGISTERS 578260401Sscottlahd_reg_print_t ahd_clrsint2_print; 579260401Sscottl#else 580260401Sscottl#define ahd_clrsint2_print(regvalue, cur_col, wrap) \ 581260401Sscottl ahd_print_register(NULL, 0, "CLRSINT2", 0x4d, regvalue, cur_col, wrap) 582260401Sscottl#endif 583260401Sscottl 584260401Sscottl#if AIC_DEBUG_REGISTERS 585260401Sscottlahd_reg_print_t ahd_simode2_print; 586260401Sscottl#else 587260401Sscottl#define ahd_simode2_print(regvalue, cur_col, wrap) \ 588260401Sscottl ahd_print_register(NULL, 0, "SIMODE2", 0x4d, regvalue, cur_col, wrap) 589260401Sscottl#endif 590260401Sscottl 591260401Sscottl#if AIC_DEBUG_REGISTERS 592260401Sscottlahd_reg_print_t ahd_perrdiag_print; 593260401Sscottl#else 594260401Sscottl#define ahd_perrdiag_print(regvalue, cur_col, wrap) \ 595260401Sscottl ahd_print_register(NULL, 0, "PERRDIAG", 0x4e, regvalue, cur_col, wrap) 596260401Sscottl#endif 597260401Sscottl 598260401Sscottl#if AIC_DEBUG_REGISTERS 599260401Sscottlahd_reg_print_t ahd_lqistate_print; 600260401Sscottl#else 601260401Sscottl#define ahd_lqistate_print(regvalue, cur_col, wrap) \ 602260401Sscottl ahd_print_register(NULL, 0, "LQISTATE", 0x4e, regvalue, cur_col, wrap) 603260401Sscottl#endif 604260401Sscottl 605260401Sscottl#if AIC_DEBUG_REGISTERS 606260401Sscottlahd_reg_print_t ahd_soffcnt_print; 607260401Sscottl#else 608260401Sscottl#define ahd_soffcnt_print(regvalue, cur_col, wrap) \ 609260401Sscottl ahd_print_register(NULL, 0, "SOFFCNT", 0x4f, regvalue, cur_col, wrap) 610260401Sscottl#endif 611260401Sscottl 612260401Sscottl#if AIC_DEBUG_REGISTERS 613260401Sscottlahd_reg_print_t ahd_lqostate_print; 614260401Sscottl#else 615260401Sscottl#define ahd_lqostate_print(regvalue, cur_col, wrap) \ 616260401Sscottl ahd_print_register(NULL, 0, "LQOSTATE", 0x4f, regvalue, cur_col, wrap) 617260401Sscottl#endif 618260401Sscottl 619260401Sscottl#if AIC_DEBUG_REGISTERS 620260401Sscottlahd_reg_print_t ahd_lqistat0_print; 621260401Sscottl#else 622260401Sscottl#define ahd_lqistat0_print(regvalue, cur_col, wrap) \ 623260401Sscottl ahd_print_register(NULL, 0, "LQISTAT0", 0x50, regvalue, cur_col, wrap) 624260401Sscottl#endif 625260401Sscottl 626260401Sscottl#if AIC_DEBUG_REGISTERS 627260401Sscottlahd_reg_print_t ahd_clrlqiint0_print; 628260401Sscottl#else 629260401Sscottl#define ahd_clrlqiint0_print(regvalue, cur_col, wrap) \ 630260401Sscottl ahd_print_register(NULL, 0, "CLRLQIINT0", 0x50, regvalue, cur_col, wrap) 631260401Sscottl#endif 632260401Sscottl 633260401Sscottl#if AIC_DEBUG_REGISTERS 634260401Sscottlahd_reg_print_t ahd_lqimode0_print; 635260401Sscottl#else 636260401Sscottl#define ahd_lqimode0_print(regvalue, cur_col, wrap) \ 637260401Sscottl ahd_print_register(NULL, 0, "LQIMODE0", 0x50, regvalue, cur_col, wrap) 638260401Sscottl#endif 639260401Sscottl 640260401Sscottl#if AIC_DEBUG_REGISTERS 641260401Sscottlahd_reg_print_t ahd_lqistat1_print; 642260401Sscottl#else 643260401Sscottl#define ahd_lqistat1_print(regvalue, cur_col, wrap) \ 644260401Sscottl ahd_print_register(NULL, 0, "LQISTAT1", 0x51, regvalue, cur_col, wrap) 645260401Sscottl#endif 646260401Sscottl 647260401Sscottl#if AIC_DEBUG_REGISTERS 648260401Sscottlahd_reg_print_t ahd_clrlqiint1_print; 649260401Sscottl#else 650260401Sscottl#define ahd_clrlqiint1_print(regvalue, cur_col, wrap) \ 651260401Sscottl ahd_print_register(NULL, 0, "CLRLQIINT1", 0x51, regvalue, cur_col, wrap) 652260401Sscottl#endif 653260401Sscottl 654260401Sscottl#if AIC_DEBUG_REGISTERS 655260401Sscottlahd_reg_print_t ahd_lqimode1_print; 656260401Sscottl#else 657260401Sscottl#define ahd_lqimode1_print(regvalue, cur_col, wrap) \ 658260401Sscottl ahd_print_register(NULL, 0, "LQIMODE1", 0x51, regvalue, cur_col, wrap) 659260401Sscottl#endif 660260401Sscottl 661260401Sscottl#if AIC_DEBUG_REGISTERS 662260401Sscottlahd_reg_print_t ahd_lqistat2_print; 663260401Sscottl#else 664260401Sscottl#define ahd_lqistat2_print(regvalue, cur_col, wrap) \ 665260401Sscottl ahd_print_register(NULL, 0, "LQISTAT2", 0x52, regvalue, cur_col, wrap) 666260401Sscottl#endif 667260401Sscottl 668260401Sscottl#if AIC_DEBUG_REGISTERS 669260401Sscottlahd_reg_print_t ahd_sstat3_print; 670260401Sscottl#else 671260401Sscottl#define ahd_sstat3_print(regvalue, cur_col, wrap) \ 672260401Sscottl ahd_print_register(NULL, 0, "SSTAT3", 0x53, regvalue, cur_col, wrap) 673260401Sscottl#endif 674260401Sscottl 675260401Sscottl#if AIC_DEBUG_REGISTERS 676260401Sscottlahd_reg_print_t ahd_clrsint3_print; 677260401Sscottl#else 678260401Sscottl#define ahd_clrsint3_print(regvalue, cur_col, wrap) \ 679260401Sscottl ahd_print_register(NULL, 0, "CLRSINT3", 0x53, regvalue, cur_col, wrap) 680260401Sscottl#endif 681260401Sscottl 682260401Sscottl#if AIC_DEBUG_REGISTERS 683260401Sscottlahd_reg_print_t ahd_simode3_print; 684260401Sscottl#else 685260401Sscottl#define ahd_simode3_print(regvalue, cur_col, wrap) \ 686260401Sscottl ahd_print_register(NULL, 0, "SIMODE3", 0x53, regvalue, cur_col, wrap) 687260401Sscottl#endif 688260401Sscottl 689260401Sscottl#if AIC_DEBUG_REGISTERS 690260401Sscottlahd_reg_print_t ahd_lqomode0_print; 691260401Sscottl#else 692260401Sscottl#define ahd_lqomode0_print(regvalue, cur_col, wrap) \ 693260401Sscottl ahd_print_register(NULL, 0, "LQOMODE0", 0x54, regvalue, cur_col, wrap) 694260401Sscottl#endif 695260401Sscottl 696260401Sscottl#if AIC_DEBUG_REGISTERS 697260401Sscottlahd_reg_print_t ahd_lqostat0_print; 698260401Sscottl#else 699260401Sscottl#define ahd_lqostat0_print(regvalue, cur_col, wrap) \ 700260401Sscottl ahd_print_register(NULL, 0, "LQOSTAT0", 0x54, regvalue, cur_col, wrap) 701260401Sscottl#endif 702260401Sscottl 703260401Sscottl#if AIC_DEBUG_REGISTERS 704260401Sscottlahd_reg_print_t ahd_clrlqoint0_print; 705260401Sscottl#else 706260401Sscottl#define ahd_clrlqoint0_print(regvalue, cur_col, wrap) \ 707260401Sscottl ahd_print_register(NULL, 0, "CLRLQOINT0", 0x54, regvalue, cur_col, wrap) 708260401Sscottl#endif 709260401Sscottl 710260401Sscottl#if AIC_DEBUG_REGISTERS 711260401Sscottlahd_reg_print_t ahd_lqomode1_print; 712260401Sscottl#else 713260401Sscottl#define ahd_lqomode1_print(regvalue, cur_col, wrap) \ 714260401Sscottl ahd_print_register(NULL, 0, "LQOMODE1", 0x55, regvalue, cur_col, wrap) 715260401Sscottl#endif 716260401Sscottl 717260401Sscottl#if AIC_DEBUG_REGISTERS 718260401Sscottlahd_reg_print_t ahd_lqostat1_print; 719260401Sscottl#else 720260401Sscottl#define ahd_lqostat1_print(regvalue, cur_col, wrap) \ 721260401Sscottl ahd_print_register(NULL, 0, "LQOSTAT1", 0x55, regvalue, cur_col, wrap) 722260401Sscottl#endif 723260401Sscottl 724260401Sscottl#if AIC_DEBUG_REGISTERS 725260401Sscottlahd_reg_print_t ahd_clrlqoint1_print; 726260401Sscottl#else 727260401Sscottl#define ahd_clrlqoint1_print(regvalue, cur_col, wrap) \ 728260401Sscottl ahd_print_register(NULL, 0, "CLRLQOINT1", 0x55, regvalue, cur_col, wrap) 729260401Sscottl#endif 730260401Sscottl 731260401Sscottl#if AIC_DEBUG_REGISTERS 732260401Sscottlahd_reg_print_t ahd_os_space_cnt_print; 733260401Sscottl#else 734260401Sscottl#define ahd_os_space_cnt_print(regvalue, cur_col, wrap) \ 735260401Sscottl ahd_print_register(NULL, 0, "OS_SPACE_CNT", 0x56, regvalue, cur_col, wrap) 736260401Sscottl#endif 737260401Sscottl 738260401Sscottl#if AIC_DEBUG_REGISTERS 739260401Sscottlahd_reg_print_t ahd_lqostat2_print; 740260401Sscottl#else 741260401Sscottl#define ahd_lqostat2_print(regvalue, cur_col, wrap) \ 742260401Sscottl ahd_print_register(NULL, 0, "LQOSTAT2", 0x56, regvalue, cur_col, wrap) 743260401Sscottl#endif 744260401Sscottl 745260401Sscottl#if AIC_DEBUG_REGISTERS 746260401Sscottlahd_reg_print_t ahd_simode1_print; 747260401Sscottl#else 748260401Sscottl#define ahd_simode1_print(regvalue, cur_col, wrap) \ 749260401Sscottl ahd_print_register(NULL, 0, "SIMODE1", 0x57, regvalue, cur_col, wrap) 750260401Sscottl#endif 751260401Sscottl 752260401Sscottl#if AIC_DEBUG_REGISTERS 753260401Sscottlahd_reg_print_t ahd_gsfifo_print; 754260401Sscottl#else 755260401Sscottl#define ahd_gsfifo_print(regvalue, cur_col, wrap) \ 756260401Sscottl ahd_print_register(NULL, 0, "GSFIFO", 0x58, regvalue, cur_col, wrap) 757260401Sscottl#endif 758260401Sscottl 759260401Sscottl#if AIC_DEBUG_REGISTERS 760260401Sscottlahd_reg_print_t ahd_dffsxfrctl_print; 761260401Sscottl#else 762260401Sscottl#define ahd_dffsxfrctl_print(regvalue, cur_col, wrap) \ 763260401Sscottl ahd_print_register(NULL, 0, "DFFSXFRCTL", 0x5a, regvalue, cur_col, wrap) 764260401Sscottl#endif 765260401Sscottl 766260401Sscottl#if AIC_DEBUG_REGISTERS 767260401Sscottlahd_reg_print_t ahd_nextscb_print; 768260401Sscottl#else 769260401Sscottl#define ahd_nextscb_print(regvalue, cur_col, wrap) \ 770260401Sscottl ahd_print_register(NULL, 0, "NEXTSCB", 0x5a, regvalue, cur_col, wrap) 771260401Sscottl#endif 772260401Sscottl 773260401Sscottl#if AIC_DEBUG_REGISTERS 774260401Sscottlahd_reg_print_t ahd_lqoscsctl_print; 775260401Sscottl#else 776260401Sscottl#define ahd_lqoscsctl_print(regvalue, cur_col, wrap) \ 777260401Sscottl ahd_print_register(NULL, 0, "LQOSCSCTL", 0x5a, regvalue, cur_col, wrap) 778260401Sscottl#endif 779260401Sscottl 780260401Sscottl#if AIC_DEBUG_REGISTERS 781260401Sscottlahd_reg_print_t ahd_seqintsrc_print; 782260401Sscottl#else 783260401Sscottl#define ahd_seqintsrc_print(regvalue, cur_col, wrap) \ 784260401Sscottl ahd_print_register(NULL, 0, "SEQINTSRC", 0x5b, regvalue, cur_col, wrap) 785260401Sscottl#endif 786260401Sscottl 787260401Sscottl#if AIC_DEBUG_REGISTERS 788260401Sscottlahd_reg_print_t ahd_clrseqintsrc_print; 789260401Sscottl#else 790260401Sscottl#define ahd_clrseqintsrc_print(regvalue, cur_col, wrap) \ 791260401Sscottl ahd_print_register(NULL, 0, "CLRSEQINTSRC", 0x5b, regvalue, cur_col, wrap) 792260401Sscottl#endif 793260401Sscottl 794260401Sscottl#if AIC_DEBUG_REGISTERS 795260401Sscottlahd_reg_print_t ahd_currscb_print; 796260401Sscottl#else 797260401Sscottl#define ahd_currscb_print(regvalue, cur_col, wrap) \ 798260401Sscottl ahd_print_register(NULL, 0, "CURRSCB", 0x5c, regvalue, cur_col, wrap) 799260401Sscottl#endif 800260401Sscottl 801260401Sscottl#if AIC_DEBUG_REGISTERS 802260401Sscottlahd_reg_print_t ahd_seqimode_print; 803260401Sscottl#else 804260401Sscottl#define ahd_seqimode_print(regvalue, cur_col, wrap) \ 805260401Sscottl ahd_print_register(NULL, 0, "SEQIMODE", 0x5c, regvalue, cur_col, wrap) 806260401Sscottl#endif 807260401Sscottl 808260401Sscottl#if AIC_DEBUG_REGISTERS 809260401Sscottlahd_reg_print_t ahd_mdffstat_print; 810260401Sscottl#else 811260401Sscottl#define ahd_mdffstat_print(regvalue, cur_col, wrap) \ 812260401Sscottl ahd_print_register(NULL, 0, "MDFFSTAT", 0x5d, regvalue, cur_col, wrap) 813260401Sscottl#endif 814260401Sscottl 815260401Sscottl#if AIC_DEBUG_REGISTERS 816260401Sscottlahd_reg_print_t ahd_crccontrol_print; 817260401Sscottl#else 818260401Sscottl#define ahd_crccontrol_print(regvalue, cur_col, wrap) \ 819260401Sscottl ahd_print_register(NULL, 0, "CRCCONTROL", 0x5d, regvalue, cur_col, wrap) 820260401Sscottl#endif 821260401Sscottl 822260401Sscottl#if AIC_DEBUG_REGISTERS 823260401Sscottlahd_reg_print_t ahd_scsitest_print; 824260401Sscottl#else 825260401Sscottl#define ahd_scsitest_print(regvalue, cur_col, wrap) \ 826260401Sscottl ahd_print_register(NULL, 0, "SCSITEST", 0x5e, regvalue, cur_col, wrap) 827260401Sscottl#endif 828260401Sscottl 829260401Sscottl#if AIC_DEBUG_REGISTERS 830260401Sscottlahd_reg_print_t ahd_dfftag_print; 831260401Sscottl#else 832260401Sscottl#define ahd_dfftag_print(regvalue, cur_col, wrap) \ 833260401Sscottl ahd_print_register(NULL, 0, "DFFTAG", 0x5e, regvalue, cur_col, wrap) 834260401Sscottl#endif 835260401Sscottl 836260401Sscottl#if AIC_DEBUG_REGISTERS 837260401Sscottlahd_reg_print_t ahd_lastscb_print; 838260401Sscottl#else 839260401Sscottl#define ahd_lastscb_print(regvalue, cur_col, wrap) \ 840260401Sscottl ahd_print_register(NULL, 0, "LASTSCB", 0x5e, regvalue, cur_col, wrap) 841260401Sscottl#endif 842260401Sscottl 843260401Sscottl#if AIC_DEBUG_REGISTERS 844260401Sscottlahd_reg_print_t ahd_iopdnctl_print; 845260401Sscottl#else 846260401Sscottl#define ahd_iopdnctl_print(regvalue, cur_col, wrap) \ 847260401Sscottl ahd_print_register(NULL, 0, "IOPDNCTL", 0x5f, regvalue, cur_col, wrap) 848260401Sscottl#endif 849260401Sscottl 850260401Sscottl#if AIC_DEBUG_REGISTERS 851260401Sscottlahd_reg_print_t ahd_negoaddr_print; 852260401Sscottl#else 853260401Sscottl#define ahd_negoaddr_print(regvalue, cur_col, wrap) \ 854260401Sscottl ahd_print_register(NULL, 0, "NEGOADDR", 0x60, regvalue, cur_col, wrap) 855260401Sscottl#endif 856260401Sscottl 857260401Sscottl#if AIC_DEBUG_REGISTERS 858260401Sscottlahd_reg_print_t ahd_shaddr_print; 859260401Sscottl#else 860260401Sscottl#define ahd_shaddr_print(regvalue, cur_col, wrap) \ 861260401Sscottl ahd_print_register(NULL, 0, "SHADDR", 0x60, regvalue, cur_col, wrap) 862260401Sscottl#endif 863260401Sscottl 864260401Sscottl#if AIC_DEBUG_REGISTERS 865260401Sscottlahd_reg_print_t ahd_dgrpcrci_print; 866260401Sscottl#else 867260401Sscottl#define ahd_dgrpcrci_print(regvalue, cur_col, wrap) \ 868260401Sscottl ahd_print_register(NULL, 0, "DGRPCRCI", 0x60, regvalue, cur_col, wrap) 869260401Sscottl#endif 870260401Sscottl 871260401Sscottl#if AIC_DEBUG_REGISTERS 872260401Sscottlahd_reg_print_t ahd_negperiod_print; 873260401Sscottl#else 874260401Sscottl#define ahd_negperiod_print(regvalue, cur_col, wrap) \ 875260401Sscottl ahd_print_register(NULL, 0, "NEGPERIOD", 0x61, regvalue, cur_col, wrap) 876260401Sscottl#endif 877260401Sscottl 878260401Sscottl#if AIC_DEBUG_REGISTERS 879260401Sscottlahd_reg_print_t ahd_packcrci_print; 880260401Sscottl#else 881260401Sscottl#define ahd_packcrci_print(regvalue, cur_col, wrap) \ 882260401Sscottl ahd_print_register(NULL, 0, "PACKCRCI", 0x62, regvalue, cur_col, wrap) 883260401Sscottl#endif 884260401Sscottl 885260401Sscottl#if AIC_DEBUG_REGISTERS 886260401Sscottlahd_reg_print_t ahd_negoffset_print; 887260401Sscottl#else 888260401Sscottl#define ahd_negoffset_print(regvalue, cur_col, wrap) \ 889260401Sscottl ahd_print_register(NULL, 0, "NEGOFFSET", 0x62, regvalue, cur_col, wrap) 890260401Sscottl#endif 891260401Sscottl 892260401Sscottl#if AIC_DEBUG_REGISTERS 893260401Sscottlahd_reg_print_t ahd_negppropts_print; 894260401Sscottl#else 895260401Sscottl#define ahd_negppropts_print(regvalue, cur_col, wrap) \ 896260401Sscottl ahd_print_register(NULL, 0, "NEGPPROPTS", 0x63, regvalue, cur_col, wrap) 897260401Sscottl#endif 898260401Sscottl 899260401Sscottl#if AIC_DEBUG_REGISTERS 900260401Sscottlahd_reg_print_t ahd_negconopts_print; 901260401Sscottl#else 902260401Sscottl#define ahd_negconopts_print(regvalue, cur_col, wrap) \ 903260401Sscottl ahd_print_register(NULL, 0, "NEGCONOPTS", 0x64, regvalue, cur_col, wrap) 904260401Sscottl#endif 905260401Sscottl 906260401Sscottl#if AIC_DEBUG_REGISTERS 907260401Sscottlahd_reg_print_t ahd_annexcol_print; 908260401Sscottl#else 909260401Sscottl#define ahd_annexcol_print(regvalue, cur_col, wrap) \ 910260401Sscottl ahd_print_register(NULL, 0, "ANNEXCOL", 0x65, regvalue, cur_col, wrap) 911260401Sscottl#endif 912260401Sscottl 913260401Sscottl#if AIC_DEBUG_REGISTERS 914260401Sscottlahd_reg_print_t ahd_annexdat_print; 915260401Sscottl#else 916260401Sscottl#define ahd_annexdat_print(regvalue, cur_col, wrap) \ 917260401Sscottl ahd_print_register(NULL, 0, "ANNEXDAT", 0x66, regvalue, cur_col, wrap) 918260401Sscottl#endif 919260401Sscottl 920260401Sscottl#if AIC_DEBUG_REGISTERS 921260401Sscottlahd_reg_print_t ahd_scschkn_print; 922260401Sscottl#else 923260401Sscottl#define ahd_scschkn_print(regvalue, cur_col, wrap) \ 924260401Sscottl ahd_print_register(NULL, 0, "SCSCHKN", 0x66, regvalue, cur_col, wrap) 925260401Sscottl#endif 926260401Sscottl 927260401Sscottl#if AIC_DEBUG_REGISTERS 928260401Sscottlahd_reg_print_t ahd_iownid_print; 929260401Sscottl#else 930260401Sscottl#define ahd_iownid_print(regvalue, cur_col, wrap) \ 931260401Sscottl ahd_print_register(NULL, 0, "IOWNID", 0x67, regvalue, cur_col, wrap) 932260401Sscottl#endif 933260401Sscottl 934260401Sscottl#if AIC_DEBUG_REGISTERS 935260401Sscottlahd_reg_print_t ahd_shcnt_print; 936260401Sscottl#else 937260401Sscottl#define ahd_shcnt_print(regvalue, cur_col, wrap) \ 938260401Sscottl ahd_print_register(NULL, 0, "SHCNT", 0x68, regvalue, cur_col, wrap) 939260401Sscottl#endif 940260401Sscottl 941260401Sscottl#if AIC_DEBUG_REGISTERS 942260401Sscottlahd_reg_print_t ahd_pll960ctl0_print; 943260401Sscottl#else 944260401Sscottl#define ahd_pll960ctl0_print(regvalue, cur_col, wrap) \ 945260401Sscottl ahd_print_register(NULL, 0, "PLL960CTL0", 0x68, regvalue, cur_col, wrap) 946260401Sscottl#endif 947260401Sscottl 948260401Sscottl#if AIC_DEBUG_REGISTERS 949260401Sscottlahd_reg_print_t ahd_pll960ctl1_print; 950260401Sscottl#else 951260401Sscottl#define ahd_pll960ctl1_print(regvalue, cur_col, wrap) \ 952260401Sscottl ahd_print_register(NULL, 0, "PLL960CTL1", 0x69, regvalue, cur_col, wrap) 953260401Sscottl#endif 954260401Sscottl 955260401Sscottl#if AIC_DEBUG_REGISTERS 956260401Sscottlahd_reg_print_t ahd_townid_print; 957260401Sscottl#else 958260401Sscottl#define ahd_townid_print(regvalue, cur_col, wrap) \ 959260401Sscottl ahd_print_register(NULL, 0, "TOWNID", 0x69, regvalue, cur_col, wrap) 960260401Sscottl#endif 961260401Sscottl 962260401Sscottl#if AIC_DEBUG_REGISTERS 963260401Sscottlahd_reg_print_t ahd_xsig_print; 964260401Sscottl#else 965260401Sscottl#define ahd_xsig_print(regvalue, cur_col, wrap) \ 966260401Sscottl ahd_print_register(NULL, 0, "XSIG", 0x6a, regvalue, cur_col, wrap) 967260401Sscottl#endif 968260401Sscottl 969260401Sscottl#if AIC_DEBUG_REGISTERS 970260401Sscottlahd_reg_print_t ahd_pll960cnt0_print; 971260401Sscottl#else 972260401Sscottl#define ahd_pll960cnt0_print(regvalue, cur_col, wrap) \ 973260401Sscottl ahd_print_register(NULL, 0, "PLL960CNT0", 0x6a, regvalue, cur_col, wrap) 974260401Sscottl#endif 975260401Sscottl 976260401Sscottl#if AIC_DEBUG_REGISTERS 977260401Sscottlahd_reg_print_t ahd_seloid_print; 978260401Sscottl#else 979260401Sscottl#define ahd_seloid_print(regvalue, cur_col, wrap) \ 980260401Sscottl ahd_print_register(NULL, 0, "SELOID", 0x6b, regvalue, cur_col, wrap) 981260401Sscottl#endif 982260401Sscottl 983260401Sscottl#if AIC_DEBUG_REGISTERS 984260401Sscottlahd_reg_print_t ahd_fairness_print; 985260401Sscottl#else 986260401Sscottl#define ahd_fairness_print(regvalue, cur_col, wrap) \ 987260401Sscottl ahd_print_register(NULL, 0, "FAIRNESS", 0x6c, regvalue, cur_col, wrap) 988260401Sscottl#endif 989260401Sscottl 990260401Sscottl#if AIC_DEBUG_REGISTERS 991260401Sscottlahd_reg_print_t ahd_pll400ctl0_print; 992260401Sscottl#else 993260401Sscottl#define ahd_pll400ctl0_print(regvalue, cur_col, wrap) \ 994260401Sscottl ahd_print_register(NULL, 0, "PLL400CTL0", 0x6c, regvalue, cur_col, wrap) 995260401Sscottl#endif 996260401Sscottl 997260401Sscottl#if AIC_DEBUG_REGISTERS 998260401Sscottlahd_reg_print_t ahd_pll400ctl1_print; 999260401Sscottl#else 1000260401Sscottl#define ahd_pll400ctl1_print(regvalue, cur_col, wrap) \ 1001260401Sscottl ahd_print_register(NULL, 0, "PLL400CTL1", 0x6d, regvalue, cur_col, wrap) 1002260401Sscottl#endif 1003260401Sscottl 1004260401Sscottl#if AIC_DEBUG_REGISTERS 1005260401Sscottlahd_reg_print_t ahd_pll400cnt0_print; 1006260401Sscottl#else 1007260401Sscottl#define ahd_pll400cnt0_print(regvalue, cur_col, wrap) \ 1008260401Sscottl ahd_print_register(NULL, 0, "PLL400CNT0", 0x6e, regvalue, cur_col, wrap) 1009260401Sscottl#endif 1010260401Sscottl 1011260401Sscottl#if AIC_DEBUG_REGISTERS 1012260401Sscottlahd_reg_print_t ahd_unfairness_print; 1013260401Sscottl#else 1014260401Sscottl#define ahd_unfairness_print(regvalue, cur_col, wrap) \ 1015260401Sscottl ahd_print_register(NULL, 0, "UNFAIRNESS", 0x6e, regvalue, cur_col, wrap) 1016260401Sscottl#endif 1017260401Sscottl 1018260401Sscottl#if AIC_DEBUG_REGISTERS 1019260401Sscottlahd_reg_print_t ahd_hodmaadr_print; 1020260401Sscottl#else 1021260401Sscottl#define ahd_hodmaadr_print(regvalue, cur_col, wrap) \ 1022260401Sscottl ahd_print_register(NULL, 0, "HODMAADR", 0x70, regvalue, cur_col, wrap) 1023260401Sscottl#endif 1024260401Sscottl 1025260401Sscottl#if AIC_DEBUG_REGISTERS 1026260401Sscottlahd_reg_print_t ahd_haddr_print; 1027260401Sscottl#else 1028260401Sscottl#define ahd_haddr_print(regvalue, cur_col, wrap) \ 1029260401Sscottl ahd_print_register(NULL, 0, "HADDR", 0x70, regvalue, cur_col, wrap) 1030260401Sscottl#endif 1031260401Sscottl 1032260401Sscottl#if AIC_DEBUG_REGISTERS 1033260401Sscottlahd_reg_print_t ahd_plldelay_print; 1034260401Sscottl#else 1035260401Sscottl#define ahd_plldelay_print(regvalue, cur_col, wrap) \ 1036260401Sscottl ahd_print_register(NULL, 0, "PLLDELAY", 0x70, regvalue, cur_col, wrap) 1037260401Sscottl#endif 1038260401Sscottl 1039260401Sscottl#if AIC_DEBUG_REGISTERS 1040260401Sscottlahd_reg_print_t ahd_hcnt_print; 1041260401Sscottl#else 1042260401Sscottl#define ahd_hcnt_print(regvalue, cur_col, wrap) \ 1043260401Sscottl ahd_print_register(NULL, 0, "HCNT", 0x78, regvalue, cur_col, wrap) 1044260401Sscottl#endif 1045260401Sscottl 1046260401Sscottl#if AIC_DEBUG_REGISTERS 1047260401Sscottlahd_reg_print_t ahd_hodmacnt_print; 1048260401Sscottl#else 1049260401Sscottl#define ahd_hodmacnt_print(regvalue, cur_col, wrap) \ 1050260401Sscottl ahd_print_register(NULL, 0, "HODMACNT", 0x78, regvalue, cur_col, wrap) 1051260401Sscottl#endif 1052260401Sscottl 1053260401Sscottl#if AIC_DEBUG_REGISTERS 1054260401Sscottlahd_reg_print_t ahd_hodmaen_print; 1055260401Sscottl#else 1056260401Sscottl#define ahd_hodmaen_print(regvalue, cur_col, wrap) \ 1057260401Sscottl ahd_print_register(NULL, 0, "HODMAEN", 0x7a, regvalue, cur_col, wrap) 1058260401Sscottl#endif 1059260401Sscottl 1060260401Sscottl#if AIC_DEBUG_REGISTERS 1061260401Sscottlahd_reg_print_t ahd_scbhaddr_print; 1062260401Sscottl#else 1063260401Sscottl#define ahd_scbhaddr_print(regvalue, cur_col, wrap) \ 1064260401Sscottl ahd_print_register(NULL, 0, "SCBHADDR", 0x7c, regvalue, cur_col, wrap) 1065260401Sscottl#endif 1066260401Sscottl 1067260401Sscottl#if AIC_DEBUG_REGISTERS 1068260401Sscottlahd_reg_print_t ahd_sghaddr_print; 1069260401Sscottl#else 1070260401Sscottl#define ahd_sghaddr_print(regvalue, cur_col, wrap) \ 1071260401Sscottl ahd_print_register(NULL, 0, "SGHADDR", 0x7c, regvalue, cur_col, wrap) 1072260401Sscottl#endif 1073260401Sscottl 1074260401Sscottl#if AIC_DEBUG_REGISTERS 1075260401Sscottlahd_reg_print_t ahd_scbhcnt_print; 1076260401Sscottl#else 1077260401Sscottl#define ahd_scbhcnt_print(regvalue, cur_col, wrap) \ 1078260401Sscottl ahd_print_register(NULL, 0, "SCBHCNT", 0x84, regvalue, cur_col, wrap) 1079260401Sscottl#endif 1080260401Sscottl 1081260401Sscottl#if AIC_DEBUG_REGISTERS 1082260401Sscottlahd_reg_print_t ahd_sghcnt_print; 1083260401Sscottl#else 1084260401Sscottl#define ahd_sghcnt_print(regvalue, cur_col, wrap) \ 1085260401Sscottl ahd_print_register(NULL, 0, "SGHCNT", 0x84, regvalue, cur_col, wrap) 1086260401Sscottl#endif 1087260401Sscottl 1088260401Sscottl#if AIC_DEBUG_REGISTERS 1089260401Sscottlahd_reg_print_t ahd_dff_thrsh_print; 1090260401Sscottl#else 1091260401Sscottl#define ahd_dff_thrsh_print(regvalue, cur_col, wrap) \ 1092260401Sscottl ahd_print_register(NULL, 0, "DFF_THRSH", 0x88, regvalue, cur_col, wrap) 1093260401Sscottl#endif 1094260401Sscottl 1095260401Sscottl#if AIC_DEBUG_REGISTERS 1096260401Sscottlahd_reg_print_t ahd_romaddr_print; 1097260401Sscottl#else 1098260401Sscottl#define ahd_romaddr_print(regvalue, cur_col, wrap) \ 1099260401Sscottl ahd_print_register(NULL, 0, "ROMADDR", 0x8a, regvalue, cur_col, wrap) 1100260401Sscottl#endif 1101260401Sscottl 1102260401Sscottl#if AIC_DEBUG_REGISTERS 1103260401Sscottlahd_reg_print_t ahd_romcntrl_print; 1104260401Sscottl#else 1105260401Sscottl#define ahd_romcntrl_print(regvalue, cur_col, wrap) \ 1106260401Sscottl ahd_print_register(NULL, 0, "ROMCNTRL", 0x8d, regvalue, cur_col, wrap) 1107260401Sscottl#endif 1108260401Sscottl 1109260401Sscottl#if AIC_DEBUG_REGISTERS 1110260401Sscottlahd_reg_print_t ahd_romdata_print; 1111260401Sscottl#else 1112260401Sscottl#define ahd_romdata_print(regvalue, cur_col, wrap) \ 1113260401Sscottl ahd_print_register(NULL, 0, "ROMDATA", 0x8e, regvalue, cur_col, wrap) 1114260401Sscottl#endif 1115260401Sscottl 1116260401Sscottl#if AIC_DEBUG_REGISTERS 1117260401Sscottlahd_reg_print_t ahd_dchrxmsg0_print; 1118260401Sscottl#else 1119260401Sscottl#define ahd_dchrxmsg0_print(regvalue, cur_col, wrap) \ 1120260401Sscottl ahd_print_register(NULL, 0, "DCHRXMSG0", 0x90, regvalue, cur_col, wrap) 1121260401Sscottl#endif 1122260401Sscottl 1123260401Sscottl#if AIC_DEBUG_REGISTERS 1124260401Sscottlahd_reg_print_t ahd_ovlyrxmsg0_print; 1125260401Sscottl#else 1126260401Sscottl#define ahd_ovlyrxmsg0_print(regvalue, cur_col, wrap) \ 1127260401Sscottl ahd_print_register(NULL, 0, "OVLYRXMSG0", 0x90, regvalue, cur_col, wrap) 1128260401Sscottl#endif 1129260401Sscottl 1130260401Sscottl#if AIC_DEBUG_REGISTERS 1131260401Sscottlahd_reg_print_t ahd_cmcrxmsg0_print; 1132260401Sscottl#else 1133260401Sscottl#define ahd_cmcrxmsg0_print(regvalue, cur_col, wrap) \ 1134260401Sscottl ahd_print_register(NULL, 0, "CMCRXMSG0", 0x90, regvalue, cur_col, wrap) 1135260401Sscottl#endif 1136260401Sscottl 1137260401Sscottl#if AIC_DEBUG_REGISTERS 1138260401Sscottlahd_reg_print_t ahd_roenable_print; 1139260401Sscottl#else 1140260401Sscottl#define ahd_roenable_print(regvalue, cur_col, wrap) \ 1141260401Sscottl ahd_print_register(NULL, 0, "ROENABLE", 0x90, regvalue, cur_col, wrap) 1142260401Sscottl#endif 1143260401Sscottl 1144260401Sscottl#if AIC_DEBUG_REGISTERS 1145260401Sscottlahd_reg_print_t ahd_dchrxmsg1_print; 1146260401Sscottl#else 1147260401Sscottl#define ahd_dchrxmsg1_print(regvalue, cur_col, wrap) \ 1148260401Sscottl ahd_print_register(NULL, 0, "DCHRXMSG1", 0x91, regvalue, cur_col, wrap) 1149260401Sscottl#endif 1150260401Sscottl 1151260401Sscottl#if AIC_DEBUG_REGISTERS 1152260401Sscottlahd_reg_print_t ahd_ovlyrxmsg1_print; 1153260401Sscottl#else 1154260401Sscottl#define ahd_ovlyrxmsg1_print(regvalue, cur_col, wrap) \ 1155260401Sscottl ahd_print_register(NULL, 0, "OVLYRXMSG1", 0x91, regvalue, cur_col, wrap) 1156260401Sscottl#endif 1157260401Sscottl 1158260401Sscottl#if AIC_DEBUG_REGISTERS 1159260401Sscottlahd_reg_print_t ahd_cmcrxmsg1_print; 1160260401Sscottl#else 1161260401Sscottl#define ahd_cmcrxmsg1_print(regvalue, cur_col, wrap) \ 1162260401Sscottl ahd_print_register(NULL, 0, "CMCRXMSG1", 0x91, regvalue, cur_col, wrap) 1163260401Sscottl#endif 1164260401Sscottl 1165260401Sscottl#if AIC_DEBUG_REGISTERS 1166260401Sscottlahd_reg_print_t ahd_nsenable_print; 1167260401Sscottl#else 1168260401Sscottl#define ahd_nsenable_print(regvalue, cur_col, wrap) \ 1169260401Sscottl ahd_print_register(NULL, 0, "NSENABLE", 0x91, regvalue, cur_col, wrap) 1170260401Sscottl#endif 1171260401Sscottl 1172260401Sscottl#if AIC_DEBUG_REGISTERS 1173260401Sscottlahd_reg_print_t ahd_dchrxmsg2_print; 1174260401Sscottl#else 1175260401Sscottl#define ahd_dchrxmsg2_print(regvalue, cur_col, wrap) \ 1176260401Sscottl ahd_print_register(NULL, 0, "DCHRXMSG2", 0x92, regvalue, cur_col, wrap) 1177260401Sscottl#endif 1178260401Sscottl 1179260401Sscottl#if AIC_DEBUG_REGISTERS 1180260401Sscottlahd_reg_print_t ahd_ovlyrxmsg2_print; 1181260401Sscottl#else 1182260401Sscottl#define ahd_ovlyrxmsg2_print(regvalue, cur_col, wrap) \ 1183260401Sscottl ahd_print_register(NULL, 0, "OVLYRXMSG2", 0x92, regvalue, cur_col, wrap) 1184260401Sscottl#endif 1185260401Sscottl 1186260401Sscottl#if AIC_DEBUG_REGISTERS 1187260401Sscottlahd_reg_print_t ahd_cmcrxmsg2_print; 1188260401Sscottl#else 1189260401Sscottl#define ahd_cmcrxmsg2_print(regvalue, cur_col, wrap) \ 1190260401Sscottl ahd_print_register(NULL, 0, "CMCRXMSG2", 0x92, regvalue, cur_col, wrap) 1191260401Sscottl#endif 1192260401Sscottl 1193260401Sscottl#if AIC_DEBUG_REGISTERS 1194260401Sscottlahd_reg_print_t ahd_ost_print; 1195260401Sscottl#else 1196260401Sscottl#define ahd_ost_print(regvalue, cur_col, wrap) \ 1197260401Sscottl ahd_print_register(NULL, 0, "OST", 0x92, regvalue, cur_col, wrap) 1198260401Sscottl#endif 1199260401Sscottl 1200260401Sscottl#if AIC_DEBUG_REGISTERS 1201260401Sscottlahd_reg_print_t ahd_dchrxmsg3_print; 1202260401Sscottl#else 1203260401Sscottl#define ahd_dchrxmsg3_print(regvalue, cur_col, wrap) \ 1204260401Sscottl ahd_print_register(NULL, 0, "DCHRXMSG3", 0x93, regvalue, cur_col, wrap) 1205260401Sscottl#endif 1206260401Sscottl 1207260401Sscottl#if AIC_DEBUG_REGISTERS 1208260401Sscottlahd_reg_print_t ahd_ovlyrxmsg3_print; 1209260401Sscottl#else 1210260401Sscottl#define ahd_ovlyrxmsg3_print(regvalue, cur_col, wrap) \ 1211260401Sscottl ahd_print_register(NULL, 0, "OVLYRXMSG3", 0x93, regvalue, cur_col, wrap) 1212260401Sscottl#endif 1213260401Sscottl 1214260401Sscottl#if AIC_DEBUG_REGISTERS 1215260401Sscottlahd_reg_print_t ahd_cmcrxmsg3_print; 1216260401Sscottl#else 1217260401Sscottl#define ahd_cmcrxmsg3_print(regvalue, cur_col, wrap) \ 1218260401Sscottl ahd_print_register(NULL, 0, "CMCRXMSG3", 0x93, regvalue, cur_col, wrap) 1219260401Sscottl#endif 1220260401Sscottl 1221260401Sscottl#if AIC_DEBUG_REGISTERS 1222260401Sscottlahd_reg_print_t ahd_pcixctl_print; 1223260401Sscottl#else 1224260401Sscottl#define ahd_pcixctl_print(regvalue, cur_col, wrap) \ 1225260401Sscottl ahd_print_register(NULL, 0, "PCIXCTL", 0x93, regvalue, cur_col, wrap) 1226260401Sscottl#endif 1227260401Sscottl 1228260401Sscottl#if AIC_DEBUG_REGISTERS 1229260401Sscottlahd_reg_print_t ahd_cmcseqbcnt_print; 1230260401Sscottl#else 1231260401Sscottl#define ahd_cmcseqbcnt_print(regvalue, cur_col, wrap) \ 1232260401Sscottl ahd_print_register(NULL, 0, "CMCSEQBCNT", 0x94, regvalue, cur_col, wrap) 1233260401Sscottl#endif 1234260401Sscottl 1235260401Sscottl#if AIC_DEBUG_REGISTERS 1236260401Sscottlahd_reg_print_t ahd_dchseqbcnt_print; 1237260401Sscottl#else 1238260401Sscottl#define ahd_dchseqbcnt_print(regvalue, cur_col, wrap) \ 1239260401Sscottl ahd_print_register(NULL, 0, "DCHSEQBCNT", 0x94, regvalue, cur_col, wrap) 1240260401Sscottl#endif 1241260401Sscottl 1242260401Sscottl#if AIC_DEBUG_REGISTERS 1243260401Sscottlahd_reg_print_t ahd_ovlyseqbcnt_print; 1244260401Sscottl#else 1245260401Sscottl#define ahd_ovlyseqbcnt_print(regvalue, cur_col, wrap) \ 1246260401Sscottl ahd_print_register(NULL, 0, "OVLYSEQBCNT", 0x94, regvalue, cur_col, wrap) 1247260401Sscottl#endif 1248260401Sscottl 1249260401Sscottl#if AIC_DEBUG_REGISTERS 1250260401Sscottlahd_reg_print_t ahd_cmcspltstat0_print; 1251260401Sscottl#else 1252260401Sscottl#define ahd_cmcspltstat0_print(regvalue, cur_col, wrap) \ 1253260401Sscottl ahd_print_register(NULL, 0, "CMCSPLTSTAT0", 0x96, regvalue, cur_col, wrap) 1254260401Sscottl#endif 1255260401Sscottl 1256260401Sscottl#if AIC_DEBUG_REGISTERS 1257260401Sscottlahd_reg_print_t ahd_dchspltstat0_print; 1258260401Sscottl#else 1259260401Sscottl#define ahd_dchspltstat0_print(regvalue, cur_col, wrap) \ 1260260401Sscottl ahd_print_register(NULL, 0, "DCHSPLTSTAT0", 0x96, regvalue, cur_col, wrap) 1261260401Sscottl#endif 1262260401Sscottl 1263260401Sscottl#if AIC_DEBUG_REGISTERS 1264260401Sscottlahd_reg_print_t ahd_ovlyspltstat0_print; 1265260401Sscottl#else 1266260401Sscottl#define ahd_ovlyspltstat0_print(regvalue, cur_col, wrap) \ 1267260401Sscottl ahd_print_register(NULL, 0, "OVLYSPLTSTAT0", 0x96, regvalue, cur_col, wrap) 1268260401Sscottl#endif 1269260401Sscottl 1270260401Sscottl#if AIC_DEBUG_REGISTERS 1271260401Sscottlahd_reg_print_t ahd_cmcspltstat1_print; 1272260401Sscottl#else 1273260401Sscottl#define ahd_cmcspltstat1_print(regvalue, cur_col, wrap) \ 1274260401Sscottl ahd_print_register(NULL, 0, "CMCSPLTSTAT1", 0x97, regvalue, cur_col, wrap) 1275260401Sscottl#endif 1276260401Sscottl 1277260401Sscottl#if AIC_DEBUG_REGISTERS 1278260401Sscottlahd_reg_print_t ahd_dchspltstat1_print; 1279260401Sscottl#else 1280260401Sscottl#define ahd_dchspltstat1_print(regvalue, cur_col, wrap) \ 1281260401Sscottl ahd_print_register(NULL, 0, "DCHSPLTSTAT1", 0x97, regvalue, cur_col, wrap) 1282260401Sscottl#endif 1283260401Sscottl 1284260401Sscottl#if AIC_DEBUG_REGISTERS 1285260401Sscottlahd_reg_print_t ahd_ovlyspltstat1_print; 1286260401Sscottl#else 1287260401Sscottl#define ahd_ovlyspltstat1_print(regvalue, cur_col, wrap) \ 1288260401Sscottl ahd_print_register(NULL, 0, "OVLYSPLTSTAT1", 0x97, regvalue, cur_col, wrap) 1289260401Sscottl#endif 1290260401Sscottl 1291260401Sscottl#if AIC_DEBUG_REGISTERS 1292260401Sscottlahd_reg_print_t ahd_sgrxmsg0_print; 1293260401Sscottl#else 1294260401Sscottl#define ahd_sgrxmsg0_print(regvalue, cur_col, wrap) \ 1295260401Sscottl ahd_print_register(NULL, 0, "SGRXMSG0", 0x98, regvalue, cur_col, wrap) 1296260401Sscottl#endif 1297260401Sscottl 1298260401Sscottl#if AIC_DEBUG_REGISTERS 1299260401Sscottlahd_reg_print_t ahd_slvspltoutadr0_print; 1300260401Sscottl#else 1301260401Sscottl#define ahd_slvspltoutadr0_print(regvalue, cur_col, wrap) \ 1302260401Sscottl ahd_print_register(NULL, 0, "SLVSPLTOUTADR0", 0x98, regvalue, cur_col, wrap) 1303260401Sscottl#endif 1304260401Sscottl 1305260401Sscottl#if AIC_DEBUG_REGISTERS 1306260401Sscottlahd_reg_print_t ahd_sgrxmsg1_print; 1307260401Sscottl#else 1308260401Sscottl#define ahd_sgrxmsg1_print(regvalue, cur_col, wrap) \ 1309260401Sscottl ahd_print_register(NULL, 0, "SGRXMSG1", 0x99, regvalue, cur_col, wrap) 1310260401Sscottl#endif 1311260401Sscottl 1312260401Sscottl#if AIC_DEBUG_REGISTERS 1313260401Sscottlahd_reg_print_t ahd_slvspltoutadr1_print; 1314260401Sscottl#else 1315260401Sscottl#define ahd_slvspltoutadr1_print(regvalue, cur_col, wrap) \ 1316260401Sscottl ahd_print_register(NULL, 0, "SLVSPLTOUTADR1", 0x99, regvalue, cur_col, wrap) 1317260401Sscottl#endif 1318260401Sscottl 1319260401Sscottl#if AIC_DEBUG_REGISTERS 1320260401Sscottlahd_reg_print_t ahd_sgrxmsg2_print; 1321260401Sscottl#else 1322260401Sscottl#define ahd_sgrxmsg2_print(regvalue, cur_col, wrap) \ 1323260401Sscottl ahd_print_register(NULL, 0, "SGRXMSG2", 0x9a, regvalue, cur_col, wrap) 1324260401Sscottl#endif 1325260401Sscottl 1326260401Sscottl#if AIC_DEBUG_REGISTERS 1327260401Sscottlahd_reg_print_t ahd_slvspltoutadr2_print; 1328260401Sscottl#else 1329260401Sscottl#define ahd_slvspltoutadr2_print(regvalue, cur_col, wrap) \ 1330260401Sscottl ahd_print_register(NULL, 0, "SLVSPLTOUTADR2", 0x9a, regvalue, cur_col, wrap) 1331260401Sscottl#endif 1332260401Sscottl 1333260401Sscottl#if AIC_DEBUG_REGISTERS 1334260401Sscottlahd_reg_print_t ahd_sgrxmsg3_print; 1335260401Sscottl#else 1336260401Sscottl#define ahd_sgrxmsg3_print(regvalue, cur_col, wrap) \ 1337260401Sscottl ahd_print_register(NULL, 0, "SGRXMSG3", 0x9b, regvalue, cur_col, wrap) 1338260401Sscottl#endif 1339260401Sscottl 1340260401Sscottl#if AIC_DEBUG_REGISTERS 1341260401Sscottlahd_reg_print_t ahd_slvspltoutadr3_print; 1342260401Sscottl#else 1343260401Sscottl#define ahd_slvspltoutadr3_print(regvalue, cur_col, wrap) \ 1344260401Sscottl ahd_print_register(NULL, 0, "SLVSPLTOUTADR3", 0x9b, regvalue, cur_col, wrap) 1345260401Sscottl#endif 1346260401Sscottl 1347260401Sscottl#if AIC_DEBUG_REGISTERS 1348260401Sscottlahd_reg_print_t ahd_slvspltoutattr0_print; 1349260401Sscottl#else 1350260401Sscottl#define ahd_slvspltoutattr0_print(regvalue, cur_col, wrap) \ 1351260401Sscottl ahd_print_register(NULL, 0, "SLVSPLTOUTATTR0", 0x9c, regvalue, cur_col, wrap) 1352260401Sscottl#endif 1353260401Sscottl 1354260401Sscottl#if AIC_DEBUG_REGISTERS 1355260401Sscottlahd_reg_print_t ahd_sgseqbcnt_print; 1356260401Sscottl#else 1357260401Sscottl#define ahd_sgseqbcnt_print(regvalue, cur_col, wrap) \ 1358260401Sscottl ahd_print_register(NULL, 0, "SGSEQBCNT", 0x9c, regvalue, cur_col, wrap) 1359260401Sscottl#endif 1360260401Sscottl 1361260401Sscottl#if AIC_DEBUG_REGISTERS 1362260401Sscottlahd_reg_print_t ahd_slvspltoutattr1_print; 1363260401Sscottl#else 1364260401Sscottl#define ahd_slvspltoutattr1_print(regvalue, cur_col, wrap) \ 1365260401Sscottl ahd_print_register(NULL, 0, "SLVSPLTOUTATTR1", 0x9d, regvalue, cur_col, wrap) 1366260401Sscottl#endif 1367260401Sscottl 1368260401Sscottl#if AIC_DEBUG_REGISTERS 1369260401Sscottlahd_reg_print_t ahd_slvspltoutattr2_print; 1370260401Sscottl#else 1371260401Sscottl#define ahd_slvspltoutattr2_print(regvalue, cur_col, wrap) \ 1372260401Sscottl ahd_print_register(NULL, 0, "SLVSPLTOUTATTR2", 0x9e, regvalue, cur_col, wrap) 1373260401Sscottl#endif 1374260401Sscottl 1375260401Sscottl#if AIC_DEBUG_REGISTERS 1376260401Sscottlahd_reg_print_t ahd_sgspltstat0_print; 1377260401Sscottl#else 1378260401Sscottl#define ahd_sgspltstat0_print(regvalue, cur_col, wrap) \ 1379260401Sscottl ahd_print_register(NULL, 0, "SGSPLTSTAT0", 0x9e, regvalue, cur_col, wrap) 1380260401Sscottl#endif 1381260401Sscottl 1382260401Sscottl#if AIC_DEBUG_REGISTERS 1383260401Sscottlahd_reg_print_t ahd_sfunct_print; 1384260401Sscottl#else 1385260401Sscottl#define ahd_sfunct_print(regvalue, cur_col, wrap) \ 1386260401Sscottl ahd_print_register(NULL, 0, "SFUNCT", 0x9f, regvalue, cur_col, wrap) 1387260401Sscottl#endif 1388260401Sscottl 1389260401Sscottl#if AIC_DEBUG_REGISTERS 1390260401Sscottlahd_reg_print_t ahd_sgspltstat1_print; 1391260401Sscottl#else 1392260401Sscottl#define ahd_sgspltstat1_print(regvalue, cur_col, wrap) \ 1393260401Sscottl ahd_print_register(NULL, 0, "SGSPLTSTAT1", 0x9f, regvalue, cur_col, wrap) 1394260401Sscottl#endif 1395260401Sscottl 1396260401Sscottl#if AIC_DEBUG_REGISTERS 1397260401Sscottlahd_reg_print_t ahd_df0pcistat_print; 1398260401Sscottl#else 1399260401Sscottl#define ahd_df0pcistat_print(regvalue, cur_col, wrap) \ 1400260401Sscottl ahd_print_register(NULL, 0, "DF0PCISTAT", 0xa0, regvalue, cur_col, wrap) 1401260401Sscottl#endif 1402260401Sscottl 1403260401Sscottl#if AIC_DEBUG_REGISTERS 1404260401Sscottlahd_reg_print_t ahd_reg0_print; 1405260401Sscottl#else 1406260401Sscottl#define ahd_reg0_print(regvalue, cur_col, wrap) \ 1407260401Sscottl ahd_print_register(NULL, 0, "REG0", 0xa0, regvalue, cur_col, wrap) 1408260401Sscottl#endif 1409260401Sscottl 1410260401Sscottl#if AIC_DEBUG_REGISTERS 1411260401Sscottlahd_reg_print_t ahd_df1pcistat_print; 1412260401Sscottl#else 1413260401Sscottl#define ahd_df1pcistat_print(regvalue, cur_col, wrap) \ 1414260401Sscottl ahd_print_register(NULL, 0, "DF1PCISTAT", 0xa1, regvalue, cur_col, wrap) 1415260401Sscottl#endif 1416260401Sscottl 1417260401Sscottl#if AIC_DEBUG_REGISTERS 1418260401Sscottlahd_reg_print_t ahd_sgpcistat_print; 1419260401Sscottl#else 1420260401Sscottl#define ahd_sgpcistat_print(regvalue, cur_col, wrap) \ 1421260401Sscottl ahd_print_register(NULL, 0, "SGPCISTAT", 0xa2, regvalue, cur_col, wrap) 1422260401Sscottl#endif 1423260401Sscottl 1424260401Sscottl#if AIC_DEBUG_REGISTERS 1425260401Sscottlahd_reg_print_t ahd_reg1_print; 1426260401Sscottl#else 1427260401Sscottl#define ahd_reg1_print(regvalue, cur_col, wrap) \ 1428260401Sscottl ahd_print_register(NULL, 0, "REG1", 0xa2, regvalue, cur_col, wrap) 1429260401Sscottl#endif 1430260401Sscottl 1431260401Sscottl#if AIC_DEBUG_REGISTERS 1432260401Sscottlahd_reg_print_t ahd_cmcpcistat_print; 1433260401Sscottl#else 1434260401Sscottl#define ahd_cmcpcistat_print(regvalue, cur_col, wrap) \ 1435260401Sscottl ahd_print_register(NULL, 0, "CMCPCISTAT", 0xa3, regvalue, cur_col, wrap) 1436260401Sscottl#endif 1437260401Sscottl 1438260401Sscottl#if AIC_DEBUG_REGISTERS 1439260401Sscottlahd_reg_print_t ahd_ovlypcistat_print; 1440260401Sscottl#else 1441260401Sscottl#define ahd_ovlypcistat_print(regvalue, cur_col, wrap) \ 1442260401Sscottl ahd_print_register(NULL, 0, "OVLYPCISTAT", 0xa4, regvalue, cur_col, wrap) 1443260401Sscottl#endif 1444260401Sscottl 1445260401Sscottl#if AIC_DEBUG_REGISTERS 1446260401Sscottlahd_reg_print_t ahd_reg_isr_print; 1447260401Sscottl#else 1448260401Sscottl#define ahd_reg_isr_print(regvalue, cur_col, wrap) \ 1449260401Sscottl ahd_print_register(NULL, 0, "REG_ISR", 0xa4, regvalue, cur_col, wrap) 1450260401Sscottl#endif 1451260401Sscottl 1452260401Sscottl#if AIC_DEBUG_REGISTERS 1453260401Sscottlahd_reg_print_t ahd_msipcistat_print; 1454260401Sscottl#else 1455260401Sscottl#define ahd_msipcistat_print(regvalue, cur_col, wrap) \ 1456260401Sscottl ahd_print_register(NULL, 0, "MSIPCISTAT", 0xa6, regvalue, cur_col, wrap) 1457260401Sscottl#endif 1458260401Sscottl 1459260401Sscottl#if AIC_DEBUG_REGISTERS 1460260401Sscottlahd_reg_print_t ahd_sg_state_print; 1461260401Sscottl#else 1462260401Sscottl#define ahd_sg_state_print(regvalue, cur_col, wrap) \ 1463260401Sscottl ahd_print_register(NULL, 0, "SG_STATE", 0xa6, regvalue, cur_col, wrap) 1464260401Sscottl#endif 1465260401Sscottl 1466260401Sscottl#if AIC_DEBUG_REGISTERS 1467260401Sscottlahd_reg_print_t ahd_targpcistat_print; 1468260401Sscottl#else 1469260401Sscottl#define ahd_targpcistat_print(regvalue, cur_col, wrap) \ 1470260401Sscottl ahd_print_register(NULL, 0, "TARGPCISTAT", 0xa7, regvalue, cur_col, wrap) 1471260401Sscottl#endif 1472260401Sscottl 1473260401Sscottl#if AIC_DEBUG_REGISTERS 1474260401Sscottlahd_reg_print_t ahd_data_count_odd_print; 1475260401Sscottl#else 1476260401Sscottl#define ahd_data_count_odd_print(regvalue, cur_col, wrap) \ 1477260401Sscottl ahd_print_register(NULL, 0, "DATA_COUNT_ODD", 0xa7, regvalue, cur_col, wrap) 1478260401Sscottl#endif 1479260401Sscottl 1480260401Sscottl#if AIC_DEBUG_REGISTERS 1481260401Sscottlahd_reg_print_t ahd_scbptr_print; 1482260401Sscottl#else 1483260401Sscottl#define ahd_scbptr_print(regvalue, cur_col, wrap) \ 1484260401Sscottl ahd_print_register(NULL, 0, "SCBPTR", 0xa8, regvalue, cur_col, wrap) 1485260401Sscottl#endif 1486260401Sscottl 1487260401Sscottl#if AIC_DEBUG_REGISTERS 1488260401Sscottlahd_reg_print_t ahd_ccscbacnt_print; 1489260401Sscottl#else 1490260401Sscottl#define ahd_ccscbacnt_print(regvalue, cur_col, wrap) \ 1491260401Sscottl ahd_print_register(NULL, 0, "CCSCBACNT", 0xab, regvalue, cur_col, wrap) 1492260401Sscottl#endif 1493260401Sscottl 1494260401Sscottl#if AIC_DEBUG_REGISTERS 1495260401Sscottlahd_reg_print_t ahd_scbautoptr_print; 1496260401Sscottl#else 1497260401Sscottl#define ahd_scbautoptr_print(regvalue, cur_col, wrap) \ 1498260401Sscottl ahd_print_register(NULL, 0, "SCBAUTOPTR", 0xab, regvalue, cur_col, wrap) 1499260401Sscottl#endif 1500260401Sscottl 1501260401Sscottl#if AIC_DEBUG_REGISTERS 1502260401Sscottlahd_reg_print_t ahd_ccscbadr_bk_print; 1503260401Sscottl#else 1504260401Sscottl#define ahd_ccscbadr_bk_print(regvalue, cur_col, wrap) \ 1505260401Sscottl ahd_print_register(NULL, 0, "CCSCBADR_BK", 0xac, regvalue, cur_col, wrap) 1506260401Sscottl#endif 1507260401Sscottl 1508260401Sscottl#if AIC_DEBUG_REGISTERS 1509260401Sscottlahd_reg_print_t ahd_ccsgaddr_print; 1510260401Sscottl#else 1511260401Sscottl#define ahd_ccsgaddr_print(regvalue, cur_col, wrap) \ 1512260401Sscottl ahd_print_register(NULL, 0, "CCSGADDR", 0xac, regvalue, cur_col, wrap) 1513260401Sscottl#endif 1514260401Sscottl 1515260401Sscottl#if AIC_DEBUG_REGISTERS 1516260401Sscottlahd_reg_print_t ahd_ccscbaddr_print; 1517260401Sscottl#else 1518260401Sscottl#define ahd_ccscbaddr_print(regvalue, cur_col, wrap) \ 1519260401Sscottl ahd_print_register(NULL, 0, "CCSCBADDR", 0xac, regvalue, cur_col, wrap) 1520260401Sscottl#endif 1521260401Sscottl 1522260401Sscottl#if AIC_DEBUG_REGISTERS 1523260401Sscottlahd_reg_print_t ahd_ccscbctl_print; 1524260401Sscottl#else 1525260401Sscottl#define ahd_ccscbctl_print(regvalue, cur_col, wrap) \ 1526260401Sscottl ahd_print_register(NULL, 0, "CCSCBCTL", 0xad, regvalue, cur_col, wrap) 1527260401Sscottl#endif 1528260401Sscottl 1529260401Sscottl#if AIC_DEBUG_REGISTERS 1530260401Sscottlahd_reg_print_t ahd_ccsgctl_print; 1531260401Sscottl#else 1532260401Sscottl#define ahd_ccsgctl_print(regvalue, cur_col, wrap) \ 1533260401Sscottl ahd_print_register(NULL, 0, "CCSGCTL", 0xad, regvalue, cur_col, wrap) 1534260401Sscottl#endif 1535260401Sscottl 1536260401Sscottl#if AIC_DEBUG_REGISTERS 1537260401Sscottlahd_reg_print_t ahd_cmc_rambist_print; 1538260401Sscottl#else 1539260401Sscottl#define ahd_cmc_rambist_print(regvalue, cur_col, wrap) \ 1540260401Sscottl ahd_print_register(NULL, 0, "CMC_RAMBIST", 0xad, regvalue, cur_col, wrap) 1541260401Sscottl#endif 1542260401Sscottl 1543260401Sscottl#if AIC_DEBUG_REGISTERS 1544260401Sscottlahd_reg_print_t ahd_ccsgram_print; 1545260401Sscottl#else 1546260401Sscottl#define ahd_ccsgram_print(regvalue, cur_col, wrap) \ 1547260401Sscottl ahd_print_register(NULL, 0, "CCSGRAM", 0xb0, regvalue, cur_col, wrap) 1548260401Sscottl#endif 1549260401Sscottl 1550260401Sscottl#if AIC_DEBUG_REGISTERS 1551260401Sscottlahd_reg_print_t ahd_ccscbram_print; 1552260401Sscottl#else 1553260401Sscottl#define ahd_ccscbram_print(regvalue, cur_col, wrap) \ 1554260401Sscottl ahd_print_register(NULL, 0, "CCSCBRAM", 0xb0, regvalue, cur_col, wrap) 1555260401Sscottl#endif 1556260401Sscottl 1557260401Sscottl#if AIC_DEBUG_REGISTERS 1558260401Sscottlahd_reg_print_t ahd_flexadr_print; 1559260401Sscottl#else 1560260401Sscottl#define ahd_flexadr_print(regvalue, cur_col, wrap) \ 1561260401Sscottl ahd_print_register(NULL, 0, "FLEXADR", 0xb0, regvalue, cur_col, wrap) 1562260401Sscottl#endif 1563260401Sscottl 1564260401Sscottl#if AIC_DEBUG_REGISTERS 1565260401Sscottlahd_reg_print_t ahd_flexcnt_print; 1566260401Sscottl#else 1567260401Sscottl#define ahd_flexcnt_print(regvalue, cur_col, wrap) \ 1568260401Sscottl ahd_print_register(NULL, 0, "FLEXCNT", 0xb3, regvalue, cur_col, wrap) 1569260401Sscottl#endif 1570260401Sscottl 1571260401Sscottl#if AIC_DEBUG_REGISTERS 1572260401Sscottlahd_reg_print_t ahd_flexdmastat_print; 1573260401Sscottl#else 1574260401Sscottl#define ahd_flexdmastat_print(regvalue, cur_col, wrap) \ 1575260401Sscottl ahd_print_register(NULL, 0, "FLEXDMASTAT", 0xb5, regvalue, cur_col, wrap) 1576260401Sscottl#endif 1577260401Sscottl 1578260401Sscottl#if AIC_DEBUG_REGISTERS 1579260401Sscottlahd_reg_print_t ahd_flexdata_print; 1580260401Sscottl#else 1581260401Sscottl#define ahd_flexdata_print(regvalue, cur_col, wrap) \ 1582260401Sscottl ahd_print_register(NULL, 0, "FLEXDATA", 0xb6, regvalue, cur_col, wrap) 1583260401Sscottl#endif 1584260401Sscottl 1585260401Sscottl#if AIC_DEBUG_REGISTERS 1586260401Sscottlahd_reg_print_t ahd_brddat_print; 1587260401Sscottl#else 1588260401Sscottl#define ahd_brddat_print(regvalue, cur_col, wrap) \ 1589260401Sscottl ahd_print_register(NULL, 0, "BRDDAT", 0xb8, regvalue, cur_col, wrap) 1590260401Sscottl#endif 1591260401Sscottl 1592260401Sscottl#if AIC_DEBUG_REGISTERS 1593260401Sscottlahd_reg_print_t ahd_brdctl_print; 1594260401Sscottl#else 1595260401Sscottl#define ahd_brdctl_print(regvalue, cur_col, wrap) \ 1596260401Sscottl ahd_print_register(NULL, 0, "BRDCTL", 0xb9, regvalue, cur_col, wrap) 1597260401Sscottl#endif 1598260401Sscottl 1599260401Sscottl#if AIC_DEBUG_REGISTERS 1600260401Sscottlahd_reg_print_t ahd_seeadr_print; 1601260401Sscottl#else 1602260401Sscottl#define ahd_seeadr_print(regvalue, cur_col, wrap) \ 1603260401Sscottl ahd_print_register(NULL, 0, "SEEADR", 0xba, regvalue, cur_col, wrap) 1604260401Sscottl#endif 1605260401Sscottl 1606260401Sscottl#if AIC_DEBUG_REGISTERS 1607260401Sscottlahd_reg_print_t ahd_seedat_print; 1608260401Sscottl#else 1609260401Sscottl#define ahd_seedat_print(regvalue, cur_col, wrap) \ 1610260401Sscottl ahd_print_register(NULL, 0, "SEEDAT", 0xbc, regvalue, cur_col, wrap) 1611260401Sscottl#endif 1612260401Sscottl 1613260401Sscottl#if AIC_DEBUG_REGISTERS 1614260401Sscottlahd_reg_print_t ahd_seectl_print; 1615260401Sscottl#else 1616260401Sscottl#define ahd_seectl_print(regvalue, cur_col, wrap) \ 1617260401Sscottl ahd_print_register(NULL, 0, "SEECTL", 0xbe, regvalue, cur_col, wrap) 1618260401Sscottl#endif 1619260401Sscottl 1620260401Sscottl#if AIC_DEBUG_REGISTERS 1621260401Sscottlahd_reg_print_t ahd_seestat_print; 1622260401Sscottl#else 1623260401Sscottl#define ahd_seestat_print(regvalue, cur_col, wrap) \ 1624260401Sscottl ahd_print_register(NULL, 0, "SEESTAT", 0xbe, regvalue, cur_col, wrap) 1625260401Sscottl#endif 1626260401Sscottl 1627260401Sscottl#if AIC_DEBUG_REGISTERS 1628260401Sscottlahd_reg_print_t ahd_scbcnt_print; 1629260401Sscottl#else 1630260401Sscottl#define ahd_scbcnt_print(regvalue, cur_col, wrap) \ 1631260401Sscottl ahd_print_register(NULL, 0, "SCBCNT", 0xbf, regvalue, cur_col, wrap) 1632260401Sscottl#endif 1633260401Sscottl 1634260401Sscottl#if AIC_DEBUG_REGISTERS 1635260401Sscottlahd_reg_print_t ahd_dspfltrctl_print; 1636260401Sscottl#else 1637260401Sscottl#define ahd_dspfltrctl_print(regvalue, cur_col, wrap) \ 1638260401Sscottl ahd_print_register(NULL, 0, "DSPFLTRCTL", 0xc0, regvalue, cur_col, wrap) 1639260401Sscottl#endif 1640260401Sscottl 1641260401Sscottl#if AIC_DEBUG_REGISTERS 1642260401Sscottlahd_reg_print_t ahd_dfwaddr_print; 1643260401Sscottl#else 1644260401Sscottl#define ahd_dfwaddr_print(regvalue, cur_col, wrap) \ 1645260401Sscottl ahd_print_register(NULL, 0, "DFWADDR", 0xc0, regvalue, cur_col, wrap) 1646260401Sscottl#endif 1647260401Sscottl 1648260401Sscottl#if AIC_DEBUG_REGISTERS 1649260401Sscottlahd_reg_print_t ahd_dspdatactl_print; 1650260401Sscottl#else 1651260401Sscottl#define ahd_dspdatactl_print(regvalue, cur_col, wrap) \ 1652260401Sscottl ahd_print_register(NULL, 0, "DSPDATACTL", 0xc1, regvalue, cur_col, wrap) 1653260401Sscottl#endif 1654260401Sscottl 1655260401Sscottl#if AIC_DEBUG_REGISTERS 1656260401Sscottlahd_reg_print_t ahd_dspreqctl_print; 1657260401Sscottl#else 1658260401Sscottl#define ahd_dspreqctl_print(regvalue, cur_col, wrap) \ 1659260401Sscottl ahd_print_register(NULL, 0, "DSPREQCTL", 0xc2, regvalue, cur_col, wrap) 1660260401Sscottl#endif 1661260401Sscottl 1662260401Sscottl#if AIC_DEBUG_REGISTERS 1663260401Sscottlahd_reg_print_t ahd_dfraddr_print; 1664260401Sscottl#else 1665260401Sscottl#define ahd_dfraddr_print(regvalue, cur_col, wrap) \ 1666260401Sscottl ahd_print_register(NULL, 0, "DFRADDR", 0xc2, regvalue, cur_col, wrap) 1667260401Sscottl#endif 1668260401Sscottl 1669260401Sscottl#if AIC_DEBUG_REGISTERS 1670260401Sscottlahd_reg_print_t ahd_dspackctl_print; 1671260401Sscottl#else 1672260401Sscottl#define ahd_dspackctl_print(regvalue, cur_col, wrap) \ 1673260401Sscottl ahd_print_register(NULL, 0, "DSPACKCTL", 0xc3, regvalue, cur_col, wrap) 1674260401Sscottl#endif 1675260401Sscottl 1676260401Sscottl#if AIC_DEBUG_REGISTERS 1677260401Sscottlahd_reg_print_t ahd_dfdat_print; 1678260401Sscottl#else 1679260401Sscottl#define ahd_dfdat_print(regvalue, cur_col, wrap) \ 1680260401Sscottl ahd_print_register(NULL, 0, "DFDAT", 0xc4, regvalue, cur_col, wrap) 1681260401Sscottl#endif 1682260401Sscottl 1683260401Sscottl#if AIC_DEBUG_REGISTERS 1684260401Sscottlahd_reg_print_t ahd_dspselect_print; 1685260401Sscottl#else 1686260401Sscottl#define ahd_dspselect_print(regvalue, cur_col, wrap) \ 1687260401Sscottl ahd_print_register(NULL, 0, "DSPSELECT", 0xc4, regvalue, cur_col, wrap) 1688260401Sscottl#endif 1689260401Sscottl 1690260401Sscottl#if AIC_DEBUG_REGISTERS 1691260401Sscottlahd_reg_print_t ahd_wrtbiasctl_print; 1692260401Sscottl#else 1693260401Sscottl#define ahd_wrtbiasctl_print(regvalue, cur_col, wrap) \ 1694260401Sscottl ahd_print_register(NULL, 0, "WRTBIASCTL", 0xc5, regvalue, cur_col, wrap) 1695260401Sscottl#endif 1696260401Sscottl 1697260401Sscottl#if AIC_DEBUG_REGISTERS 1698260401Sscottlahd_reg_print_t ahd_rcvrbiosctl_print; 1699260401Sscottl#else 1700260401Sscottl#define ahd_rcvrbiosctl_print(regvalue, cur_col, wrap) \ 1701260401Sscottl ahd_print_register(NULL, 0, "RCVRBIOSCTL", 0xc6, regvalue, cur_col, wrap) 1702260401Sscottl#endif 1703260401Sscottl 1704260401Sscottl#if AIC_DEBUG_REGISTERS 1705260401Sscottlahd_reg_print_t ahd_wrtbiascalc_print; 1706260401Sscottl#else 1707260401Sscottl#define ahd_wrtbiascalc_print(regvalue, cur_col, wrap) \ 1708260401Sscottl ahd_print_register(NULL, 0, "WRTBIASCALC", 0xc7, regvalue, cur_col, wrap) 1709260401Sscottl#endif 1710260401Sscottl 1711260401Sscottl#if AIC_DEBUG_REGISTERS 1712260401Sscottlahd_reg_print_t ahd_dfptrs_print; 1713260401Sscottl#else 1714260401Sscottl#define ahd_dfptrs_print(regvalue, cur_col, wrap) \ 1715260401Sscottl ahd_print_register(NULL, 0, "DFPTRS", 0xc8, regvalue, cur_col, wrap) 1716260401Sscottl#endif 1717260401Sscottl 1718260401Sscottl#if AIC_DEBUG_REGISTERS 1719260401Sscottlahd_reg_print_t ahd_rcvrbiascalc_print; 1720260401Sscottl#else 1721260401Sscottl#define ahd_rcvrbiascalc_print(regvalue, cur_col, wrap) \ 1722260401Sscottl ahd_print_register(NULL, 0, "RCVRBIASCALC", 0xc8, regvalue, cur_col, wrap) 1723260401Sscottl#endif 1724260401Sscottl 1725260401Sscottl#if AIC_DEBUG_REGISTERS 1726260401Sscottlahd_reg_print_t ahd_dfbkptr_print; 1727260401Sscottl#else 1728260401Sscottl#define ahd_dfbkptr_print(regvalue, cur_col, wrap) \ 1729260401Sscottl ahd_print_register(NULL, 0, "DFBKPTR", 0xc9, regvalue, cur_col, wrap) 1730260401Sscottl#endif 1731260401Sscottl 1732260401Sscottl#if AIC_DEBUG_REGISTERS 1733260401Sscottlahd_reg_print_t ahd_skewcalc_print; 1734260401Sscottl#else 1735260401Sscottl#define ahd_skewcalc_print(regvalue, cur_col, wrap) \ 1736260401Sscottl ahd_print_register(NULL, 0, "SKEWCALC", 0xc9, regvalue, cur_col, wrap) 1737260401Sscottl#endif 1738260401Sscottl 1739260401Sscottl#if AIC_DEBUG_REGISTERS 1740260401Sscottlahd_reg_print_t ahd_dfdbctl_print; 1741260401Sscottl#else 1742260401Sscottl#define ahd_dfdbctl_print(regvalue, cur_col, wrap) \ 1743260401Sscottl ahd_print_register(NULL, 0, "DFDBCTL", 0xcb, regvalue, cur_col, wrap) 1744260401Sscottl#endif 1745260401Sscottl 1746260401Sscottl#if AIC_DEBUG_REGISTERS 1747260401Sscottlahd_reg_print_t ahd_dfscnt_print; 1748260401Sscottl#else 1749260401Sscottl#define ahd_dfscnt_print(regvalue, cur_col, wrap) \ 1750260401Sscottl ahd_print_register(NULL, 0, "DFSCNT", 0xcc, regvalue, cur_col, wrap) 1751260401Sscottl#endif 1752260401Sscottl 1753260401Sscottl#if AIC_DEBUG_REGISTERS 1754260401Sscottlahd_reg_print_t ahd_dfbcnt_print; 1755260401Sscottl#else 1756260401Sscottl#define ahd_dfbcnt_print(regvalue, cur_col, wrap) \ 1757260401Sscottl ahd_print_register(NULL, 0, "DFBCNT", 0xce, regvalue, cur_col, wrap) 1758260401Sscottl#endif 1759260401Sscottl 1760260401Sscottl#if AIC_DEBUG_REGISTERS 1761260401Sscottlahd_reg_print_t ahd_ovlyaddr_print; 1762260401Sscottl#else 1763260401Sscottl#define ahd_ovlyaddr_print(regvalue, cur_col, wrap) \ 1764260401Sscottl ahd_print_register(NULL, 0, "OVLYADDR", 0xd4, regvalue, cur_col, wrap) 1765260401Sscottl#endif 1766260401Sscottl 1767260401Sscottl#if AIC_DEBUG_REGISTERS 1768260401Sscottlahd_reg_print_t ahd_seqctl0_print; 1769260401Sscottl#else 1770260401Sscottl#define ahd_seqctl0_print(regvalue, cur_col, wrap) \ 1771260401Sscottl ahd_print_register(NULL, 0, "SEQCTL0", 0xd6, regvalue, cur_col, wrap) 1772260401Sscottl#endif 1773260401Sscottl 1774260401Sscottl#if AIC_DEBUG_REGISTERS 1775260401Sscottlahd_reg_print_t ahd_seqctl1_print; 1776260401Sscottl#else 1777260401Sscottl#define ahd_seqctl1_print(regvalue, cur_col, wrap) \ 1778260401Sscottl ahd_print_register(NULL, 0, "SEQCTL1", 0xd7, regvalue, cur_col, wrap) 1779260401Sscottl#endif 1780260401Sscottl 1781260401Sscottl#if AIC_DEBUG_REGISTERS 1782260401Sscottlahd_reg_print_t ahd_flags_print; 1783260401Sscottl#else 1784260401Sscottl#define ahd_flags_print(regvalue, cur_col, wrap) \ 1785260401Sscottl ahd_print_register(NULL, 0, "FLAGS", 0xd8, regvalue, cur_col, wrap) 1786260401Sscottl#endif 1787260401Sscottl 1788260401Sscottl#if AIC_DEBUG_REGISTERS 1789260401Sscottlahd_reg_print_t ahd_seqintctl_print; 1790260401Sscottl#else 1791260401Sscottl#define ahd_seqintctl_print(regvalue, cur_col, wrap) \ 1792260401Sscottl ahd_print_register(NULL, 0, "SEQINTCTL", 0xd9, regvalue, cur_col, wrap) 1793260401Sscottl#endif 1794260401Sscottl 1795260401Sscottl#if AIC_DEBUG_REGISTERS 1796260401Sscottlahd_reg_print_t ahd_seqram_print; 1797260401Sscottl#else 1798260401Sscottl#define ahd_seqram_print(regvalue, cur_col, wrap) \ 1799260401Sscottl ahd_print_register(NULL, 0, "SEQRAM", 0xda, regvalue, cur_col, wrap) 1800260401Sscottl#endif 1801260401Sscottl 1802260401Sscottl#if AIC_DEBUG_REGISTERS 1803260401Sscottlahd_reg_print_t ahd_prgmcnt_print; 1804260401Sscottl#else 1805260401Sscottl#define ahd_prgmcnt_print(regvalue, cur_col, wrap) \ 1806260401Sscottl ahd_print_register(NULL, 0, "PRGMCNT", 0xde, regvalue, cur_col, wrap) 1807260401Sscottl#endif 1808260401Sscottl 1809260401Sscottl#if AIC_DEBUG_REGISTERS 1810260401Sscottlahd_reg_print_t ahd_accum_print; 1811260401Sscottl#else 1812260401Sscottl#define ahd_accum_print(regvalue, cur_col, wrap) \ 1813260401Sscottl ahd_print_register(NULL, 0, "ACCUM", 0xe0, regvalue, cur_col, wrap) 1814260401Sscottl#endif 1815260401Sscottl 1816260401Sscottl#if AIC_DEBUG_REGISTERS 1817260401Sscottlahd_reg_print_t ahd_sindex_print; 1818260401Sscottl#else 1819260401Sscottl#define ahd_sindex_print(regvalue, cur_col, wrap) \ 1820260401Sscottl ahd_print_register(NULL, 0, "SINDEX", 0xe2, regvalue, cur_col, wrap) 1821260401Sscottl#endif 1822260401Sscottl 1823260401Sscottl#if AIC_DEBUG_REGISTERS 1824260401Sscottlahd_reg_print_t ahd_dindex_print; 1825260401Sscottl#else 1826260401Sscottl#define ahd_dindex_print(regvalue, cur_col, wrap) \ 1827260401Sscottl ahd_print_register(NULL, 0, "DINDEX", 0xe4, regvalue, cur_col, wrap) 1828260401Sscottl#endif 1829260401Sscottl 1830260401Sscottl#if AIC_DEBUG_REGISTERS 1831260401Sscottlahd_reg_print_t ahd_brkaddr1_print; 1832260401Sscottl#else 1833260401Sscottl#define ahd_brkaddr1_print(regvalue, cur_col, wrap) \ 1834260401Sscottl ahd_print_register(NULL, 0, "BRKADDR1", 0xe6, regvalue, cur_col, wrap) 1835260401Sscottl#endif 1836260401Sscottl 1837260401Sscottl#if AIC_DEBUG_REGISTERS 1838260401Sscottlahd_reg_print_t ahd_brkaddr0_print; 1839260401Sscottl#else 1840260401Sscottl#define ahd_brkaddr0_print(regvalue, cur_col, wrap) \ 1841260401Sscottl ahd_print_register(NULL, 0, "BRKADDR0", 0xe6, regvalue, cur_col, wrap) 1842260401Sscottl#endif 1843260401Sscottl 1844260401Sscottl#if AIC_DEBUG_REGISTERS 1845260401Sscottlahd_reg_print_t ahd_allones_print; 1846260401Sscottl#else 1847260401Sscottl#define ahd_allones_print(regvalue, cur_col, wrap) \ 1848260401Sscottl ahd_print_register(NULL, 0, "ALLONES", 0xe8, regvalue, cur_col, wrap) 1849260401Sscottl#endif 1850260401Sscottl 1851260401Sscottl#if AIC_DEBUG_REGISTERS 1852260401Sscottlahd_reg_print_t ahd_none_print; 1853260401Sscottl#else 1854260401Sscottl#define ahd_none_print(regvalue, cur_col, wrap) \ 1855260401Sscottl ahd_print_register(NULL, 0, "NONE", 0xea, regvalue, cur_col, wrap) 1856260401Sscottl#endif 1857260401Sscottl 1858260401Sscottl#if AIC_DEBUG_REGISTERS 1859260401Sscottlahd_reg_print_t ahd_allzeros_print; 1860260401Sscottl#else 1861260401Sscottl#define ahd_allzeros_print(regvalue, cur_col, wrap) \ 1862260401Sscottl ahd_print_register(NULL, 0, "ALLZEROS", 0xea, regvalue, cur_col, wrap) 1863260401Sscottl#endif 1864260401Sscottl 1865260401Sscottl#if AIC_DEBUG_REGISTERS 1866260401Sscottlahd_reg_print_t ahd_sindir_print; 1867260401Sscottl#else 1868260401Sscottl#define ahd_sindir_print(regvalue, cur_col, wrap) \ 1869260401Sscottl ahd_print_register(NULL, 0, "SINDIR", 0xec, regvalue, cur_col, wrap) 1870260401Sscottl#endif 1871260401Sscottl 1872260401Sscottl#if AIC_DEBUG_REGISTERS 1873260401Sscottlahd_reg_print_t ahd_dindir_print; 1874260401Sscottl#else 1875260401Sscottl#define ahd_dindir_print(regvalue, cur_col, wrap) \ 1876260401Sscottl ahd_print_register(NULL, 0, "DINDIR", 0xed, regvalue, cur_col, wrap) 1877260401Sscottl#endif 1878260401Sscottl 1879260401Sscottl#if AIC_DEBUG_REGISTERS 1880260401Sscottlahd_reg_print_t ahd_function1_print; 1881260401Sscottl#else 1882260401Sscottl#define ahd_function1_print(regvalue, cur_col, wrap) \ 1883260401Sscottl ahd_print_register(NULL, 0, "FUNCTION1", 0xf0, regvalue, cur_col, wrap) 1884260401Sscottl#endif 1885260401Sscottl 1886260401Sscottl#if AIC_DEBUG_REGISTERS 1887260401Sscottlahd_reg_print_t ahd_stack_print; 1888260401Sscottl#else 1889260401Sscottl#define ahd_stack_print(regvalue, cur_col, wrap) \ 1890260401Sscottl ahd_print_register(NULL, 0, "STACK", 0xf2, regvalue, cur_col, wrap) 1891260401Sscottl#endif 1892260401Sscottl 1893260401Sscottl#if AIC_DEBUG_REGISTERS 1894260401Sscottlahd_reg_print_t ahd_intvec1_addr_print; 1895260401Sscottl#else 1896260401Sscottl#define ahd_intvec1_addr_print(regvalue, cur_col, wrap) \ 1897260401Sscottl ahd_print_register(NULL, 0, "INTVEC1_ADDR", 0xf4, regvalue, cur_col, wrap) 1898260401Sscottl#endif 1899260401Sscottl 1900260401Sscottl#if AIC_DEBUG_REGISTERS 1901260401Sscottlahd_reg_print_t ahd_curaddr_print; 1902260401Sscottl#else 1903260401Sscottl#define ahd_curaddr_print(regvalue, cur_col, wrap) \ 1904260401Sscottl ahd_print_register(NULL, 0, "CURADDR", 0xf4, regvalue, cur_col, wrap) 1905260401Sscottl#endif 1906260401Sscottl 1907260401Sscottl#if AIC_DEBUG_REGISTERS 1908260401Sscottlahd_reg_print_t ahd_intvec2_addr_print; 1909260401Sscottl#else 1910260401Sscottl#define ahd_intvec2_addr_print(regvalue, cur_col, wrap) \ 1911260401Sscottl ahd_print_register(NULL, 0, "INTVEC2_ADDR", 0xf6, regvalue, cur_col, wrap) 1912260401Sscottl#endif 1913260401Sscottl 1914260401Sscottl#if AIC_DEBUG_REGISTERS 1915260401Sscottlahd_reg_print_t ahd_lastaddr_print; 1916260401Sscottl#else 1917260401Sscottl#define ahd_lastaddr_print(regvalue, cur_col, wrap) \ 1918260401Sscottl ahd_print_register(NULL, 0, "LASTADDR", 0xf6, regvalue, cur_col, wrap) 1919260401Sscottl#endif 1920260401Sscottl 1921260401Sscottl#if AIC_DEBUG_REGISTERS 1922260401Sscottlahd_reg_print_t ahd_longjmp_addr_print; 1923260401Sscottl#else 1924260401Sscottl#define ahd_longjmp_addr_print(regvalue, cur_col, wrap) \ 1925260401Sscottl ahd_print_register(NULL, 0, "LONGJMP_ADDR", 0xf8, regvalue, cur_col, wrap) 1926260401Sscottl#endif 1927260401Sscottl 1928260401Sscottl#if AIC_DEBUG_REGISTERS 1929260401Sscottlahd_reg_print_t ahd_accum_save_print; 1930260401Sscottl#else 1931260401Sscottl#define ahd_accum_save_print(regvalue, cur_col, wrap) \ 1932260401Sscottl ahd_print_register(NULL, 0, "ACCUM_SAVE", 0xfa, regvalue, cur_col, wrap) 1933260401Sscottl#endif 1934260401Sscottl 1935260401Sscottl#if AIC_DEBUG_REGISTERS 1936260401Sscottlahd_reg_print_t ahd_sram_base_print; 1937260401Sscottl#else 1938260401Sscottl#define ahd_sram_base_print(regvalue, cur_col, wrap) \ 1939260401Sscottl ahd_print_register(NULL, 0, "SRAM_BASE", 0x100, regvalue, cur_col, wrap) 1940260401Sscottl#endif 1941260401Sscottl 1942260401Sscottl#if AIC_DEBUG_REGISTERS 1943260401Sscottlahd_reg_print_t ahd_waiting_scb_tails_print; 1944260401Sscottl#else 1945260401Sscottl#define ahd_waiting_scb_tails_print(regvalue, cur_col, wrap) \ 1946260401Sscottl ahd_print_register(NULL, 0, "WAITING_SCB_TAILS", 0x100, regvalue, cur_col, wrap) 1947260401Sscottl#endif 1948260401Sscottl 1949260401Sscottl#if AIC_DEBUG_REGISTERS 1950260401Sscottlahd_reg_print_t ahd_ahd_pci_config_base_print; 1951260401Sscottl#else 1952260401Sscottl#define ahd_ahd_pci_config_base_print(regvalue, cur_col, wrap) \ 1953260401Sscottl ahd_print_register(NULL, 0, "AHD_PCI_CONFIG_BASE", 0x100, regvalue, cur_col, wrap) 1954260401Sscottl#endif 1955260401Sscottl 1956260401Sscottl#if AIC_DEBUG_REGISTERS 1957260401Sscottlahd_reg_print_t ahd_waiting_tid_head_print; 1958260401Sscottl#else 1959260401Sscottl#define ahd_waiting_tid_head_print(regvalue, cur_col, wrap) \ 1960260401Sscottl ahd_print_register(NULL, 0, "WAITING_TID_HEAD", 0x120, regvalue, cur_col, wrap) 1961260401Sscottl#endif 1962260401Sscottl 1963260401Sscottl#if AIC_DEBUG_REGISTERS 1964260401Sscottlahd_reg_print_t ahd_waiting_tid_tail_print; 1965260401Sscottl#else 1966260401Sscottl#define ahd_waiting_tid_tail_print(regvalue, cur_col, wrap) \ 1967260401Sscottl ahd_print_register(NULL, 0, "WAITING_TID_TAIL", 0x122, regvalue, cur_col, wrap) 1968260401Sscottl#endif 1969260401Sscottl 1970260401Sscottl#if AIC_DEBUG_REGISTERS 1971260401Sscottlahd_reg_print_t ahd_next_queued_scb_addr_print; 1972260401Sscottl#else 1973260401Sscottl#define ahd_next_queued_scb_addr_print(regvalue, cur_col, wrap) \ 1974260401Sscottl ahd_print_register(NULL, 0, "NEXT_QUEUED_SCB_ADDR", 0x124, regvalue, cur_col, wrap) 1975260401Sscottl#endif 1976260401Sscottl 1977260401Sscottl#if AIC_DEBUG_REGISTERS 1978260401Sscottlahd_reg_print_t ahd_complete_scb_head_print; 1979260401Sscottl#else 1980260401Sscottl#define ahd_complete_scb_head_print(regvalue, cur_col, wrap) \ 1981260401Sscottl ahd_print_register(NULL, 0, "COMPLETE_SCB_HEAD", 0x128, regvalue, cur_col, wrap) 1982260401Sscottl#endif 1983260401Sscottl 1984260401Sscottl#if AIC_DEBUG_REGISTERS 1985260401Sscottlahd_reg_print_t ahd_complete_scb_dmainprog_head_print; 1986260401Sscottl#else 1987260401Sscottl#define ahd_complete_scb_dmainprog_head_print(regvalue, cur_col, wrap) \ 1988260401Sscottl ahd_print_register(NULL, 0, "COMPLETE_SCB_DMAINPROG_HEAD", 0x12a, regvalue, cur_col, wrap) 1989260401Sscottl#endif 1990260401Sscottl 1991260401Sscottl#if AIC_DEBUG_REGISTERS 1992260401Sscottlahd_reg_print_t ahd_complete_dma_scb_head_print; 1993260401Sscottl#else 1994260401Sscottl#define ahd_complete_dma_scb_head_print(regvalue, cur_col, wrap) \ 1995260401Sscottl ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_HEAD", 0x12c, regvalue, cur_col, wrap) 1996260401Sscottl#endif 1997260401Sscottl 1998260401Sscottl#if AIC_DEBUG_REGISTERS 1999260401Sscottlahd_reg_print_t ahd_complete_dma_scb_tail_print; 2000260401Sscottl#else 2001260401Sscottl#define ahd_complete_dma_scb_tail_print(regvalue, cur_col, wrap) \ 2002260401Sscottl ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_TAIL", 0x12e, regvalue, cur_col, wrap) 2003260401Sscottl#endif 2004260401Sscottl 2005260401Sscottl#if AIC_DEBUG_REGISTERS 2006260401Sscottlahd_reg_print_t ahd_complete_on_qfreeze_head_print; 2007260401Sscottl#else 2008260401Sscottl#define ahd_complete_on_qfreeze_head_print(regvalue, cur_col, wrap) \ 2009260401Sscottl ahd_print_register(NULL, 0, "COMPLETE_ON_QFREEZE_HEAD", 0x130, regvalue, cur_col, wrap) 2010260401Sscottl#endif 2011260401Sscottl 2012260401Sscottl#if AIC_DEBUG_REGISTERS 2013260401Sscottlahd_reg_print_t ahd_qfreeze_count_print; 2014260401Sscottl#else 2015260401Sscottl#define ahd_qfreeze_count_print(regvalue, cur_col, wrap) \ 2016260401Sscottl ahd_print_register(NULL, 0, "QFREEZE_COUNT", 0x132, regvalue, cur_col, wrap) 2017260401Sscottl#endif 2018260401Sscottl 2019260401Sscottl#if AIC_DEBUG_REGISTERS 2020260401Sscottlahd_reg_print_t ahd_kernel_qfreeze_count_print; 2021260401Sscottl#else 2022260401Sscottl#define ahd_kernel_qfreeze_count_print(regvalue, cur_col, wrap) \ 2023260401Sscottl ahd_print_register(NULL, 0, "KERNEL_QFREEZE_COUNT", 0x134, regvalue, cur_col, wrap) 2024260401Sscottl#endif 2025260401Sscottl 2026260401Sscottl#if AIC_DEBUG_REGISTERS 2027260401Sscottlahd_reg_print_t ahd_saved_mode_print; 2028260401Sscottl#else 2029260401Sscottl#define ahd_saved_mode_print(regvalue, cur_col, wrap) \ 2030260401Sscottl ahd_print_register(NULL, 0, "SAVED_MODE", 0x136, regvalue, cur_col, wrap) 2031260401Sscottl#endif 2032260401Sscottl 2033260401Sscottl#if AIC_DEBUG_REGISTERS 2034260401Sscottlahd_reg_print_t ahd_msg_out_print; 2035260401Sscottl#else 2036260401Sscottl#define ahd_msg_out_print(regvalue, cur_col, wrap) \ 2037260401Sscottl ahd_print_register(NULL, 0, "MSG_OUT", 0x137, regvalue, cur_col, wrap) 2038260401Sscottl#endif 2039260401Sscottl 2040260401Sscottl#if AIC_DEBUG_REGISTERS 2041260401Sscottlahd_reg_print_t ahd_dmaparams_print; 2042260401Sscottl#else 2043260401Sscottl#define ahd_dmaparams_print(regvalue, cur_col, wrap) \ 2044260401Sscottl ahd_print_register(NULL, 0, "DMAPARAMS", 0x138, regvalue, cur_col, wrap) 2045260401Sscottl#endif 2046260401Sscottl 2047260401Sscottl#if AIC_DEBUG_REGISTERS 2048260401Sscottlahd_reg_print_t ahd_seq_flags_print; 2049260401Sscottl#else 2050260401Sscottl#define ahd_seq_flags_print(regvalue, cur_col, wrap) \ 2051260401Sscottl ahd_print_register(NULL, 0, "SEQ_FLAGS", 0x139, regvalue, cur_col, wrap) 2052260401Sscottl#endif 2053260401Sscottl 2054260401Sscottl#if AIC_DEBUG_REGISTERS 2055260401Sscottlahd_reg_print_t ahd_saved_scsiid_print; 2056260401Sscottl#else 2057260401Sscottl#define ahd_saved_scsiid_print(regvalue, cur_col, wrap) \ 2058260401Sscottl ahd_print_register(NULL, 0, "SAVED_SCSIID", 0x13a, regvalue, cur_col, wrap) 2059260401Sscottl#endif 2060260401Sscottl 2061260401Sscottl#if AIC_DEBUG_REGISTERS 2062260401Sscottlahd_reg_print_t ahd_saved_lun_print; 2063260401Sscottl#else 2064260401Sscottl#define ahd_saved_lun_print(regvalue, cur_col, wrap) \ 2065260401Sscottl ahd_print_register(NULL, 0, "SAVED_LUN", 0x13b, regvalue, cur_col, wrap) 2066260401Sscottl#endif 2067260401Sscottl 2068260401Sscottl#if AIC_DEBUG_REGISTERS 2069260401Sscottlahd_reg_print_t ahd_lastphase_print; 2070260401Sscottl#else 2071260401Sscottl#define ahd_lastphase_print(regvalue, cur_col, wrap) \ 2072260401Sscottl ahd_print_register(NULL, 0, "LASTPHASE", 0x13c, regvalue, cur_col, wrap) 2073260401Sscottl#endif 2074260401Sscottl 2075260401Sscottl#if AIC_DEBUG_REGISTERS 2076260401Sscottlahd_reg_print_t ahd_qoutfifo_entry_valid_tag_print; 2077260401Sscottl#else 2078260401Sscottl#define ahd_qoutfifo_entry_valid_tag_print(regvalue, cur_col, wrap) \ 2079260401Sscottl ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG", 0x13d, regvalue, cur_col, wrap) 2080260401Sscottl#endif 2081260401Sscottl 2082260401Sscottl#if AIC_DEBUG_REGISTERS 2083260401Sscottlahd_reg_print_t ahd_kernel_tqinpos_print; 2084260401Sscottl#else 2085260401Sscottl#define ahd_kernel_tqinpos_print(regvalue, cur_col, wrap) \ 2086260401Sscottl ahd_print_register(NULL, 0, "KERNEL_TQINPOS", 0x13e, regvalue, cur_col, wrap) 2087260401Sscottl#endif 2088260401Sscottl 2089260401Sscottl#if AIC_DEBUG_REGISTERS 2090260401Sscottlahd_reg_print_t ahd_tqinpos_print; 2091260401Sscottl#else 2092260401Sscottl#define ahd_tqinpos_print(regvalue, cur_col, wrap) \ 2093260401Sscottl ahd_print_register(NULL, 0, "TQINPOS", 0x13f, regvalue, cur_col, wrap) 2094260401Sscottl#endif 2095260401Sscottl 2096260401Sscottl#if AIC_DEBUG_REGISTERS 2097260401Sscottlahd_reg_print_t ahd_shared_data_addr_print; 2098260401Sscottl#else 2099260401Sscottl#define ahd_shared_data_addr_print(regvalue, cur_col, wrap) \ 2100260401Sscottl ahd_print_register(NULL, 0, "SHARED_DATA_ADDR", 0x140, regvalue, cur_col, wrap) 2101260401Sscottl#endif 2102260401Sscottl 2103260401Sscottl#if AIC_DEBUG_REGISTERS 2104260401Sscottlahd_reg_print_t ahd_qoutfifo_next_addr_print; 2105260401Sscottl#else 2106260401Sscottl#define ahd_qoutfifo_next_addr_print(regvalue, cur_col, wrap) \ 2107260401Sscottl ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR", 0x144, regvalue, cur_col, wrap) 2108260401Sscottl#endif 2109260401Sscottl 2110260401Sscottl#if AIC_DEBUG_REGISTERS 2111260401Sscottlahd_reg_print_t ahd_arg_1_print; 2112260401Sscottl#else 2113260401Sscottl#define ahd_arg_1_print(regvalue, cur_col, wrap) \ 2114260401Sscottl ahd_print_register(NULL, 0, "ARG_1", 0x148, regvalue, cur_col, wrap) 2115260401Sscottl#endif 2116260401Sscottl 2117260401Sscottl#if AIC_DEBUG_REGISTERS 2118260401Sscottlahd_reg_print_t ahd_arg_2_print; 2119260401Sscottl#else 2120260401Sscottl#define ahd_arg_2_print(regvalue, cur_col, wrap) \ 2121260401Sscottl ahd_print_register(NULL, 0, "ARG_2", 0x149, regvalue, cur_col, wrap) 2122260401Sscottl#endif 2123260401Sscottl 2124260401Sscottl#if AIC_DEBUG_REGISTERS 2125260401Sscottlahd_reg_print_t ahd_last_msg_print; 2126260401Sscottl#else 2127260401Sscottl#define ahd_last_msg_print(regvalue, cur_col, wrap) \ 2128260401Sscottl ahd_print_register(NULL, 0, "LAST_MSG", 0x14a, regvalue, cur_col, wrap) 2129260401Sscottl#endif 2130260401Sscottl 2131260401Sscottl#if AIC_DEBUG_REGISTERS 2132260401Sscottlahd_reg_print_t ahd_scsiseq_template_print; 2133260401Sscottl#else 2134260401Sscottl#define ahd_scsiseq_template_print(regvalue, cur_col, wrap) \ 2135260401Sscottl ahd_print_register(NULL, 0, "SCSISEQ_TEMPLATE", 0x14b, regvalue, cur_col, wrap) 2136260401Sscottl#endif 2137260401Sscottl 2138260401Sscottl#if AIC_DEBUG_REGISTERS 2139260401Sscottlahd_reg_print_t ahd_initiator_tag_print; 2140260401Sscottl#else 2141260401Sscottl#define ahd_initiator_tag_print(regvalue, cur_col, wrap) \ 2142260401Sscottl ahd_print_register(NULL, 0, "INITIATOR_TAG", 0x14c, regvalue, cur_col, wrap) 2143260401Sscottl#endif 2144260401Sscottl 2145260401Sscottl#if AIC_DEBUG_REGISTERS 2146260401Sscottlahd_reg_print_t ahd_seq_flags2_print; 2147260401Sscottl#else 2148260401Sscottl#define ahd_seq_flags2_print(regvalue, cur_col, wrap) \ 2149260401Sscottl ahd_print_register(NULL, 0, "SEQ_FLAGS2", 0x14d, regvalue, cur_col, wrap) 2150260401Sscottl#endif 2151260401Sscottl 2152260401Sscottl#if AIC_DEBUG_REGISTERS 2153260401Sscottlahd_reg_print_t ahd_allocfifo_scbptr_print; 2154260401Sscottl#else 2155260401Sscottl#define ahd_allocfifo_scbptr_print(regvalue, cur_col, wrap) \ 2156260401Sscottl ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR", 0x14e, regvalue, cur_col, wrap) 2157260401Sscottl#endif 2158260401Sscottl 2159260401Sscottl#if AIC_DEBUG_REGISTERS 2160260401Sscottlahd_reg_print_t ahd_int_coalescing_timer_print; 2161260401Sscottl#else 2162260401Sscottl#define ahd_int_coalescing_timer_print(regvalue, cur_col, wrap) \ 2163260401Sscottl ahd_print_register(NULL, 0, "INT_COALESCING_TIMER", 0x150, regvalue, cur_col, wrap) 2164260401Sscottl#endif 2165260401Sscottl 2166260401Sscottl#if AIC_DEBUG_REGISTERS 2167260401Sscottlahd_reg_print_t ahd_int_coalescing_maxcmds_print; 2168260401Sscottl#else 2169260401Sscottl#define ahd_int_coalescing_maxcmds_print(regvalue, cur_col, wrap) \ 2170260401Sscottl ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS", 0x152, regvalue, cur_col, wrap) 2171260401Sscottl#endif 2172260401Sscottl 2173260401Sscottl#if AIC_DEBUG_REGISTERS 2174260401Sscottlahd_reg_print_t ahd_int_coalescing_mincmds_print; 2175260401Sscottl#else 2176260401Sscottl#define ahd_int_coalescing_mincmds_print(regvalue, cur_col, wrap) \ 2177260401Sscottl ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS", 0x153, regvalue, cur_col, wrap) 2178260401Sscottl#endif 2179260401Sscottl 2180260401Sscottl#if AIC_DEBUG_REGISTERS 2181260401Sscottlahd_reg_print_t ahd_cmds_pending_print; 2182260401Sscottl#else 2183260401Sscottl#define ahd_cmds_pending_print(regvalue, cur_col, wrap) \ 2184260401Sscottl ahd_print_register(NULL, 0, "CMDS_PENDING", 0x154, regvalue, cur_col, wrap) 2185260401Sscottl#endif 2186260401Sscottl 2187260401Sscottl#if AIC_DEBUG_REGISTERS 2188260401Sscottlahd_reg_print_t ahd_int_coalescing_cmdcount_print; 2189260401Sscottl#else 2190260401Sscottl#define ahd_int_coalescing_cmdcount_print(regvalue, cur_col, wrap) \ 2191260401Sscottl ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT", 0x156, regvalue, cur_col, wrap) 2192260401Sscottl#endif 2193260401Sscottl 2194260401Sscottl#if AIC_DEBUG_REGISTERS 2195260401Sscottlahd_reg_print_t ahd_local_hs_mailbox_print; 2196260401Sscottl#else 2197260401Sscottl#define ahd_local_hs_mailbox_print(regvalue, cur_col, wrap) \ 2198260401Sscottl ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX", 0x157, regvalue, cur_col, wrap) 2199260401Sscottl#endif 2200260401Sscottl 2201260401Sscottl#if AIC_DEBUG_REGISTERS 2202260401Sscottlahd_reg_print_t ahd_cmdsize_table_print; 2203260401Sscottl#else 2204260401Sscottl#define ahd_cmdsize_table_print(regvalue, cur_col, wrap) \ 2205260401Sscottl ahd_print_register(NULL, 0, "CMDSIZE_TABLE", 0x158, regvalue, cur_col, wrap) 2206260401Sscottl#endif 2207260401Sscottl 2208260401Sscottl#if AIC_DEBUG_REGISTERS 2209260401Sscottlahd_reg_print_t ahd_mk_message_scb_print; 2210260401Sscottl#else 2211260401Sscottl#define ahd_mk_message_scb_print(regvalue, cur_col, wrap) \ 2212260401Sscottl ahd_print_register(NULL, 0, "MK_MESSAGE_SCB", 0x160, regvalue, cur_col, wrap) 2213260401Sscottl#endif 2214260401Sscottl 2215260401Sscottl#if AIC_DEBUG_REGISTERS 2216260401Sscottlahd_reg_print_t ahd_mk_message_scsiid_print; 2217260401Sscottl#else 2218260401Sscottl#define ahd_mk_message_scsiid_print(regvalue, cur_col, wrap) \ 2219260401Sscottl ahd_print_register(NULL, 0, "MK_MESSAGE_SCSIID", 0x162, regvalue, cur_col, wrap) 2220260401Sscottl#endif 2221260401Sscottl 2222260401Sscottl#if AIC_DEBUG_REGISTERS 2223260401Sscottlahd_reg_print_t ahd_scb_base_print; 2224260401Sscottl#else 2225260401Sscottl#define ahd_scb_base_print(regvalue, cur_col, wrap) \ 2226260401Sscottl ahd_print_register(NULL, 0, "SCB_BASE", 0x180, regvalue, cur_col, wrap) 2227260401Sscottl#endif 2228260401Sscottl 2229260401Sscottl#if AIC_DEBUG_REGISTERS 2230260401Sscottlahd_reg_print_t ahd_scb_residual_datacnt_print; 2231260401Sscottl#else 2232260401Sscottl#define ahd_scb_residual_datacnt_print(regvalue, cur_col, wrap) \ 2233260401Sscottl ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT", 0x180, regvalue, cur_col, wrap) 2234260401Sscottl#endif 2235260401Sscottl 2236260401Sscottl#if AIC_DEBUG_REGISTERS 2237260401Sscottlahd_reg_print_t ahd_scb_residual_sgptr_print; 2238260401Sscottl#else 2239260401Sscottl#define ahd_scb_residual_sgptr_print(regvalue, cur_col, wrap) \ 2240260401Sscottl ahd_print_register(NULL, 0, "SCB_RESIDUAL_SGPTR", 0x184, regvalue, cur_col, wrap) 2241260401Sscottl#endif 2242260401Sscottl 2243260401Sscottl#if AIC_DEBUG_REGISTERS 2244260401Sscottlahd_reg_print_t ahd_scb_scsi_status_print; 2245260401Sscottl#else 2246260401Sscottl#define ahd_scb_scsi_status_print(regvalue, cur_col, wrap) \ 2247260401Sscottl ahd_print_register(NULL, 0, "SCB_SCSI_STATUS", 0x188, regvalue, cur_col, wrap) 2248260401Sscottl#endif 2249260401Sscottl 2250260401Sscottl#if AIC_DEBUG_REGISTERS 2251260401Sscottlahd_reg_print_t ahd_scb_target_phases_print; 2252260401Sscottl#else 2253260401Sscottl#define ahd_scb_target_phases_print(regvalue, cur_col, wrap) \ 2254260401Sscottl ahd_print_register(NULL, 0, "SCB_TARGET_PHASES", 0x189, regvalue, cur_col, wrap) 2255260401Sscottl#endif 2256260401Sscottl 2257260401Sscottl#if AIC_DEBUG_REGISTERS 2258260401Sscottlahd_reg_print_t ahd_scb_target_data_dir_print; 2259260401Sscottl#else 2260260401Sscottl#define ahd_scb_target_data_dir_print(regvalue, cur_col, wrap) \ 2261260401Sscottl ahd_print_register(NULL, 0, "SCB_TARGET_DATA_DIR", 0x18a, regvalue, cur_col, wrap) 2262260401Sscottl#endif 2263260401Sscottl 2264260401Sscottl#if AIC_DEBUG_REGISTERS 2265260401Sscottlahd_reg_print_t ahd_scb_target_itag_print; 2266260401Sscottl#else 2267260401Sscottl#define ahd_scb_target_itag_print(regvalue, cur_col, wrap) \ 2268260401Sscottl ahd_print_register(NULL, 0, "SCB_TARGET_ITAG", 0x18b, regvalue, cur_col, wrap) 2269260401Sscottl#endif 2270260401Sscottl 2271260401Sscottl#if AIC_DEBUG_REGISTERS 2272260401Sscottlahd_reg_print_t ahd_scb_sense_busaddr_print; 2273260401Sscottl#else 2274260401Sscottl#define ahd_scb_sense_busaddr_print(regvalue, cur_col, wrap) \ 2275260401Sscottl ahd_print_register(NULL, 0, "SCB_SENSE_BUSADDR", 0x18c, regvalue, cur_col, wrap) 2276260401Sscottl#endif 2277260401Sscottl 2278260401Sscottl#if AIC_DEBUG_REGISTERS 2279260401Sscottlahd_reg_print_t ahd_scb_tag_print; 2280260401Sscottl#else 2281260401Sscottl#define ahd_scb_tag_print(regvalue, cur_col, wrap) \ 2282260401Sscottl ahd_print_register(NULL, 0, "SCB_TAG", 0x190, regvalue, cur_col, wrap) 2283260401Sscottl#endif 2284260401Sscottl 2285260401Sscottl#if AIC_DEBUG_REGISTERS 2286260401Sscottlahd_reg_print_t ahd_scb_control_print; 2287260401Sscottl#else 2288260401Sscottl#define ahd_scb_control_print(regvalue, cur_col, wrap) \ 2289260401Sscottl ahd_print_register(NULL, 0, "SCB_CONTROL", 0x192, regvalue, cur_col, wrap) 2290260401Sscottl#endif 2291260401Sscottl 2292260401Sscottl#if AIC_DEBUG_REGISTERS 2293260401Sscottlahd_reg_print_t ahd_scb_scsiid_print; 2294260401Sscottl#else 2295260401Sscottl#define ahd_scb_scsiid_print(regvalue, cur_col, wrap) \ 2296260401Sscottl ahd_print_register(NULL, 0, "SCB_SCSIID", 0x193, regvalue, cur_col, wrap) 2297260401Sscottl#endif 2298260401Sscottl 2299260401Sscottl#if AIC_DEBUG_REGISTERS 2300260401Sscottlahd_reg_print_t ahd_scb_lun_print; 2301260401Sscottl#else 2302260401Sscottl#define ahd_scb_lun_print(regvalue, cur_col, wrap) \ 2303260401Sscottl ahd_print_register(NULL, 0, "SCB_LUN", 0x194, regvalue, cur_col, wrap) 2304260401Sscottl#endif 2305260401Sscottl 2306260401Sscottl#if AIC_DEBUG_REGISTERS 2307260401Sscottlahd_reg_print_t ahd_scb_task_attribute_print; 2308260401Sscottl#else 2309260401Sscottl#define ahd_scb_task_attribute_print(regvalue, cur_col, wrap) \ 2310260401Sscottl ahd_print_register(NULL, 0, "SCB_TASK_ATTRIBUTE", 0x195, regvalue, cur_col, wrap) 2311260401Sscottl#endif 2312260401Sscottl 2313260401Sscottl#if AIC_DEBUG_REGISTERS 2314260401Sscottlahd_reg_print_t ahd_scb_cdb_len_print; 2315260401Sscottl#else 2316260401Sscottl#define ahd_scb_cdb_len_print(regvalue, cur_col, wrap) \ 2317260401Sscottl ahd_print_register(NULL, 0, "SCB_CDB_LEN", 0x196, regvalue, cur_col, wrap) 2318260401Sscottl#endif 2319260401Sscottl 2320260401Sscottl#if AIC_DEBUG_REGISTERS 2321260401Sscottlahd_reg_print_t ahd_scb_task_management_print; 2322260401Sscottl#else 2323260401Sscottl#define ahd_scb_task_management_print(regvalue, cur_col, wrap) \ 2324260401Sscottl ahd_print_register(NULL, 0, "SCB_TASK_MANAGEMENT", 0x197, regvalue, cur_col, wrap) 2325260401Sscottl#endif 2326260401Sscottl 2327260401Sscottl#if AIC_DEBUG_REGISTERS 2328260401Sscottlahd_reg_print_t ahd_scb_dataptr_print; 2329260401Sscottl#else 2330260401Sscottl#define ahd_scb_dataptr_print(regvalue, cur_col, wrap) \ 2331260401Sscottl ahd_print_register(NULL, 0, "SCB_DATAPTR", 0x198, regvalue, cur_col, wrap) 2332260401Sscottl#endif 2333260401Sscottl 2334260401Sscottl#if AIC_DEBUG_REGISTERS 2335260401Sscottlahd_reg_print_t ahd_scb_datacnt_print; 2336260401Sscottl#else 2337260401Sscottl#define ahd_scb_datacnt_print(regvalue, cur_col, wrap) \ 2338260401Sscottl ahd_print_register(NULL, 0, "SCB_DATACNT", 0x1a0, regvalue, cur_col, wrap) 2339260401Sscottl#endif 2340260401Sscottl 2341260401Sscottl#if AIC_DEBUG_REGISTERS 2342260401Sscottlahd_reg_print_t ahd_scb_sgptr_print; 2343260401Sscottl#else 2344260401Sscottl#define ahd_scb_sgptr_print(regvalue, cur_col, wrap) \ 2345260401Sscottl ahd_print_register(NULL, 0, "SCB_SGPTR", 0x1a4, regvalue, cur_col, wrap) 2346260401Sscottl#endif 2347260401Sscottl 2348260401Sscottl#if AIC_DEBUG_REGISTERS 2349260401Sscottlahd_reg_print_t ahd_scb_busaddr_print; 2350260401Sscottl#else 2351260401Sscottl#define ahd_scb_busaddr_print(regvalue, cur_col, wrap) \ 2352260401Sscottl ahd_print_register(NULL, 0, "SCB_BUSADDR", 0x1a8, regvalue, cur_col, wrap) 2353260401Sscottl#endif 2354260401Sscottl 2355260401Sscottl#if AIC_DEBUG_REGISTERS 2356260401Sscottlahd_reg_print_t ahd_scb_next_print; 2357260401Sscottl#else 2358260401Sscottl#define ahd_scb_next_print(regvalue, cur_col, wrap) \ 2359260401Sscottl ahd_print_register(NULL, 0, "SCB_NEXT", 0x1ac, regvalue, cur_col, wrap) 2360260401Sscottl#endif 2361260401Sscottl 2362260401Sscottl#if AIC_DEBUG_REGISTERS 2363260401Sscottlahd_reg_print_t ahd_scb_next2_print; 2364260401Sscottl#else 2365260401Sscottl#define ahd_scb_next2_print(regvalue, cur_col, wrap) \ 2366260401Sscottl ahd_print_register(NULL, 0, "SCB_NEXT2", 0x1ae, regvalue, cur_col, wrap) 2367260401Sscottl#endif 2368260401Sscottl 2369260401Sscottl#if AIC_DEBUG_REGISTERS 2370260401Sscottlahd_reg_print_t ahd_scb_spare_print; 2371260401Sscottl#else 2372260401Sscottl#define ahd_scb_spare_print(regvalue, cur_col, wrap) \ 2373260401Sscottl ahd_print_register(NULL, 0, "SCB_SPARE", 0x1b0, regvalue, cur_col, wrap) 2374260401Sscottl#endif 2375260401Sscottl 2376260401Sscottl#if AIC_DEBUG_REGISTERS 2377260401Sscottlahd_reg_print_t ahd_scb_disconnected_lists_print; 2378260401Sscottl#else 2379260401Sscottl#define ahd_scb_disconnected_lists_print(regvalue, cur_col, wrap) \ 2380260401Sscottl ahd_print_register(NULL, 0, "SCB_DISCONNECTED_LISTS", 0x1b8, regvalue, cur_col, wrap) 2381260401Sscottl#endif 2382260401Sscottl 2383260401Sscottl 2384260401Sscottl#define MODE_PTR 0x00 2385260401Sscottl#define DST_MODE 0x70 2386260401Sscottl#define SRC_MODE 0x07 2387260401Sscottl 2388260401Sscottl#define INTSTAT 0x01 2389260401Sscottl#define INT_PEND 0xff 2390260401Sscottl#define HWERRINT 0x80 2391260401Sscottl#define BRKADRINT 0x40 2392260401Sscottl#define SWTMINT 0x20 2393260401Sscottl#define PCIINT 0x10 2394260401Sscottl#define SCSIINT 0x08 2395260401Sscottl#define SEQINT 0x04 2396260401Sscottl#define CMDCMPLT 0x02 2397260401Sscottl#define SPLTINT 0x01 2398260401Sscottl 2399260401Sscottl#define SEQINTCODE 0x02 2400260401Sscottl#define BAD_SCB_STATUS 0x1a 2401260401Sscottl#define SAW_HWERR 0x19 2402260401Sscottl#define TRACEPOINT3 0x18 2403260401Sscottl#define TRACEPOINT2 0x17 2404260401Sscottl#define TRACEPOINT1 0x16 2405260401Sscottl#define TRACEPOINT0 0x15 2406260401Sscottl#define TASKMGMT_CMD_CMPLT_OKAY 0x14 2407260401Sscottl#define TASKMGMT_FUNC_COMPLETE 0x13 2408260401Sscottl#define ENTERING_NONPACK 0x12 2409260401Sscottl#define CFG4OVERRUN 0x11 2410260401Sscottl#define STATUS_OVERRUN 0x10 2411260401Sscottl#define CFG4ISTAT_INTR 0x0f 2412260401Sscottl#define INVALID_SEQINT 0x0e 2413260401Sscottl#define ILLEGAL_PHASE 0x0d 2414260401Sscottl#define DUMP_CARD_STATE 0x0c 2415260401Sscottl#define MISSED_BUSFREE 0x0b 2416260401Sscottl#define MKMSG_FAILED 0x0a 2417260401Sscottl#define DATA_OVERRUN 0x09 2418260401Sscottl#define BAD_STATUS 0x08 2419260401Sscottl#define HOST_MSG_LOOP 0x07 2420260401Sscottl#define PDATA_REINIT 0x06 2421260401Sscottl#define IGN_WIDE_RES 0x05 2422260401Sscottl#define NO_MATCH 0x04 2423260401Sscottl#define PROTO_VIOLATION 0x03 2424260401Sscottl#define SEND_REJECT 0x02 2425260401Sscottl#define BAD_PHASE 0x01 2426260401Sscottl#define NO_SEQINT 0x00 2427260401Sscottl 2428260401Sscottl#define CLRINT 0x03 2429260401Sscottl#define CLRHWERRINT 0x80 2430260401Sscottl#define CLRBRKADRINT 0x40 2431260401Sscottl#define CLRSWTMINT 0x20 2432260401Sscottl#define CLRPCIINT 0x10 2433260401Sscottl#define CLRSCSIINT 0x08 2434260401Sscottl#define CLRSEQINT 0x04 2435260401Sscottl#define CLRCMDINT 0x02 2436260401Sscottl#define CLRSPLTINT 0x01 2437260401Sscottl 2438260401Sscottl#define ERROR 0x04 2439260401Sscottl#define CIOPARERR 0x80 2440260401Sscottl#define CIOACCESFAIL 0x40 2441260401Sscottl#define MPARERR 0x20 2442260401Sscottl#define DPARERR 0x10 2443260401Sscottl#define SQPARERR 0x08 2444260401Sscottl#define ILLOPCODE 0x04 2445260401Sscottl#define DSCTMOUT 0x02 2446260401Sscottl 2447260401Sscottl#define CLRERR 0x04 2448260401Sscottl#define CLRCIOPARERR 0x80 2449260401Sscottl#define CLRCIOACCESFAIL 0x40 2450260401Sscottl#define CLRMPARERR 0x20 2451260401Sscottl#define CLRDPARERR 0x10 2452260401Sscottl#define CLRSQPARERR 0x08 2453260401Sscottl#define CLRILLOPCODE 0x04 2454260401Sscottl#define CLRDSCTMOUT 0x02 2455260401Sscottl 2456260401Sscottl#define HCNTRL 0x05 2457260401Sscottl#define SEQ_RESET 0x80 2458260401Sscottl#define POWRDN 0x40 2459260401Sscottl#define SWINT 0x10 2460260401Sscottl#define SWTIMER_START_B 0x08 2461260401Sscottl#define PAUSE 0x04 2462260401Sscottl#define INTEN 0x02 2463260401Sscottl#define CHIPRST 0x01 2464260401Sscottl#define CHIPRSTACK 0x01 2465260401Sscottl 2466260401Sscottl#define HNSCB_QOFF 0x06 2467260401Sscottl 2468260401Sscottl#define HESCB_QOFF 0x08 2469260401Sscottl 2470260401Sscottl#define HS_MAILBOX 0x0b 2471260401Sscottl#define HOST_TQINPOS 0x80 2472260401Sscottl#define ENINT_COALESCE 0x40 2473260401Sscottl 2474260401Sscottl#define SEQINTSTAT 0x0c 2475260401Sscottl#define SEQ_SWTMRTO 0x10 2476260401Sscottl#define SEQ_SEQINT 0x08 2477260401Sscottl#define SEQ_SCSIINT 0x04 2478260401Sscottl#define SEQ_PCIINT 0x02 2479260401Sscottl#define SEQ_SPLTINT 0x01 2480260401Sscottl 2481260401Sscottl#define CLRSEQINTSTAT 0x0c 2482260401Sscottl#define CLRSEQ_SWTMRTO 0x10 2483260401Sscottl#define CLRSEQ_SEQINT 0x08 2484260401Sscottl#define CLRSEQ_SCSIINT 0x04 2485260401Sscottl#define CLRSEQ_PCIINT 0x02 2486260401Sscottl#define CLRSEQ_SPLTINT 0x01 2487260401Sscottl 2488260401Sscottl#define SWTIMER 0x0e 2489260401Sscottl 2490260401Sscottl#define SNSCB_QOFF 0x10 2491260401Sscottl 2492260401Sscottl#define SESCB_QOFF 0x12 2493260401Sscottl 2494260401Sscottl#define SDSCB_QOFF 0x14 2495260401Sscottl 2496260401Sscottl#define QOFF_CTLSTA 0x16 2497260401Sscottl#define EMPTY_SCB_AVAIL 0x80 2498260401Sscottl#define NEW_SCB_AVAIL 0x40 2499260401Sscottl#define SDSCB_ROLLOVR 0x20 2500260401Sscottl#define HS_MAILBOX_ACT 0x10 2501260401Sscottl#define SCB_QSIZE 0x0f 2502260401Sscottl#define SCB_QSIZE_16384 0x0c 2503260401Sscottl#define SCB_QSIZE_8192 0x0b 2504260401Sscottl#define SCB_QSIZE_4096 0x0a 2505260401Sscottl#define SCB_QSIZE_2048 0x09 2506260401Sscottl#define SCB_QSIZE_1024 0x08 2507260401Sscottl#define SCB_QSIZE_512 0x07 2508260401Sscottl#define SCB_QSIZE_256 0x06 2509260401Sscottl#define SCB_QSIZE_128 0x05 2510260401Sscottl#define SCB_QSIZE_64 0x04 2511260401Sscottl#define SCB_QSIZE_32 0x03 2512260401Sscottl#define SCB_QSIZE_16 0x02 2513260401Sscottl#define SCB_QSIZE_8 0x01 2514260401Sscottl#define SCB_QSIZE_4 0x00 2515260401Sscottl 2516260401Sscottl#define INTCTL 0x18 2517260401Sscottl#define SWTMINTMASK 0x80 2518260401Sscottl#define SWTMINTEN 0x40 2519260401Sscottl#define SWTIMER_START 0x20 2520260401Sscottl#define AUTOCLRCMDINT 0x10 2521260401Sscottl#define PCIINTEN 0x08 2522260401Sscottl#define SCSIINTEN 0x04 2523260401Sscottl#define SEQINTEN 0x02 2524260401Sscottl#define SPLTINTEN 0x01 2525260401Sscottl 2526260401Sscottl#define DFCNTRL 0x19 2527260401Sscottl#define SCSIENWRDIS 0x40 2528260401Sscottl#define SCSIENACK 0x20 2529260401Sscottl#define DIRECTIONACK 0x04 2530260401Sscottl#define FIFOFLUSHACK 0x02 2531260401Sscottl#define DIRECTIONEN 0x01 2532260401Sscottl 2533260401Sscottl#define DSCOMMAND0 0x19 2534260401Sscottl#define CACHETHEN 0x80 2535260401Sscottl#define DPARCKEN 0x40 2536260401Sscottl#define MPARCKEN 0x20 2537260401Sscottl#define EXTREQLCK 0x10 2538260401Sscottl#define DISABLE_TWATE 0x02 2539260401Sscottl#define CIOPARCKEN 0x01 2540260401Sscottl 2541260401Sscottl#define DFSTATUS 0x1a 2542260401Sscottl#define PRELOAD_AVAIL 0x80 2543260401Sscottl#define PKT_PRELOAD_AVAIL 0x40 2544260401Sscottl#define MREQPEND 0x10 2545260401Sscottl#define HDONE 0x08 2546260401Sscottl#define DFTHRESH 0x04 2547260401Sscottl#define FIFOFULL 0x02 2548260401Sscottl#define FIFOEMP 0x01 2549260401Sscottl 2550260401Sscottl#define SG_CACHE_SHADOW 0x1b 2551260401Sscottl#define ODD_SEG 0x04 2552260401Sscottl#define LAST_SEG 0x02 2553260401Sscottl#define LAST_SEG_DONE 0x01 2554260401Sscottl 2555260401Sscottl#define SG_CACHE_PRE 0x1b 2556260401Sscottl 2557260401Sscottl#define ARBCTL 0x1b 2558260401Sscottl#define RESET_HARB 0x80 2559260401Sscottl#define RETRY_SWEN 0x08 2560260401Sscottl#define USE_TIME 0x07 2561260401Sscottl 2562260401Sscottl#define LQIN 0x20 2563260401Sscottl 2564260401Sscottl#define TYPEPTR 0x20 2565260401Sscottl 2566260401Sscottl#define TAGPTR 0x21 2567260401Sscottl 2568260401Sscottl#define LUNPTR 0x22 2569260401Sscottl 2570260401Sscottl#define DATALENPTR 0x23 2571260401Sscottl 2572260401Sscottl#define STATLENPTR 0x24 2573260401Sscottl 2574260401Sscottl#define CMDLENPTR 0x25 2575260401Sscottl 2576260401Sscottl#define ATTRPTR 0x26 2577260401Sscottl 2578260401Sscottl#define FLAGPTR 0x27 2579260401Sscottl 2580260401Sscottl#define CMDPTR 0x28 2581260401Sscottl 2582260401Sscottl#define QNEXTPTR 0x29 2583260401Sscottl 2584260401Sscottl#define IDPTR 0x2a 2585260401Sscottl 2586260401Sscottl#define ABRTBYTEPTR 0x2b 2587260401Sscottl 2588260401Sscottl#define ABRTBITPTR 0x2c 2589260401Sscottl 2590260401Sscottl#define MAXCMDBYTES 0x2d 2591260401Sscottl 2592260401Sscottl#define MAXCMD2RCV 0x2e 2593260401Sscottl 2594260401Sscottl#define SHORTTHRESH 0x2f 2595260401Sscottl 2596260401Sscottl#define LUNLEN 0x30 2597260401Sscottl#define TLUNLEN 0xf0 2598260401Sscottl#define ILUNLEN 0x0f 2599260401Sscottl 2600260401Sscottl#define CDBLIMIT 0x31 2601260401Sscottl 2602260401Sscottl#define MAXCMD 0x32 2603260401Sscottl 2604260401Sscottl#define MAXCMDCNT 0x33 2605260401Sscottl 2606260401Sscottl#define LQRSVD01 0x34 2607260401Sscottl 2608260401Sscottl#define LQRSVD16 0x35 2609260401Sscottl 2610260401Sscottl#define LQRSVD17 0x36 2611260401Sscottl 2612260401Sscottl#define CMDRSVD0 0x37 2613260401Sscottl 2614260401Sscottl#define LQCTL0 0x38 2615260401Sscottl#define LQITARGCLT 0xc0 2616260401Sscottl#define LQIINITGCLT 0x30 2617260401Sscottl#define LQ0TARGCLT 0x0c 2618260401Sscottl#define LQ0INITGCLT 0x03 2619260401Sscottl 2620260401Sscottl#define LQCTL1 0x38 2621260401Sscottl#define PCI2PCI 0x04 2622260401Sscottl#define SINGLECMD 0x02 2623260401Sscottl#define ABORTPENDING 0x01 2624260401Sscottl 2625260401Sscottl#define LQCTL2 0x39 2626260401Sscottl#define LQIRETRY 0x80 2627260401Sscottl#define LQICONTINUE 0x40 2628260401Sscottl#define LQITOIDLE 0x20 2629260401Sscottl#define LQIPAUSE 0x10 2630260401Sscottl#define LQORETRY 0x08 2631260401Sscottl#define LQOCONTINUE 0x04 2632260401Sscottl#define LQOTOIDLE 0x02 2633260401Sscottl#define LQOPAUSE 0x01 2634260401Sscottl 2635260401Sscottl#define SCSBIST0 0x39 2636260401Sscottl#define GSBISTERR 0x40 2637260401Sscottl#define GSBISTDONE 0x20 2638260401Sscottl#define GSBISTRUN 0x10 2639260401Sscottl#define OSBISTERR 0x04 2640260401Sscottl#define OSBISTDONE 0x02 2641260401Sscottl#define OSBISTRUN 0x01 2642260401Sscottl 2643260401Sscottl#define SCSISEQ0 0x3a 2644260401Sscottl#define TEMODEO 0x80 2645260401Sscottl#define ENSELO 0x40 2646260401Sscottl#define ENARBO 0x20 2647260401Sscottl#define FORCEBUSFREE 0x10 2648260401Sscottl#define SCSIRSTO 0x01 2649260401Sscottl 2650260401Sscottl#define SCSBIST1 0x3a 2651260401Sscottl#define NTBISTERR 0x04 2652260401Sscottl#define NTBISTDONE 0x02 2653260401Sscottl#define NTBISTRUN 0x01 2654260401Sscottl 2655260401Sscottl#define SCSISEQ1 0x3b 2656260401Sscottl 2657260401Sscottl#define BUSINITID 0x3c 2658260401Sscottl 2659260401Sscottl#define SXFRCTL0 0x3c 2660260401Sscottl#define DFON 0x80 2661260401Sscottl#define DFPEXP 0x40 2662260401Sscottl#define BIOSCANCELEN 0x10 2663260401Sscottl#define SPIOEN 0x08 2664260401Sscottl 2665260401Sscottl#define DLCOUNT 0x3c 2666260401Sscottl 2667260401Sscottl#define SXFRCTL1 0x3d 2668260401Sscottl#define BITBUCKET 0x80 2669260401Sscottl#define ENSACHK 0x40 2670260401Sscottl#define ENSPCHK 0x20 2671260401Sscottl#define STIMESEL 0x18 2672260401Sscottl#define ENSTIMER 0x04 2673260401Sscottl#define ACTNEGEN 0x02 2674260401Sscottl#define STPWEN 0x01 2675260401Sscottl 2676260401Sscottl#define BUSTARGID 0x3e 2677260401Sscottl 2678260401Sscottl#define SXFRCTL2 0x3e 2679260401Sscottl#define AUTORSTDIS 0x10 2680260401Sscottl#define CMDDMAEN 0x08 2681260401Sscottl#define ASU 0x07 2682260401Sscottl 2683260401Sscottl#define DFFSTAT 0x3f 2684260401Sscottl#define CURRFIFO 0x03 2685260401Sscottl#define FIFO1FREE 0x20 2686260401Sscottl#define FIFO0FREE 0x10 2687260401Sscottl#define CURRFIFO_NONE 0x03 2688260401Sscottl#define CURRFIFO_1 0x01 2689260401Sscottl#define CURRFIFO_0 0x00 2690260401Sscottl 2691260401Sscottl#define SCSISIGO 0x40 2692260401Sscottl#define CDO 0x80 2693260401Sscottl#define IOO 0x40 2694260401Sscottl#define MSGO 0x20 2695260401Sscottl#define ATNO 0x10 2696260401Sscottl#define SELO 0x08 2697260401Sscottl#define BSYO 0x04 2698260401Sscottl#define REQO 0x02 2699260401Sscottl#define ACKO 0x01 2700260401Sscottl 2701260401Sscottl#define MULTARGID 0x40 2702260401Sscottl 2703260401Sscottl#define SCSISIGI 0x41 2704260401Sscottl#define ATNI 0x10 2705260401Sscottl#define SELI 0x08 2706260401Sscottl#define BSYI 0x04 2707260401Sscottl#define REQI 0x02 2708260401Sscottl#define ACKI 0x01 2709260401Sscottl 2710260401Sscottl#define SCSIPHASE 0x42 2711260401Sscottl#define STATUS_PHASE 0x20 2712260401Sscottl#define COMMAND_PHASE 0x10 2713260401Sscottl#define MSG_IN_PHASE 0x08 2714260401Sscottl#define MSG_OUT_PHASE 0x04 2715260401Sscottl#define DATA_PHASE_MASK 0x03 2716260401Sscottl#define DATA_IN_PHASE 0x02 2717260401Sscottl#define DATA_OUT_PHASE 0x01 2718260401Sscottl 2719260401Sscottl#define SCSIDAT0_IMG 0x43 2720260401Sscottl 2721260401Sscottl#define SCSIDAT 0x44 2722260401Sscottl 2723260401Sscottl#define SCSIBUS 0x46 2724260401Sscottl 2725260401Sscottl#define TARGIDIN 0x48 2726260401Sscottl#define CLKOUT 0x80 2727260401Sscottl#define TARGID 0x0f 2728260401Sscottl 2729260401Sscottl#define SELID 0x49 2730260401Sscottl#define SELID_MASK 0xf0 2731260401Sscottl#define ONEBIT 0x08 2732260401Sscottl 2733260401Sscottl#define OPTIONMODE 0x4a 2734260401Sscottl#define OPTIONMODE_DEFAULTS 0x02 2735260401Sscottl#define BIOSCANCTL 0x80 2736260401Sscottl#define AUTOACKEN 0x40 2737260401Sscottl#define BIASCANCTL 0x20 2738260401Sscottl#define BUSFREEREV 0x10 2739260401Sscottl#define ENDGFORMCHK 0x04 2740260401Sscottl#define AUTO_MSGOUT_DE 0x02 2741260401Sscottl 2742260401Sscottl#define SBLKCTL 0x4a 2743260401Sscottl#define DIAGLEDEN 0x80 2744260401Sscottl#define DIAGLEDON 0x40 2745260401Sscottl#define ENAB40 0x08 2746260401Sscottl#define ENAB20 0x04 2747260401Sscottl#define SELWIDE 0x02 2748260401Sscottl 2749260401Sscottl#define SIMODE0 0x4b 2750260401Sscottl#define ENSELDO 0x40 2751260401Sscottl#define ENSELDI 0x20 2752260401Sscottl#define ENSELINGO 0x10 2753260401Sscottl#define ENIOERR 0x08 2754260401Sscottl#define ENOVERRUN 0x04 2755260401Sscottl#define ENSPIORDY 0x02 2756260401Sscottl#define ENARBDO 0x01 2757260401Sscottl 2758260401Sscottl#define SSTAT0 0x4b 2759260401Sscottl#define TARGET 0x80 2760260401Sscottl#define SELDO 0x40 2761260401Sscottl#define SELDI 0x20 2762260401Sscottl#define SELINGO 0x10 2763260401Sscottl#define IOERR 0x08 2764260401Sscottl#define OVERRUN 0x04 2765260401Sscottl#define SPIORDY 0x02 2766260401Sscottl#define ARBDO 0x01 2767260401Sscottl 2768260401Sscottl#define CLRSINT0 0x4b 2769260401Sscottl#define CLRSELDO 0x40 2770260401Sscottl#define CLRSELDI 0x20 2771260401Sscottl#define CLRSELINGO 0x10 2772260401Sscottl#define CLRIOERR 0x08 2773260401Sscottl#define CLROVERRUN 0x04 2774260401Sscottl#define CLRSPIORDY 0x02 2775260401Sscottl#define CLRARBDO 0x01 2776260401Sscottl 2777260401Sscottl#define SSTAT1 0x4c 2778260401Sscottl#define SELTO 0x80 2779260401Sscottl#define ATNTARG 0x40 2780260401Sscottl#define SCSIRSTI 0x20 2781260401Sscottl#define PHASEMIS 0x10 2782260401Sscottl#define BUSFREE 0x08 2783260401Sscottl#define SCSIPERR 0x04 2784260401Sscottl#define STRB2FAST 0x02 2785260401Sscottl#define REQINIT 0x01 2786260401Sscottl 2787260401Sscottl#define CLRSINT1 0x4c 2788260401Sscottl#define CLRSELTIMEO 0x80 2789260401Sscottl#define CLRATNO 0x40 2790260401Sscottl#define CLRSCSIRSTI 0x20 2791260401Sscottl#define CLRBUSFREE 0x08 2792260401Sscottl#define CLRSCSIPERR 0x04 2793260401Sscottl#define CLRSTRB2FAST 0x02 2794260401Sscottl#define CLRREQINIT 0x01 2795260401Sscottl 2796260401Sscottl#define SSTAT2 0x4d 2797260401Sscottl#define BUSFREETIME 0xc0 2798260401Sscottl#define NONPACKREQ 0x20 2799260401Sscottl#define EXP_ACTIVE 0x10 2800260401Sscottl#define BSYX 0x08 2801260401Sscottl#define WIDE_RES 0x04 2802260401Sscottl#define SDONE 0x02 2803260401Sscottl#define DMADONE 0x01 2804260401Sscottl#define BUSFREE_DFF1 0xc0 2805260401Sscottl#define BUSFREE_DFF0 0x80 2806260401Sscottl#define BUSFREE_LQO 0x40 2807260401Sscottl 2808260401Sscottl#define CLRSINT2 0x4d 2809260401Sscottl#define CLRNONPACKREQ 0x20 2810260401Sscottl#define CLRWIDE_RES 0x04 2811260401Sscottl#define CLRSDONE 0x02 2812260401Sscottl#define CLRDMADONE 0x01 2813260401Sscottl 2814260401Sscottl#define SIMODE2 0x4d 2815260401Sscottl#define ENWIDE_RES 0x04 2816260401Sscottl#define ENSDONE 0x02 2817260401Sscottl#define ENDMADONE 0x01 2818260401Sscottl 2819260401Sscottl#define PERRDIAG 0x4e 2820260401Sscottl#define HIZERO 0x80 2821260401Sscottl#define HIPERR 0x40 2822260401Sscottl#define PREVPHASE 0x20 2823260401Sscottl#define PARITYERR 0x10 2824260401Sscottl#define AIPERR 0x08 2825260401Sscottl#define CRCERR 0x04 2826260401Sscottl#define DGFORMERR 0x02 2827260401Sscottl#define DTERR 0x01 2828260401Sscottl 2829260401Sscottl#define LQISTATE 0x4e 2830260401Sscottl 2831260401Sscottl#define SOFFCNT 0x4f 2832260401Sscottl 2833260401Sscottl#define LQOSTATE 0x4f 2834260401Sscottl 2835260401Sscottl#define LQISTAT0 0x50 2836260401Sscottl#define LQIATNQAS 0x20 2837260401Sscottl#define LQICRCT1 0x10 2838260401Sscottl#define LQICRCT2 0x08 2839260401Sscottl#define LQIBADLQT 0x04 2840260401Sscottl#define LQIATNLQ 0x02 2841260401Sscottl#define LQIATNCMD 0x01 2842260401Sscottl 2843260401Sscottl#define CLRLQIINT0 0x50 2844260401Sscottl#define CLRLQIATNQAS 0x20 2845260401Sscottl#define CLRLQICRCT1 0x10 2846260401Sscottl#define CLRLQICRCT2 0x08 2847260401Sscottl#define CLRLQIBADLQT 0x04 2848260401Sscottl#define CLRLQIATNLQ 0x02 2849260401Sscottl#define CLRLQIATNCMD 0x01 2850260401Sscottl 2851260401Sscottl#define LQIMODE0 0x50 2852260401Sscottl#define ENLQIATNQASK 0x20 2853260401Sscottl#define ENLQICRCT1 0x10 2854260401Sscottl#define ENLQICRCT2 0x08 2855260401Sscottl#define ENLQIBADLQT 0x04 2856260401Sscottl#define ENLQIATNLQ 0x02 2857260401Sscottl#define ENLQIATNCMD 0x01 2858260401Sscottl 2859260401Sscottl#define LQISTAT1 0x51 2860260401Sscottl#define LQIPHASE_LQ 0x80 2861260401Sscottl#define LQIPHASE_NLQ 0x40 2862260401Sscottl#define LQIABORT 0x20 2863260401Sscottl#define LQICRCI_LQ 0x10 2864260401Sscottl#define LQICRCI_NLQ 0x08 2865260401Sscottl#define LQIBADLQI 0x04 2866260401Sscottl#define LQIOVERI_LQ 0x02 2867260401Sscottl#define LQIOVERI_NLQ 0x01 2868260401Sscottl 2869260401Sscottl#define CLRLQIINT1 0x51 2870260401Sscottl#define CLRLQIPHASE_LQ 0x80 2871260401Sscottl#define CLRLQIPHASE_NLQ 0x40 2872260401Sscottl#define CLRLIQABORT 0x20 2873260401Sscottl#define CLRLQICRCI_LQ 0x10 2874260401Sscottl#define CLRLQICRCI_NLQ 0x08 2875260401Sscottl#define CLRLQIBADLQI 0x04 2876260401Sscottl#define CLRLQIOVERI_LQ 0x02 2877260401Sscottl#define CLRLQIOVERI_NLQ 0x01 2878260401Sscottl 2879260401Sscottl#define LQIMODE1 0x51 2880260401Sscottl#define ENLQIPHASE_LQ 0x80 2881260401Sscottl#define ENLQIPHASE_NLQ 0x40 2882260401Sscottl#define ENLIQABORT 0x20 2883260401Sscottl#define ENLQICRCI_LQ 0x10 2884260401Sscottl#define ENLQICRCI_NLQ 0x08 2885260401Sscottl#define ENLQIBADLQI 0x04 2886260401Sscottl#define ENLQIOVERI_LQ 0x02 2887260401Sscottl#define ENLQIOVERI_NLQ 0x01 2888260401Sscottl 2889260401Sscottl#define LQISTAT2 0x52 2890260401Sscottl#define PACKETIZED 0x80 2891260401Sscottl#define LQIPHASE_OUTPKT 0x40 2892260401Sscottl#define LQIWORKONLQ 0x20 2893260401Sscottl#define LQIWAITFIFO 0x10 2894260401Sscottl#define LQISTOPPKT 0x08 2895260401Sscottl#define LQISTOPLQ 0x04 2896260401Sscottl#define LQISTOPCMD 0x02 2897260401Sscottl#define LQIGSAVAIL 0x01 2898260401Sscottl 2899260401Sscottl#define SSTAT3 0x53 2900260401Sscottl#define NTRAMPERR 0x02 2901260401Sscottl#define OSRAMPERR 0x01 2902260401Sscottl 2903260401Sscottl#define CLRSINT3 0x53 2904260401Sscottl#define CLRNTRAMPERR 0x02 2905260401Sscottl#define CLROSRAMPERR 0x01 2906260401Sscottl 2907260401Sscottl#define SIMODE3 0x53 2908260401Sscottl#define ENNTRAMPERR 0x02 2909260401Sscottl#define ENOSRAMPERR 0x01 2910260401Sscottl 2911260401Sscottl#define LQOMODE0 0x54 2912260401Sscottl#define ENLQOTARGSCBPERR 0x10 2913260401Sscottl#define ENLQOSTOPT2 0x08 2914260401Sscottl#define ENLQOATNLQ 0x04 2915260401Sscottl#define ENLQOATNPKT 0x02 2916260401Sscottl#define ENLQOTCRC 0x01 2917260401Sscottl 2918260401Sscottl#define LQOSTAT0 0x54 2919260401Sscottl#define LQOTARGSCBPERR 0x10 2920260401Sscottl#define LQOSTOPT2 0x08 2921260401Sscottl#define LQOATNLQ 0x04 2922260401Sscottl#define LQOATNPKT 0x02 2923260401Sscottl#define LQOTCRC 0x01 2924260401Sscottl 2925260401Sscottl#define CLRLQOINT0 0x54 2926260401Sscottl#define CLRLQOTARGSCBPERR 0x10 2927260401Sscottl#define CLRLQOSTOPT2 0x08 2928260401Sscottl#define CLRLQOATNLQ 0x04 2929260401Sscottl#define CLRLQOATNPKT 0x02 2930260401Sscottl#define CLRLQOTCRC 0x01 2931260401Sscottl 2932260401Sscottl#define LQOMODE1 0x55 2933260401Sscottl#define ENLQOINITSCBPERR 0x10 2934260401Sscottl#define ENLQOSTOPI2 0x08 2935260401Sscottl#define ENLQOBADQAS 0x04 2936260401Sscottl#define ENLQOBUSFREE 0x02 2937260401Sscottl#define ENLQOPHACHGINPKT 0x01 2938260401Sscottl 2939260401Sscottl#define LQOSTAT1 0x55 2940260401Sscottl#define LQOINITSCBPERR 0x10 2941260401Sscottl#define LQOSTOPI2 0x08 2942260401Sscottl#define LQOBADQAS 0x04 2943260401Sscottl#define LQOBUSFREE 0x02 2944260401Sscottl#define LQOPHACHGINPKT 0x01 2945260401Sscottl 2946260401Sscottl#define CLRLQOINT1 0x55 2947260401Sscottl#define CLRLQOINITSCBPERR 0x10 2948260401Sscottl#define CLRLQOSTOPI2 0x08 2949260401Sscottl#define CLRLQOBADQAS 0x04 2950260401Sscottl#define CLRLQOBUSFREE 0x02 2951260401Sscottl#define CLRLQOPHACHGINPKT 0x01 2952260401Sscottl 2953260401Sscottl#define OS_SPACE_CNT 0x56 2954260401Sscottl 2955260401Sscottl#define LQOSTAT2 0x56 2956260401Sscottl#define LQOPKT 0xe0 2957260401Sscottl#define LQOWAITFIFO 0x10 2958260401Sscottl#define LQOPHACHGOUTPKT 0x02 2959260401Sscottl#define LQOSTOP0 0x01 2960260401Sscottl 2961260401Sscottl#define SIMODE1 0x57 2962260401Sscottl#define ENSELTIMO 0x80 2963260401Sscottl#define ENATNTARG 0x40 2964260401Sscottl#define ENSCSIRST 0x20 2965260401Sscottl#define ENPHASEMIS 0x10 2966260401Sscottl#define ENBUSFREE 0x08 2967260401Sscottl#define ENSCSIPERR 0x04 2968260401Sscottl#define ENSTRB2FAST 0x02 2969260401Sscottl#define ENREQINIT 0x01 2970260401Sscottl 2971260401Sscottl#define GSFIFO 0x58 2972260401Sscottl 2973260401Sscottl#define DFFSXFRCTL 0x5a 2974260401Sscottl#define DFFBITBUCKET 0x08 2975260401Sscottl#define CLRSHCNT 0x04 2976260401Sscottl#define CLRCHN 0x02 2977260401Sscottl#define RSTCHN 0x01 2978260401Sscottl 2979260401Sscottl#define NEXTSCB 0x5a 2980260401Sscottl 2981260401Sscottl#define LQOSCSCTL 0x5a 2982260401Sscottl#define LQOH2A_VERSION 0x80 2983260401Sscottl#define LQONOCHKOVER 0x01 2984260401Sscottl 2985260401Sscottl#define SEQINTSRC 0x5b 2986260401Sscottl#define CTXTDONE 0x40 2987260401Sscottl#define SAVEPTRS 0x20 2988260401Sscottl#define CFG4DATA 0x10 2989260401Sscottl#define CFG4ISTAT 0x08 2990260401Sscottl#define CFG4TSTAT 0x04 2991260401Sscottl#define CFG4ICMD 0x02 2992260401Sscottl#define CFG4TCMD 0x01 2993260401Sscottl 2994260401Sscottl#define CLRSEQINTSRC 0x5b 2995260401Sscottl#define CLRCTXTDONE 0x40 2996260401Sscottl#define CLRSAVEPTRS 0x20 2997260401Sscottl#define CLRCFG4DATA 0x10 2998260401Sscottl#define CLRCFG4ISTAT 0x08 2999260401Sscottl#define CLRCFG4TSTAT 0x04 3000260401Sscottl#define CLRCFG4ICMD 0x02 3001260401Sscottl#define CLRCFG4TCMD 0x01 3002260401Sscottl 3003260401Sscottl#define CURRSCB 0x5c 3004260401Sscottl 3005260401Sscottl#define SEQIMODE 0x5c 3006260401Sscottl#define ENCTXTDONE 0x40 3007260401Sscottl#define ENSAVEPTRS 0x20 3008260401Sscottl#define ENCFG4DATA 0x10 3009260401Sscottl#define ENCFG4ISTAT 0x08 3010260401Sscottl#define ENCFG4TSTAT 0x04 3011260401Sscottl#define ENCFG4ICMD 0x02 3012260401Sscottl#define ENCFG4TCMD 0x01 3013260401Sscottl 3014260401Sscottl#define MDFFSTAT 0x5d 3015260401Sscottl#define SHCNTNEGATIVE 0x40 3016260401Sscottl#define SHCNTMINUS1 0x20 3017260401Sscottl#define LASTSDONE 0x10 3018260401Sscottl#define SHVALID 0x08 3019260401Sscottl#define DLZERO 0x04 3020260401Sscottl#define DATAINFIFO 0x02 3021260401Sscottl#define FIFOFREE 0x01 3022260401Sscottl 3023260401Sscottl#define CRCCONTROL 0x5d 3024260401Sscottl#define CRCVALCHKEN 0x40 3025260401Sscottl 3026260401Sscottl#define SCSITEST 0x5e 3027260401Sscottl#define CNTRTEST 0x08 3028260401Sscottl#define SEL_TXPLL_DEBUG 0x04 3029260401Sscottl 3030260401Sscottl#define DFFTAG 0x5e 3031260401Sscottl 3032260401Sscottl#define LASTSCB 0x5e 3033260401Sscottl 3034260401Sscottl#define IOPDNCTL 0x5f 3035260401Sscottl#define DISABLE_OE 0x80 3036260401Sscottl#define PDN_IDIST 0x04 3037260401Sscottl#define PDN_DIFFSENSE 0x01 3038260401Sscottl 3039260401Sscottl#define NEGOADDR 0x60 3040260401Sscottl 3041260401Sscottl#define SHADDR 0x60 3042260401Sscottl 3043260401Sscottl#define DGRPCRCI 0x60 3044260401Sscottl 3045260401Sscottl#define NEGPERIOD 0x61 3046260401Sscottl 3047260401Sscottl#define PACKCRCI 0x62 3048260401Sscottl 3049260401Sscottl#define NEGOFFSET 0x62 3050260401Sscottl 3051260401Sscottl#define NEGPPROPTS 0x63 3052260401Sscottl#define PPROPT_PACE 0x08 3053260401Sscottl#define PPROPT_QAS 0x04 3054260401Sscottl#define PPROPT_DT 0x02 3055260401Sscottl#define PPROPT_IUT 0x01 3056260401Sscottl 3057260401Sscottl#define NEGCONOPTS 0x64 3058260401Sscottl#define ENSNAPSHOT 0x40 3059260401Sscottl#define RTI_WRTDIS 0x20 3060260401Sscottl#define RTI_OVRDTRN 0x10 3061260401Sscottl#define ENSLOWCRC 0x08 3062260401Sscottl#define ENAUTOATNI 0x04 3063260401Sscottl#define ENAUTOATNO 0x02 3064260401Sscottl#define WIDEXFER 0x01 3065260401Sscottl 3066260401Sscottl#define ANNEXCOL 0x65 3067260401Sscottl 3068260401Sscottl#define ANNEXDAT 0x66 3069260401Sscottl 3070260401Sscottl#define SCSCHKN 0x66 3071260401Sscottl#define STSELSKIDDIS 0x40 3072260401Sscottl#define CURRFIFODEF 0x20 3073260401Sscottl#define WIDERESEN 0x10 3074260401Sscottl#define SDONEMSKDIS 0x08 3075260401Sscottl#define DFFACTCLR 0x04 3076260401Sscottl#define SHVALIDSTDIS 0x02 3077260401Sscottl#define LSTSGCLRDIS 0x01 3078260401Sscottl 3079260401Sscottl#define IOWNID 0x67 3080260401Sscottl 3081260401Sscottl#define SHCNT 0x68 3082260401Sscottl 3083260401Sscottl#define PLL960CTL0 0x68 3084260401Sscottl 3085260401Sscottl#define PLL960CTL1 0x69 3086260401Sscottl 3087260401Sscottl#define TOWNID 0x69 3088260401Sscottl 3089260401Sscottl#define XSIG 0x6a 3090260401Sscottl 3091260401Sscottl#define PLL960CNT0 0x6a 3092260401Sscottl 3093260401Sscottl#define SELOID 0x6b 3094260401Sscottl 3095260401Sscottl#define FAIRNESS 0x6c 3096260401Sscottl 3097260401Sscottl#define PLL400CTL0 0x6c 3098260401Sscottl#define PLL_VCOSEL 0x80 3099260401Sscottl#define PLL_PWDN 0x40 3100260401Sscottl#define PLL_NS 0x30 3101260401Sscottl#define PLL_ENLUD 0x08 3102260401Sscottl#define PLL_ENLPF 0x04 3103260401Sscottl#define PLL_DLPF 0x02 3104260401Sscottl#define PLL_ENFBM 0x01 3105260401Sscottl 3106260401Sscottl#define PLL400CTL1 0x6d 3107260401Sscottl#define PLL_CNTEN 0x80 3108260401Sscottl#define PLL_CNTCLR 0x40 3109260401Sscottl#define PLL_RST 0x01 3110260401Sscottl 3111260401Sscottl#define PLL400CNT0 0x6e 3112260401Sscottl 3113260401Sscottl#define UNFAIRNESS 0x6e 3114260401Sscottl 3115260401Sscottl#define HODMAADR 0x70 3116260401Sscottl 3117260401Sscottl#define HADDR 0x70 3118260401Sscottl 3119260401Sscottl#define PLLDELAY 0x70 3120260401Sscottl#define SPLIT_DROP_REQ 0x80 3121260401Sscottl 3122260401Sscottl#define HCNT 0x78 3123260401Sscottl 3124260401Sscottl#define HODMACNT 0x78 3125260401Sscottl 3126260401Sscottl#define HODMAEN 0x7a 3127260401Sscottl 3128260401Sscottl#define SCBHADDR 0x7c 3129260401Sscottl 3130260401Sscottl#define SGHADDR 0x7c 3131260401Sscottl 3132260401Sscottl#define SCBHCNT 0x84 3133260401Sscottl 3134260401Sscottl#define SGHCNT 0x84 3135260401Sscottl 3136260401Sscottl#define DFF_THRSH 0x88 3137260401Sscottl#define WR_DFTHRSH 0x70 3138260401Sscottl#define RD_DFTHRSH 0x07 3139260401Sscottl#define WR_DFTHRSH_MAX 0x70 3140260401Sscottl#define WR_DFTHRSH_90 0x60 3141260401Sscottl#define WR_DFTHRSH_85 0x50 3142260401Sscottl#define WR_DFTHRSH_75 0x40 3143260401Sscottl#define WR_DFTHRSH_63 0x30 3144260401Sscottl#define WR_DFTHRSH_50 0x20 3145260401Sscottl#define WR_DFTHRSH_25 0x10 3146260401Sscottl#define RD_DFTHRSH_MAX 0x07 3147260401Sscottl#define RD_DFTHRSH_90 0x06 3148260401Sscottl#define RD_DFTHRSH_85 0x05 3149260401Sscottl#define RD_DFTHRSH_75 0x04 3150260401Sscottl#define RD_DFTHRSH_63 0x03 3151260401Sscottl#define RD_DFTHRSH_50 0x02 3152260401Sscottl#define RD_DFTHRSH_25 0x01 3153260401Sscottl#define WR_DFTHRSH_MIN 0x00 3154260401Sscottl#define RD_DFTHRSH_MIN 0x00 3155260401Sscottl 3156260401Sscottl#define ROMADDR 0x8a 3157260401Sscottl 3158260401Sscottl#define ROMCNTRL 0x8d 3159260401Sscottl#define ROMOP 0xe0 3160260401Sscottl#define ROMSPD 0x18 3161260401Sscottl#define REPEAT 0x02 3162260401Sscottl#define RDY 0x01 3163260401Sscottl 3164260401Sscottl#define ROMDATA 0x8e 3165260401Sscottl 3166260401Sscottl#define DCHRXMSG0 0x90 3167260401Sscottl 3168260401Sscottl#define OVLYRXMSG0 0x90 3169260401Sscottl 3170260401Sscottl#define CMCRXMSG0 0x90 3171260401Sscottl 3172260401Sscottl#define ROENABLE 0x90 3173260401Sscottl#define MSIROEN 0x20 3174260401Sscottl#define OVLYROEN 0x10 3175260401Sscottl#define CMCROEN 0x08 3176260401Sscottl#define SGROEN 0x04 3177260401Sscottl#define DCH1ROEN 0x02 3178260401Sscottl#define DCH0ROEN 0x01 3179260401Sscottl 3180260401Sscottl#define DCHRXMSG1 0x91 3181260401Sscottl 3182260401Sscottl#define OVLYRXMSG1 0x91 3183260401Sscottl 3184260401Sscottl#define CMCRXMSG1 0x91 3185260401Sscottl 3186260401Sscottl#define NSENABLE 0x91 3187260401Sscottl#define MSINSEN 0x20 3188260401Sscottl#define OVLYNSEN 0x10 3189260401Sscottl#define CMCNSEN 0x08 3190260401Sscottl#define SGNSEN 0x04 3191260401Sscottl#define DCH1NSEN 0x02 3192260401Sscottl#define DCH0NSEN 0x01 3193260401Sscottl 3194260401Sscottl#define DCHRXMSG2 0x92 3195260401Sscottl 3196260401Sscottl#define OVLYRXMSG2 0x92 3197260401Sscottl 3198260401Sscottl#define CMCRXMSG2 0x92 3199260401Sscottl 3200260401Sscottl#define OST 0x92 3201260401Sscottl 3202260401Sscottl#define DCHRXMSG3 0x93 3203260401Sscottl 3204260401Sscottl#define OVLYRXMSG3 0x93 3205260401Sscottl 3206260401Sscottl#define CMCRXMSG3 0x93 3207260401Sscottl 3208260401Sscottl#define PCIXCTL 0x93 3209260401Sscottl#define SERRPULSE 0x80 3210260401Sscottl#define UNEXPSCIEN 0x20 3211260401Sscottl#define SPLTSMADIS 0x10 3212260401Sscottl#define SPLTSTADIS 0x08 3213260401Sscottl#define SRSPDPEEN 0x04 3214260401Sscottl#define TSCSERREN 0x02 3215260401Sscottl#define CMPABCDIS 0x01 3216260401Sscottl 3217260401Sscottl#define CMCSEQBCNT 0x94 3218260401Sscottl 3219260401Sscottl#define DCHSEQBCNT 0x94 3220260401Sscottl 3221260401Sscottl#define OVLYSEQBCNT 0x94 3222260401Sscottl 3223260401Sscottl#define CMCSPLTSTAT0 0x96 3224260401Sscottl 3225260401Sscottl#define DCHSPLTSTAT0 0x96 3226260401Sscottl 3227260401Sscottl#define OVLYSPLTSTAT0 0x96 3228260401Sscottl 3229260401Sscottl#define CMCSPLTSTAT1 0x97 3230260401Sscottl 3231260401Sscottl#define DCHSPLTSTAT1 0x97 3232260401Sscottl 3233260401Sscottl#define OVLYSPLTSTAT1 0x97 3234260401Sscottl 3235260401Sscottl#define SGRXMSG0 0x98 3236260401Sscottl#define CDNUM 0xf8 3237260401Sscottl#define CFNUM 0x07 3238260401Sscottl 3239260401Sscottl#define SLVSPLTOUTADR0 0x98 3240260401Sscottl#define LOWER_ADDR 0x7f 3241260401Sscottl 3242260401Sscottl#define SGRXMSG1 0x99 3243260401Sscottl#define CBNUM 0xff 3244260401Sscottl 3245260401Sscottl#define SLVSPLTOUTADR1 0x99 3246260401Sscottl#define REQ_DNUM 0xf8 3247260401Sscottl#define REQ_FNUM 0x07 3248260401Sscottl 3249260401Sscottl#define SGRXMSG2 0x9a 3250260401Sscottl#define MINDEX 0xff 3251260401Sscottl 3252260401Sscottl#define SLVSPLTOUTADR2 0x9a 3253260401Sscottl#define REQ_BNUM 0xff 3254260401Sscottl 3255260401Sscottl#define SGRXMSG3 0x9b 3256260401Sscottl#define MCLASS 0x0f 3257260401Sscottl 3258260401Sscottl#define SLVSPLTOUTADR3 0x9b 3259260401Sscottl#define TAG_NUM 0x1f 3260260401Sscottl#define RLXORD 0x10 3261260401Sscottl 3262260401Sscottl#define SLVSPLTOUTATTR0 0x9c 3263260401Sscottl#define LOWER_BCNT 0xff 3264260401Sscottl 3265260401Sscottl#define SGSEQBCNT 0x9c 3266260401Sscottl 3267260401Sscottl#define SLVSPLTOUTATTR1 0x9d 3268260401Sscottl#define CMPLT_DNUM 0xf8 3269260401Sscottl#define CMPLT_FNUM 0x07 3270260401Sscottl 3271260401Sscottl#define SLVSPLTOUTATTR2 0x9e 3272260401Sscottl#define CMPLT_BNUM 0xff 3273260401Sscottl 3274260401Sscottl#define SGSPLTSTAT0 0x9e 3275260401Sscottl#define STAETERM 0x80 3276260401Sscottl#define SCBCERR 0x40 3277260401Sscottl#define SCADERR 0x20 3278260401Sscottl#define SCDATBUCKET 0x10 3279260401Sscottl#define CNTNOTCMPLT 0x08 3280260401Sscottl#define RXOVRUN 0x04 3281260401Sscottl#define RXSCEMSG 0x02 3282260401Sscottl#define RXSPLTRSP 0x01 3283260401Sscottl 3284260401Sscottl#define SFUNCT 0x9f 3285260401Sscottl#define TEST_GROUP 0xf0 3286260401Sscottl#define TEST_NUM 0x0f 3287260401Sscottl 3288260401Sscottl#define SGSPLTSTAT1 0x9f 3289260401Sscottl#define RXDATABUCKET 0x01 3290260401Sscottl 3291260401Sscottl#define DF0PCISTAT 0xa0 3292260401Sscottl 3293260401Sscottl#define REG0 0xa0 3294260401Sscottl 3295260401Sscottl#define DF1PCISTAT 0xa1 3296260401Sscottl 3297260401Sscottl#define SGPCISTAT 0xa2 3298260401Sscottl 3299260401Sscottl#define REG1 0xa2 3300260401Sscottl 3301260401Sscottl#define CMCPCISTAT 0xa3 3302260401Sscottl 3303260401Sscottl#define OVLYPCISTAT 0xa4 3304260401Sscottl#define SCAAPERR 0x08 3305260401Sscottl#define RDPERR 0x04 3306260401Sscottl 3307260401Sscottl#define REG_ISR 0xa4 3308260401Sscottl 3309260401Sscottl#define MSIPCISTAT 0xa6 3310260401Sscottl#define RMA 0x20 3311260401Sscottl#define RTA 0x10 3312260401Sscottl#define CLRPENDMSI 0x08 3313260401Sscottl#define DPR 0x01 3314260401Sscottl 3315260401Sscottl#define SG_STATE 0xa6 3316260401Sscottl#define FETCH_INPROG 0x04 3317260401Sscottl#define LOADING_NEEDED 0x02 3318260401Sscottl#define SEGS_AVAIL 0x01 3319260401Sscottl 3320260401Sscottl#define TARGPCISTAT 0xa7 3321260401Sscottl#define DPE 0x80 3322260401Sscottl#define SSE 0x40 3323260401Sscottl#define STA 0x08 3324260401Sscottl#define TWATERR 0x02 3325260401Sscottl 3326260401Sscottl#define DATA_COUNT_ODD 0xa7 3327260401Sscottl 3328260401Sscottl#define SCBPTR 0xa8 3329260401Sscottl 3330260401Sscottl#define CCSCBACNT 0xab 3331260401Sscottl 3332260401Sscottl#define SCBAUTOPTR 0xab 3333260401Sscottl#define AUSCBPTR_EN 0x80 3334260401Sscottl#define SCBPTR_ADDR 0x38 3335260401Sscottl#define SCBPTR_OFF 0x07 3336260401Sscottl 3337260401Sscottl#define CCSCBADR_BK 0xac 3338260401Sscottl 3339260401Sscottl#define CCSGADDR 0xac 3340260401Sscottl 3341260401Sscottl#define CCSCBADDR 0xac 3342260401Sscottl 3343260401Sscottl#define CCSCBCTL 0xad 3344260401Sscottl#define CCSCBDONE 0x80 3345260401Sscottl#define ARRDONE 0x40 3346260401Sscottl#define CCARREN 0x10 3347260401Sscottl#define CCSCBEN 0x08 3348260401Sscottl#define CCSCBDIR 0x04 3349260401Sscottl#define CCSCBRESET 0x01 3350260401Sscottl 3351260401Sscottl#define CCSGCTL 0xad 3352260401Sscottl#define CCSGEN 0x0c 3353260401Sscottl#define CCSGDONE 0x80 3354260401Sscottl#define SG_CACHE_AVAIL 0x10 3355260401Sscottl#define CCSGENACK 0x08 3356260401Sscottl#define SG_FETCH_REQ 0x02 3357260401Sscottl#define CCSGRESET 0x01 3358260401Sscottl 3359260401Sscottl#define CMC_RAMBIST 0xad 3360260401Sscottl#define SG_ELEMENT_SIZE 0x80 3361260401Sscottl#define SCBRAMBIST_FAIL 0x40 3362260401Sscottl#define SG_BIST_FAIL 0x20 3363260401Sscottl#define SG_BIST_EN 0x10 3364260401Sscottl#define CMC_BUFFER_BIST_FAIL 0x02 3365260401Sscottl#define CMC_BUFFER_BIST_EN 0x01 3366260401Sscottl 3367260401Sscottl#define CCSGRAM 0xb0 3368260401Sscottl 3369260401Sscottl#define CCSCBRAM 0xb0 3370260401Sscottl 3371260401Sscottl#define FLEXADR 0xb0 3372260401Sscottl 3373260401Sscottl#define FLEXCNT 0xb3 3374260401Sscottl 3375260401Sscottl#define FLEXDMASTAT 0xb5 3376260401Sscottl#define FLEXDMAERR 0x02 3377260401Sscottl#define FLEXDMADONE 0x01 3378260401Sscottl 3379260401Sscottl#define FLEXDATA 0xb6 3380260401Sscottl 3381260401Sscottl#define BRDDAT 0xb8 3382260401Sscottl 3383260401Sscottl#define BRDCTL 0xb9 3384260401Sscottl#define FLXARBACK 0x80 3385260401Sscottl#define FLXARBREQ 0x40 3386260401Sscottl#define BRDADDR 0x38 3387260401Sscottl#define BRDEN 0x04 3388260401Sscottl#define BRDRW 0x02 3389260401Sscottl#define BRDSTB 0x01 3390260401Sscottl 3391260401Sscottl#define SEEADR 0xba 3392260401Sscottl 3393260401Sscottl#define SEEDAT 0xbc 3394260401Sscottl 3395260401Sscottl#define SEECTL 0xbe 3396260401Sscottl#define SEEOP_EWEN 0x40 3397260401Sscottl#define SEEOP_EWDS 0x40 3398260401Sscottl#define SEEOP_WALL 0x40 3399260401Sscottl#define SEEOPCODE 0x70 3400260401Sscottl#define SEERST 0x02 3401260401Sscottl#define SEESTART 0x01 3402260401Sscottl#define SEEOP_ERASE 0x70 3403260401Sscottl#define SEEOP_READ 0x60 3404260401Sscottl#define SEEOP_WRITE 0x50 3405260401Sscottl#define SEEOP_ERAL 0x40 3406260401Sscottl 3407260401Sscottl#define SEESTAT 0xbe 3408260401Sscottl#define INIT_DONE 0x80 3409260401Sscottl#define LDALTID_L 0x08 3410260401Sscottl#define SEEARBACK 0x04 3411260401Sscottl#define SEEBUSY 0x02 3412260401Sscottl 3413260401Sscottl#define SCBCNT 0xbf 3414260401Sscottl 3415260401Sscottl#define DSPFLTRCTL 0xc0 3416260401Sscottl#define FLTRDISABLE 0x20 3417260401Sscottl#define EDGESENSE 0x10 3418260401Sscottl#define DSPFCNTSEL 0x0f 3419260401Sscottl 3420260401Sscottl#define DFWADDR 0xc0 3421260401Sscottl 3422260401Sscottl#define DSPDATACTL 0xc1 3423260401Sscottl#define BYPASSENAB 0x80 3424260401Sscottl#define DESQDIS 0x10 3425260401Sscottl#define RCVROFFSTDIS 0x04 3426260401Sscottl#define XMITOFFSTDIS 0x02 3427260401Sscottl 3428260401Sscottl#define DSPREQCTL 0xc2 3429260401Sscottl#define MANREQCTL 0xc0 3430260401Sscottl#define MANREQDLY 0x3f 3431260401Sscottl 3432260401Sscottl#define DFRADDR 0xc2 3433260401Sscottl 3434260401Sscottl#define DSPACKCTL 0xc3 3435260401Sscottl#define MANACKCTL 0xc0 3436260401Sscottl#define MANACKDLY 0x3f 3437260401Sscottl 3438260401Sscottl#define DFDAT 0xc4 3439260401Sscottl 3440260401Sscottl#define DSPSELECT 0xc4 3441260401Sscottl#define AUTOINCEN 0x80 3442260401Sscottl#define DSPSEL 0x1f 3443260401Sscottl 3444260401Sscottl#define WRTBIASCTL 0xc5 3445260401Sscottl#define AUTOXBCDIS 0x80 3446260401Sscottl#define XMITMANVAL 0x3f 3447260401Sscottl 3448260401Sscottl#define RCVRBIOSCTL 0xc6 3449260401Sscottl#define AUTORBCDIS 0x80 3450260401Sscottl#define RCVRMANVAL 0x3f 3451260401Sscottl 3452260401Sscottl#define WRTBIASCALC 0xc7 3453260401Sscottl 3454260401Sscottl#define DFPTRS 0xc8 3455260401Sscottl 3456260401Sscottl#define RCVRBIASCALC 0xc8 3457260401Sscottl 3458260401Sscottl#define DFBKPTR 0xc9 3459260401Sscottl 3460260401Sscottl#define SKEWCALC 0xc9 3461260401Sscottl 3462260401Sscottl#define DFDBCTL 0xcb 3463260401Sscottl#define DFF_CIO_WR_RDY 0x20 3464260401Sscottl#define DFF_CIO_RD_RDY 0x10 3465260401Sscottl#define DFF_DIR_ERR 0x08 3466260401Sscottl#define DFF_RAMBIST_FAIL 0x04 3467260401Sscottl#define DFF_RAMBIST_DONE 0x02 3468260401Sscottl#define DFF_RAMBIST_EN 0x01 3469260401Sscottl 3470260401Sscottl#define DFSCNT 0xcc 3471260401Sscottl 3472260401Sscottl#define DFBCNT 0xce 3473260401Sscottl 3474260401Sscottl#define OVLYADDR 0xd4 3475260401Sscottl 3476260401Sscottl#define SEQCTL0 0xd6 3477260401Sscottl#define PERRORDIS 0x80 3478260401Sscottl#define PAUSEDIS 0x40 3479260401Sscottl#define FAILDIS 0x20 3480260401Sscottl#define FASTMODE 0x10 3481260401Sscottl#define BRKADRINTEN 0x08 3482260401Sscottl#define STEP 0x04 3483260401Sscottl#define SEQRESET 0x02 3484260401Sscottl#define LOADRAM 0x01 3485260401Sscottl 3486260401Sscottl#define SEQCTL1 0xd7 3487260401Sscottl#define OVRLAY_DATA_CHK 0x08 3488260401Sscottl#define RAMBIST_DONE 0x04 3489260401Sscottl#define RAMBIST_FAIL 0x02 3490260401Sscottl#define RAMBIST_EN 0x01 3491260401Sscottl 3492260401Sscottl#define FLAGS 0xd8 3493260401Sscottl#define ZERO 0x02 3494260401Sscottl#define CARRY 0x01 3495260401Sscottl 3496260401Sscottl#define SEQINTCTL 0xd9 3497260401Sscottl#define INTVEC1DSL 0x80 3498260401Sscottl#define INT1_CONTEXT 0x20 3499260401Sscottl#define SCS_SEQ_INT1M1 0x10 3500260401Sscottl#define SCS_SEQ_INT1M0 0x08 3501260401Sscottl#define INTMASK2 0x04 3502260401Sscottl#define INTMASK1 0x02 3503260401Sscottl#define IRET 0x01 3504260401Sscottl 3505260401Sscottl#define SEQRAM 0xda 3506260401Sscottl 3507260401Sscottl#define PRGMCNT 0xde 3508260401Sscottl 3509260401Sscottl#define ACCUM 0xe0 3510260401Sscottl 3511260401Sscottl#define SINDEX 0xe2 3512260401Sscottl 3513260401Sscottl#define DINDEX 0xe4 3514260401Sscottl 3515260401Sscottl#define BRKADDR1 0xe6 3516260401Sscottl#define BRKDIS 0x80 3517260401Sscottl 3518260401Sscottl#define BRKADDR0 0xe6 3519260401Sscottl 3520260401Sscottl#define ALLONES 0xe8 3521260401Sscottl 3522260401Sscottl#define NONE 0xea 3523260401Sscottl 3524260401Sscottl#define ALLZEROS 0xea 3525260401Sscottl 3526260401Sscottl#define SINDIR 0xec 3527260401Sscottl 3528260401Sscottl#define DINDIR 0xed 3529260401Sscottl 3530260401Sscottl#define FUNCTION1 0xf0 3531260401Sscottl 3532260401Sscottl#define STACK 0xf2 3533260401Sscottl 3534260401Sscottl#define INTVEC1_ADDR 0xf4 3535260401Sscottl 3536260401Sscottl#define CURADDR 0xf4 3537260401Sscottl 3538260401Sscottl#define INTVEC2_ADDR 0xf6 3539260401Sscottl 3540260401Sscottl#define LASTADDR 0xf6 3541260401Sscottl 3542260401Sscottl#define LONGJMP_ADDR 0xf8 3543260401Sscottl 3544260401Sscottl#define ACCUM_SAVE 0xfa 3545260401Sscottl 3546260401Sscottl#define SRAM_BASE 0x100 3547260401Sscottl 3548260401Sscottl#define WAITING_SCB_TAILS 0x100 3549260401Sscottl 3550260401Sscottl#define AHD_PCI_CONFIG_BASE 0x100 3551260401Sscottl 3552260401Sscottl#define WAITING_TID_HEAD 0x120 3553260401Sscottl 3554260401Sscottl#define WAITING_TID_TAIL 0x122 3555260401Sscottl 3556260401Sscottl#define NEXT_QUEUED_SCB_ADDR 0x124 3557260401Sscottl 3558260401Sscottl#define COMPLETE_SCB_HEAD 0x128 3559260401Sscottl 3560260401Sscottl#define COMPLETE_SCB_DMAINPROG_HEAD 0x12a 3561260401Sscottl 3562260401Sscottl#define COMPLETE_DMA_SCB_HEAD 0x12c 3563260401Sscottl 3564260401Sscottl#define COMPLETE_DMA_SCB_TAIL 0x12e 3565260401Sscottl 3566260401Sscottl#define COMPLETE_ON_QFREEZE_HEAD 0x130 3567260401Sscottl 3568260401Sscottl#define QFREEZE_COUNT 0x132 3569260401Sscottl 3570260401Sscottl#define KERNEL_QFREEZE_COUNT 0x134 3571260401Sscottl 3572260401Sscottl#define SAVED_MODE 0x136 3573260401Sscottl 3574260401Sscottl#define MSG_OUT 0x137 3575260401Sscottl 3576260401Sscottl#define DMAPARAMS 0x138 3577260401Sscottl#define PRELOADEN 0x80 3578260401Sscottl#define WIDEODD 0x40 3579260401Sscottl#define SCSIEN 0x20 3580260401Sscottl#define SDMAEN 0x10 3581260401Sscottl#define SDMAENACK 0x10 3582260401Sscottl#define HDMAEN 0x08 3583260401Sscottl#define HDMAENACK 0x08 3584260401Sscottl#define DIRECTION 0x04 3585260401Sscottl#define FIFOFLUSH 0x02 3586260401Sscottl#define FIFORESET 0x01 3587260401Sscottl 3588260401Sscottl#define SEQ_FLAGS 0x139 3589260401Sscottl#define NOT_IDENTIFIED 0x80 3590260401Sscottl#define NO_CDB_SENT 0x40 3591260401Sscottl#define TARGET_CMD_IS_TAGGED 0x40 3592260401Sscottl#define DPHASE 0x20 3593260401Sscottl#define TARG_CMD_PENDING 0x10 3594260401Sscottl#define CMDPHASE_PENDING 0x08 3595260401Sscottl#define DPHASE_PENDING 0x04 3596260401Sscottl#define SPHASE_PENDING 0x02 3597260401Sscottl#define NO_DISCONNECT 0x01 3598260401Sscottl 3599260401Sscottl#define SAVED_SCSIID 0x13a 3600260401Sscottl 3601260401Sscottl#define SAVED_LUN 0x13b 3602260401Sscottl 3603260401Sscottl#define LASTPHASE 0x13c 3604260401Sscottl#define PHASE_MASK 0xe0 3605260401Sscottl#define CDI 0x80 3606260401Sscottl#define IOI 0x40 3607260401Sscottl#define MSGI 0x20 3608260401Sscottl#define P_BUSFREE 0x01 3609260401Sscottl#define P_MESGIN 0xe0 3610260401Sscottl#define P_STATUS 0xc0 3611260401Sscottl#define P_MESGOUT 0xa0 3612260401Sscottl#define P_COMMAND 0x80 3613260401Sscottl#define P_DATAIN_DT 0x60 3614260401Sscottl#define P_DATAIN 0x40 3615260401Sscottl#define P_DATAOUT_DT 0x20 3616260401Sscottl#define P_DATAOUT 0x00 3617260401Sscottl 3618260401Sscottl#define QOUTFIFO_ENTRY_VALID_TAG 0x13d 3619260401Sscottl 3620260401Sscottl#define KERNEL_TQINPOS 0x13e 3621260401Sscottl 3622260401Sscottl#define TQINPOS 0x13f 3623260401Sscottl 3624260401Sscottl#define SHARED_DATA_ADDR 0x140 3625260401Sscottl 3626260401Sscottl#define QOUTFIFO_NEXT_ADDR 0x144 3627260401Sscottl 3628260401Sscottl#define ARG_1 0x148 3629260401Sscottl#define RETURN_1 0x148 3630260401Sscottl#define SEND_MSG 0x80 3631260401Sscottl#define SEND_SENSE 0x40 3632260401Sscottl#define SEND_REJ 0x20 3633260401Sscottl#define MSGOUT_PHASEMIS 0x10 3634260401Sscottl#define EXIT_MSG_LOOP 0x08 3635260401Sscottl#define CONT_MSG_LOOP_WRITE 0x04 3636260401Sscottl#define CONT_MSG_LOOP_READ 0x03 3637260401Sscottl#define CONT_MSG_LOOP_TARG 0x02 3638260401Sscottl 3639260401Sscottl#define ARG_2 0x149 3640260401Sscottl#define RETURN_2 0x149 3641260401Sscottl 3642260401Sscottl#define LAST_MSG 0x14a 3643260401Sscottl 3644260401Sscottl#define SCSISEQ_TEMPLATE 0x14b 3645260401Sscottl#define MANUALCTL 0x40 3646260401Sscottl#define ENSELI 0x20 3647260401Sscottl#define ENRSELI 0x10 3648260401Sscottl#define MANUALP 0x0c 3649260401Sscottl#define ENAUTOATNP 0x02 3650260401Sscottl#define ALTSTIM 0x01 3651260401Sscottl 3652260401Sscottl#define INITIATOR_TAG 0x14c 3653260401Sscottl 3654260401Sscottl#define SEQ_FLAGS2 0x14d 3655260401Sscottl#define SELECTOUT_QFROZEN 0x04 3656260401Sscottl#define TARGET_MSG_PENDING 0x02 3657260401Sscottl#define PENDING_MK_MESSAGE 0x01 3658260401Sscottl 3659260401Sscottl#define ALLOCFIFO_SCBPTR 0x14e 3660260401Sscottl 3661260401Sscottl#define INT_COALESCING_TIMER 0x150 3662260401Sscottl 3663260401Sscottl#define INT_COALESCING_MAXCMDS 0x152 3664260401Sscottl 3665260401Sscottl#define INT_COALESCING_MINCMDS 0x153 3666260401Sscottl 3667260401Sscottl#define CMDS_PENDING 0x154 3668260401Sscottl 3669260401Sscottl#define INT_COALESCING_CMDCOUNT 0x156 3670260401Sscottl 3671260401Sscottl#define LOCAL_HS_MAILBOX 0x157 3672260401Sscottl 3673260401Sscottl#define CMDSIZE_TABLE 0x158 3674260401Sscottl 3675260401Sscottl#define MK_MESSAGE_SCB 0x160 3676260401Sscottl 3677260401Sscottl#define MK_MESSAGE_SCSIID 0x162 3678260401Sscottl 3679260401Sscottl#define SCB_BASE 0x180 3680260401Sscottl 3681260401Sscottl#define SCB_RESIDUAL_DATACNT 0x180 3682260401Sscottl#define SCB_HOST_CDB_PTR 0x180 3683260401Sscottl#define SCB_CDB_STORE 0x180 3684260401Sscottl 3685260401Sscottl#define SCB_RESIDUAL_SGPTR 0x184 3686260401Sscottl#define SG_ADDR_MASK 0xf8 3687260401Sscottl#define SG_ADDR_BIT 0x04 3688260401Sscottl#define SG_OVERRUN_RESID 0x02 3689260401Sscottl 3690260401Sscottl#define SCB_SCSI_STATUS 0x188 3691260401Sscottl#define SCB_HOST_CDB_LEN 0x188 3692260401Sscottl 3693260401Sscottl#define SCB_TARGET_PHASES 0x189 3694260401Sscottl 3695260401Sscottl#define SCB_TARGET_DATA_DIR 0x18a 3696260401Sscottl 3697260401Sscottl#define SCB_TARGET_ITAG 0x18b 3698260401Sscottl 3699260401Sscottl#define SCB_SENSE_BUSADDR 0x18c 3700260401Sscottl#define SCB_NEXT_COMPLETE 0x18c 3701260401Sscottl 3702260401Sscottl#define SCB_TAG 0x190 3703260401Sscottl#define SCB_FIFO_USE_COUNT 0x190 3704260401Sscottl 3705260401Sscottl#define SCB_CONTROL 0x192 3706260401Sscottl#define TARGET_SCB 0x80 3707260401Sscottl#define DISCENB 0x40 3708260401Sscottl#define TAG_ENB 0x20 3709260401Sscottl#define MK_MESSAGE 0x10 3710260401Sscottl#define STATUS_RCVD 0x08 3711260401Sscottl#define DISCONNECTED 0x04 3712260401Sscottl#define SCB_TAG_TYPE 0x03 3713260401Sscottl 3714260401Sscottl#define SCB_SCSIID 0x193 3715260401Sscottl#define TID 0xf0 3716260401Sscottl#define OID 0x0f 3717260401Sscottl 3718260401Sscottl#define SCB_LUN 0x194 3719260401Sscottl#define LID 0xff 3720260401Sscottl 3721260401Sscottl#define SCB_TASK_ATTRIBUTE 0x195 3722260401Sscottl#define SCB_XFERLEN_ODD 0x01 3723260401Sscottl 3724260401Sscottl#define SCB_CDB_LEN 0x196 3725260401Sscottl#define SCB_CDB_LEN_PTR 0x80 3726260401Sscottl 3727260401Sscottl#define SCB_TASK_MANAGEMENT 0x197 3728260401Sscottl 3729260401Sscottl#define SCB_DATAPTR 0x198 3730260401Sscottl 3731260401Sscottl#define SCB_DATACNT 0x1a0 3732260401Sscottl#define SG_LAST_SEG 0x80 3733260401Sscottl#define SG_HIGH_ADDR_BITS 0x7f 3734260401Sscottl 3735260401Sscottl#define SCB_SGPTR 0x1a4 3736260401Sscottl#define SG_STATUS_VALID 0x04 3737260401Sscottl#define SG_FULL_RESID 0x02 3738260401Sscottl#define SG_LIST_NULL 0x01 3739260401Sscottl 3740260401Sscottl#define SCB_BUSADDR 0x1a8 3741260401Sscottl 3742260401Sscottl#define SCB_NEXT 0x1ac 3743260401Sscottl#define SCB_NEXT_SCB_BUSADDR 0x1ac 3744260401Sscottl 3745260401Sscottl#define SCB_NEXT2 0x1ae 3746260401Sscottl 3747260401Sscottl#define SCB_SPARE 0x1b0 3748260401Sscottl#define SCB_PKT_LUN 0x1b0 3749260401Sscottl 3750260401Sscottl#define SCB_DISCONNECTED_LISTS 0x1b8 3751260401Sscottl 3752260401Sscottl 3753260401Sscottl#define STATUS_QUEUE_FULL 0x28 3754260401Sscottl#define WRTBIASCTL_HP_DEFAULT 0x00 3755260401Sscottl#define NUMDSPS 0x14 3756260401Sscottl#define AHD_NUM_PER_DEV_ANNEXCOLS 0x04 3757260401Sscottl#define AHD_TIMER_MAX_US 0x18ffe7 3758260401Sscottl#define STIMESEL_MIN 0x18 3759260401Sscottl#define TARGET_CMD_CMPLT 0xfe 3760260401Sscottl#define SEEOP_ERAL_ADDR 0x80 3761260401Sscottl#define SRC_MODE_SHIFT 0x00 3762260401Sscottl#define SCB_TRANSFER_SIZE_1BYTE_LUN 0x30 3763260401Sscottl#define MAX_OFFSET_PACED 0xfe 3764260401Sscottl#define SEEOP_EWDS_ADDR 0x00 3765260401Sscottl#define AHD_ANNEXCOL_AMPLITUDE 0x06 3766260401Sscottl#define AHD_PRECOMP_CUTBACK_29 0x06 3767260401Sscottl#define AHD_ANNEXCOL_PER_DEV0 0x04 3768260401Sscottl#define AHD_TIMER_MAX_TICKS 0xffff 3769260401Sscottl#define STATUS_PKT_SENSE 0xff 3770260401Sscottl#define CMD_GROUP_CODE_SHIFT 0x05 3771260401Sscottl#define BUS_8_BIT 0x00 3772260401Sscottl#define CCSGRAM_MAXSEGS 0x10 3773260401Sscottl#define AHD_AMPLITUDE_DEF 0x07 3774260401Sscottl#define AHD_SLEWRATE_DEF_REVB 0x08 3775260401Sscottl#define AHD_PRECOMP_CUTBACK_37 0x07 3776260401Sscottl#define AHD_PRECOMP_SHIFT 0x00 3777260401Sscottl#define PKT_OVERRUN_BUFSIZE 0x200 3778260401Sscottl#define SCB_TRANSFER_SIZE_FULL_LUN 0x38 3779260401Sscottl#define TARGET_DATA_IN 0x01 3780260401Sscottl#define STATUS_BUSY 0x08 3781260401Sscottl#define BUS_16_BIT 0x01 3782260401Sscottl#define CCSCBADDR_MAX 0x80 3783260401Sscottl#define TID_SHIFT 0x04 3784260401Sscottl#define AHD_AMPLITUDE_SHIFT 0x00 3785260401Sscottl#define AHD_SLEWRATE_DEF_REVA 0x08 3786260401Sscottl#define AHD_SLEWRATE_MASK 0x78 3787260401Sscottl#define MAX_OFFSET_PACED_BUG 0x7f 3788260401Sscottl#define AHD_PRECOMP_CUTBACK_17 0x04 3789260401Sscottl#define AHD_PRECOMP_MASK 0x07 3790260401Sscottl#define AHD_TIMER_US_PER_TICK 0x19 3791260401Sscottl#define HOST_MSG 0xff 3792260401Sscottl#define MAX_OFFSET 0xfe 3793260401Sscottl#define BUS_32_BIT 0x02 3794260401Sscottl#define SEEOP_EWEN_ADDR 0xc0 3795260401Sscottl#define AHD_AMPLITUDE_MASK 0x07 3796260401Sscottl#define LUNLEN_SINGLE_LEVEL_LUN 0x0f 3797260401Sscottl#define DST_MODE_SHIFT 0x04 3798260401Sscottl#define STIMESEL_SHIFT 0x03 3799260401Sscottl#define SEEOP_WRAL_ADDR 0x40 3800260401Sscottl#define AHD_ANNEXCOL_PRECOMP_SLEW 0x04 3801260401Sscottl#define MAX_OFFSET_NON_PACED 0x7f 3802260401Sscottl#define NVRAM_SCB_OFFSET 0x2c 3803260401Sscottl#define AHD_SENSE_BUFSIZE 0x100 3804260401Sscottl#define STIMESEL_BUG_ADJ 0x08 3805260401Sscottl#define INVALID_ADDR 0x80 3806260401Sscottl#define CCSGADDR_MAX 0x80 3807260401Sscottl#define MK_MESSAGE_BIT_OFFSET 0x04 3808260401Sscottl#define AHD_SLEWRATE_SHIFT 0x03 3809260401Sscottl#define B_CURRFIFO_0 0x02 3810260401Sscottl 3811260401Sscottl 3812260401Sscottl/* Downloaded Constant Definitions */ 3813260401Sscottl#define SG_SIZEOF 0x04 3814260401Sscottl#define CACHELINE_MASK 0x07 3815260401Sscottl#define SG_PREFETCH_ADDR_MASK 0x03 3816260401Sscottl#define SG_PREFETCH_ALIGN_MASK 0x02 3817260401Sscottl#define SCB_TRANSFER_SIZE 0x06 3818260401Sscottl#define SG_PREFETCH_CNT 0x00 3819260401Sscottl#define SG_PREFETCH_CNT_LIMIT 0x01 3820260401Sscottl#define PKT_OVERRUN_BUFOFFSET 0x05 3821260401Sscottl#define DOWNLOAD_CONST_COUNT 0x08 3822260401Sscottl 3823260401Sscottl 3824260401Sscottl/* Exported Labels */ 3825260401Sscottl#define LABEL_seq_isr 0x28f 3826260401Sscottl#define LABEL_timer_isr 0x28b 3827