Searched refs:SETUEQ (Results 1 - 23 of 23) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1058 SETUEQ, // 1 0 0 1 True if unordered or equal enumerator in enum:llvm::ISD::CondCode
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DAnalysis.cpp212 case FCmpInst::FCMP_UEQ: return ISD::SETUEQ;
225 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInsertSkips.cpp225 case ISD::SETUEQ:
H A DR600ISelLowering.cpp133 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
H A DAMDGPUISelLowering.cpp1271 case ISD::SETUEQ:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp43 case ISD::SETUEQ:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp417 case ISD::SETUEQ: return "setueq";
H A DTargetLowering.cpp359 case ISD::SETUEQ:
3795 if (Cond == ISD::SETUEQ &&
3808 if (Cond == ISD::SETUEQ &&
H A DSelectionDAG.cpp437 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
2026 case ISD::SETUEQ:
2116 case ISD::SETUEQ: return getBoolConstant(R==APFloat::cmpUnordered ||
H A DLegalizeDAG.cpp1690 case ISD::SETUEQ:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp857 case ISD::SETUEQ:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp3858 case ISD::SETUEQ:
3911 case ISD::SETUEQ:
3988 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break;
3996 case ISD::SETUEQ:
H A DPPCISelLowering.cpp519 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
520 setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand);
780 setCondCodeAction(ISD::SETUEQ, MVT::v4f32, Expand);
829 setCondCodeAction(ISD::SETUEQ, MVT::v2f64, Expand);
941 setCondCodeAction(ISD::SETUEQ, MVT::f128, Expand);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp89 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1583 case ISD::SETUEQ:
1627 case ISD::SETUEQ:
1658 case ISD::SETUEQ:
5464 if ((CC == ISD::SETEQ || CC == ISD::SETOEQ || CC == ISD::SETUEQ) &&
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp559 case ISD::SETUEQ:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp159 ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp1848 Op->getOperand(2), ISD::SETUEQ);
H A DMipsISelLowering.cpp625 case ISD::SETUEQ: return Mips::FCOND_UEQ;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1404 case ISD::SETUEQ: return SPCC::FCC_UE;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2813 case ISD::SETUEQ:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp1866 case ISD::SETUEQ: CondCode = ARMCC::EQ; CondCode2 = ARMCC::VS; break;
6291 case ISD::SETUEQ: Invert = true; LLVM_FALLTHROUGH;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp4904 case ISD::SETUEQ:
21187 case ISD::SETUEQ: SSECC = 8; break;
21199 case ISD::SETUEQ:
21411 // In the two cases not handled by SSE compare predicates (SETUEQ/SETONE),
21414 // LLVM predicate is SETUEQ or SETONE.
21417 if (Cond == ISD::SETUEQ) {
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