| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1051 SETOGT, // 0 0 1 0 True if ordered and greater than enumerator in enum:llvm::ISD::CondCode
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | Analysis.cpp | 205 case FCmpInst::FCMP_OGT: return ISD::SETOGT;
229 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT;
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInsertSkips.cpp | 199 case ISD::SETOGT:
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| H A D | AMDGPUISelLowering.cpp | 1314 case ISD::SETOGT: {
2055 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT);
2150 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT);
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| H A D | SIISelLowering.cpp | 7675 SDValue r2 = DAG.getSetCC(SL, SetCCVT, r1, K0, ISD::SETOGT);
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 409 case ISD::SETOGT: return "setogt";
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| H A D | TargetLowering.cpp | 342 case ISD::SETOGT:
3803 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGT);
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| H A D | SelectionDAG.cpp | 439 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
2019 case ISD::SETOGT:
2099 case ISD::SETOGT: return getBoolConstant(R==APFloat::cmpGreaterThan, dl,
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| H A D | LegalizeDAG.cpp | 1685 case ISD::SETOGT:
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| H A D | DAGCombiner.cpp | 8346 case ISD::SETOGT:
12510 case ISD::SETOGT:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 3808 case ISD::SETOGT:
3835 case ISD::SETOGT:
3876 case ISD::SETOGT:
3899 case ISD::SETOGT:
3900 case ISD::SETGT: return 1; // Bit #1 = SETOGT
3936 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break;
3945 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break;
3959 case ISD::SETOGT:
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| H A D | PPCISelLowering.cpp | 7609 case ISD::SETOGT:
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 264 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand);
269 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand);
401 setCondCodeAction(ISD::SETOGT, Ty, Expand);
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| H A D | MipsISelLowering.cpp | 612 case ISD::SETOGT: return Mips::FCOND_OGT;
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 855 case ISD::SETOGT:
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2681 case ISD::SETOGT:
2801 SDValue LT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode),
2818 SDValue LT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode),
2820 SDValue GT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode),
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2123 ISD::SETOGT);
2166 ISD::SETOGT);
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| H A D | NVPTXISelDAGToDAG.cpp | 545 case ISD::SETOGT:
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 159 ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT,
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1392 case ISD::SETOGT: return SPCC::FCC_G;
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1858 case ISD::SETOGT: CondCode = ARMCC::GT; break;
4657 else if (CC == ISD::SETUGT || CC == ISD::SETOGT || CC == ISD::SETOLT ||
6281 case ISD::SETOGT:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1560 case ISD::SETOGT:
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4907 case ISD::SETOGT:
21171 case ISD::SETOGT:
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