Searched refs:SETOEQ (Results 1 - 20 of 20) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 1050 SETOEQ, // 0 0 0 1 True if ordered and equal enumerator in enum:llvm::ISD::CondCode
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | Analysis.cpp | 204 case FCmpInst::FCMP_OEQ: return ISD::SETOEQ; 225 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInsertSkips.cpp | 195 case ISD::SETOEQ:
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H A D | AMDGPUISelLowering.cpp | 1267 case ISD::SETOEQ:
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H A D | SIISelLowering.cpp | 9891 if ((CC == ISD::SETOEQ || CC == ISD::SETONE) && LHS.getOpcode() == ISD::FABS) { 9906 unsigned Mask = CC == ISD::SETOEQ ? IsInfMask : IsFiniteMask;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 408 case ISD::SETOEQ: return "setoeq";
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H A D | LegalizeDAG.cpp | 1677 assert(TLI.isCondCodeLegal(ISD::SETOEQ, OpVT) 1678 && "If SETO is expanded, SETOEQ must be legal!"); 1679 CC1 = ISD::SETOEQ; CC2 = ISD::SETOEQ; Opc = ISD::AND; break; 1684 case ISD::SETOEQ:
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H A D | TargetLowering.cpp | 312 case ISD::SETOEQ: 3792 if (Cond == ISD::SETOEQ && 3805 if (Cond == ISD::SETOEQ &&
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H A D | LegalizeFloatTypes.cpp | 1710 LHSHi, RHSHi, ISD::SETOEQ);
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H A D | SelectionDAG.cpp | 436 case ISD::SETOEQ: // SETEQ & SETU[LG]E 2018 case ISD::SETOEQ: 2083 case ISD::SETOEQ: return getBoolConstant(R==APFloat::cmpEqual, dl, VT,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 856 case ISD::SETOEQ:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 3864 case ISD::SETOEQ: 3901 case ISD::SETOEQ: 3902 case ISD::SETEQ: return 2; // Bit #2 = SETOEQ 3944 case ISD::SETUNE: CC = ISD::SETOEQ; Negate = true; break; 3952 case ISD::SETOEQ:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 543 case ISD::SETOEQ:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 1828 Op->getOperand(2), ISD::SETOEQ);
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H A D | MipsISelLowering.cpp | 607 case ISD::SETOEQ: return Mips::FCOND_OEQ;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1386 case ISD::SETOEQ: return SPCC::FCC_E;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1856 case ISD::SETOEQ: CondCode = ARMCC::EQ; break; 5176 if (CC == ISD::SETOEQ) 5307 (CC == ISD::SETEQ || CC == ISD::SETOEQ || 6277 case ISD::SETOEQ:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1556 case ISD::SETOEQ: 5464 if ((CC == ISD::SETEQ || CC == ISD::SETOEQ || CC == ISD::SETUEQ) &&
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 192 // SETOEQ and SETUNE require checking two conditions. 193 setCondCodeAction(ISD::SETOEQ, MVT::f32, Expand); 194 setCondCodeAction(ISD::SETOEQ, MVT::f64, Expand); 195 setCondCodeAction(ISD::SETOEQ, MVT::f80, Expand); 4922 case ISD::SETOEQ: 21169 case ISD::SETOEQ: 21198 case ISD::SETOEQ: 22960 cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETOEQ) { [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 2661 case ISD::SETOEQ:
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