/freebsd-11-stable/sys/dev/utopia/ |
H A D | utopia_priv.h | 38 #define UTP_READREGS(UTOPIA, REG, VALP, NP) \ 39 (UTOPIA)->methods->readregs((UTOPIA)->ifatm, REG, VALP, NP) 40 #define UTP_WRITEREG(UTOPIA, REG, MASK, VAL) \ 41 (UTOPIA)->methods->writereg((UTOPIA)->ifatm, REG, MASK, VAL)
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/freebsd-11-stable/sys/contrib/alpine-hal/ |
H A D | al_hal_udma_debug.h | 60 #define AL_UDMA_PRINT_REG(UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG) \ 61 al_dbg(PREFIX #REG " = 0x%08x" POSTFIX, al_reg_read32( \ 62 &(UDMA->udma_regs->TYPE.GROUP.REG))) 65 UDMA, PREFIX, POSTFIX, FMT, TYPE, GROUP, REG, LBL, FIELD) \ 67 &(UDMA->udma_regs->TYPE.GROUP.REG)) \ 71 UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG, LBL, FIELD) \ 73 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
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/freebsd-11-stable/contrib/binutils/opcodes/ |
H A D | cr16-opc.c | 460 REG(u4, 0x84, CR16_U_REGTYPE) 463 #define REG(NAME, N, TYPE) {STRINGX(NAME), {NAME}, N, TYPE} macro 469 #define REG_R(N) REG(CONCAT2(r,N), N, CR16_R_REGTYPE) 475 REG(r12_L, 12, CR16_R_REGTYPE), 476 REG(r13_L, 13, CR16_R_REGTYPE), 477 REG(ra, 0xe, CR16_R_REGTYPE), 478 REG(sp, 0xf, CR16_R_REGTYPE), 479 REG(sp_L, 0xf, CR16_R_REGTYPE), 480 REG(RA, 0xe, CR16_R_REGTYPE), 491 REG((r1 [all...] |
H A D | arc-opc.c | 161 'r' REG generic register value, for register table 314 #define REG (MODDOT + 1) 318 #define AUXREG (REG + 1) 327 If REG is NULL, then this is actually a constant. 1059 if (type == REG) 1142 const struct arc_operand_value *reg = lookup_register (REG, regno); 1425 { "r0", 0, REG, 0 }, { "r1", 1, REG, 0 }, { "r2", 2, REG, 0 }, 1426 { "r3", 3, REG, 313 #define REG macro [all...] |
/freebsd-11-stable/contrib/gcc/ |
H A D | addresses.h | 34 if (index_code == REG) 59 if (index_code == REG)
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H A D | df.h | 447 #define DF_REG_DEF_GET(DF, REG) ((DF)->def_info.regs[(REG)]) 448 #define DF_REG_DEF_SET(DF, REG, VAL) ((DF)->def_info.regs[(REG)]=(VAL)) 449 #define DF_REG_DEF_COUNT(DF, REG) ((DF)->def_info.regs[(REG)]->n_refs) 450 #define DF_REG_USE_GET(DF, REG) ((DF)->use_info.regs[(REG)]) 451 #define DF_REG_USE_SET(DF, REG, VAL) ((DF)->use_info.regs[(REG)] [all...] |
H A D | regrename.c | 572 else if (code0 == REG && code1 == REG) 578 && regno_ok_for_base_p (regno1, mode, PLUS, REG)) 581 && regno_ok_for_base_p (regno0, mode, PLUS, REG)) 583 else if (regno_ok_for_base_p (regno1, mode, PLUS, REG)) 585 else if (regno_ok_for_base_p (regno0, mode, PLUS, REG)) 596 else if (code0 == REG) 602 else if (code1 == REG) 637 case REG: 678 case REG [all...] |
H A D | regclass.c | 234 /* Indexed by n, is nonzero if (REG n) is used in an auto-inc or auto-dec 1726 /* We must always fail if the operand is a REG, but 2030 else if (code0 == REG && code1 == REG 2032 && (ok_for_base_p_nonstrict (arg0, mode, PLUS, REG) 2035 ok_for_base_p_nonstrict (arg0, mode, PLUS, REG) 2037 PLUS, REG, scale); 2038 else if (code0 == REG && code1 == REG 2040 && (ok_for_base_p_nonstrict (arg1, mode, PLUS, REG) [all...] |
H A D | gensupport.c | 1334 LABEL_REF, SUBREG, REG, MEM }}, 1336 LABEL_REF, SUBREG, REG, MEM, 1338 {"register_operand", false, {SUBREG, REG}}, 1339 {"pmode_register_operand", true, {SUBREG, REG}}, 1340 {"scratch_operand", false, {SCRATCH, REG}}, 1345 {"nonimmediate_operand", false, {SUBREG, REG, MEM}}, 1347 LABEL_REF, SUBREG, REG}}, 1384 if (code != REG
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H A D | mode-switching.c | 162 /* Record in LIVE that register REG died. */ 179 /* Record in LIVE that register REG became live. 236 && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG) 256 && GET_CODE (XEXP (PATTERN (return_copy), 0)) == REG 275 if (GET_CODE (copy_reg) == REG) 278 && GET_CODE (SUBREG_REG (copy_reg)) == REG)
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H A D | rtl.c | 228 case REG: 361 (REG:SI x) and (REG:HI x) are NOT equivalent. */ 369 case REG:
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/freebsd-11-stable/sys/dev/uart/ |
H A D | uart_dev_imx.c | 92 GETREG(bas, REG(UCR1)), GETREG(bas, REG(UCR2)), 93 GETREG(bas, REG(UCR3)), GETREG(bas, REG(UCR4)), 94 GETREG(bas, REG(USR1)), GETREG(bas, REG(USR2))); 124 i = (GETREG(bas, REG(UFCR)) & IMXUART_UFCR_RFDIV_MASK) >> 127 ubir = GETREG(bas, REG(UBIR)) + 1; 128 ubmr = GETREG(bas, REG(UBMR)) + 1; 151 SET(bas, REG(UCR [all...] |
H A D | uart_dev_imx.h | 201 #define REG(_r) IMXUART_ ## _r ## _REG macro 216 #define ENA(_bas, _r, _b) SET((_bas), REG(_r), FLD(_r, _b)) 217 #define DIS(_bas, _r, _b) CLR((_bas), REG(_r), FLD(_r, _b)) 218 #define IS(_bas, _r, _b) IS_SET((_bas), REG(_r), FLD(_r, _b))
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/freebsd-11-stable/contrib/binutils/bfd/ |
H A D | cpu-ia64-opc.c | 427 #define REG IA64_OPND_CLASS_REG macro 454 { REG, ins_reg, ext_reg, "ar", {{ 7, 20}}, 0, /* AR3 */ 456 { REG, ins_reg, ext_reg, "b", {{ 3, 6}}, 0, /* B1 */ 458 { REG, ins_reg, ext_reg, "b", {{ 3, 13}}, 0, /* B2 */ 460 { REG, ins_reg, ext_reg, "cr", {{ 7, 20}}, 0, /* CR */ 462 { REG, ins_reg, ext_reg, "f", {{ 7, 6}}, 0, /* F1 */ 464 { REG, ins_reg, ext_reg, "f", {{ 7, 13}}, 0, /* F2 */ 466 { REG, ins_reg, ext_reg, "f", {{ 7, 20}}, 0, /* F3 */ 468 { REG, ins_reg, ext_reg, "f", {{ 7, 27}}, 0, /* F4 */ 470 { REG, ins_re [all...] |
/freebsd-11-stable/contrib/binutils/include/opcode/ |
H A D | arc.h | 229 REG is non-NULL when inserting a register value. */ 277 /* Non-zero if REG is a constant marker. */ 278 #define ARC_REG_CONSTANT_P(REG) ((REG) >= 61)
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/freebsd-11-stable/sys/dev/sym/ |
H A D | sym_fw.h | 200 #define RADDR_1(label) (RELOC_REGISTER | REG(label)) 201 #define RADDR_2(label,ofs) (RELOC_REGISTER | ((REG(label))+(ofs)))
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H A D | sym_defs.h | 550 #define REG(r) REGJ (nc_, r) macro 729 (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) 732 (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) 735 (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) 801 (0xe1000000 | (how) | (SCR_REG_OFS2(REG(reg))) | (n)) 804 (0xe0000000 | (how) | (SCR_REG_OFS2(REG(reg))) | (n))
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/freebsd-11-stable/sys/dev/ncr/ |
H A D | ncrreg.h | 260 #define REG(r) REGJ (nc_, r) macro 426 (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | ((data)<<8ul)) 429 (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | ((data)<<8ul)) 432 (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | ((data)<<8ul))
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/freebsd-11-stable/sys/dev/pci/ |
H A D | pci.c | 614 #define REG(n, w) PCIB_READ_CONFIG(pcib, b, s, f, n, w) macro 617 cfg->subvendor = REG(PCIR_SUBVEND_0, 2); 618 cfg->subdevice = REG(PCIR_SUBDEV_0, 2); 619 cfg->mingnt = REG(PCIR_MINGNT, 1); 620 cfg->maxlat = REG(PCIR_MAXLAT, 1); 624 cfg->bridge.br_seclat = REG(PCIR_SECLAT_1, 1); 625 cfg->bridge.br_subbus = REG(PCIR_SUBBUS_1, 1); 626 cfg->bridge.br_secbus = REG(PCIR_SECBUS_1, 1); 627 cfg->bridge.br_pribus = REG(PCIR_PRIBUS_1, 1); 628 cfg->bridge.br_control = REG(PCIR_BRIDGECTL_ 642 #undef REG macro 649 #define REG macro 732 #undef REG macro 737 #define REG macro 807 #undef REG macro 812 #define REG macro 1322 #undef REG macro 4053 #define REG macro 4090 #undef REG macro 4096 #define REG macro 4187 #undef REG macro [all...] |
/freebsd-11-stable/contrib/gdb/gdb/ |
H A D | ax.h | 185 /* Assemble code to push the value of register number REG on the 187 extern void ax_reg (struct agent_expr *EXPR, int REG);
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/freebsd-11-stable/contrib/gcc/config/arm/ |
H A D | arm.c | 1688 || (GET_CODE (target) == REG && GET_CODE (source) == REG 3495 if (GET_CODE (x) != REG) 3553 && GET_CODE (addend) == REG) 3705 if (GET_CODE (x) != REG) 3788 /* REG+REG address can be any two index registers. */ 3789 /* We disallow FRAME+REG addressing since we know that FRAME 3799 /* REG+const has 5-7 bit offset for non-SP registers. */ 3806 /* REG [all...] |
H A D | arm.h | 1126 || ((GET_CODE (X) == REG || GET_CODE (X) == SUBREG) \ 1142 && GET_CODE (XEXP (X, 0)) == REG \ 1908 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1977 (GET_CODE (X) == REG && ARM_REG_OK_FOR_BASE_P (X)) 1980 (GET_CODE (X) == REG && ARM_REG_OK_FOR_INDEX_P (X)) 2299 if (GET_CODE (X) == REG) \ 2306 if (GET_CODE (base) != REG) \ 2324 case REG: \ 2353 gcc_assert (GET_CODE (XEXP (X, 0)) == REG); \ 2391 if (GET_CODE (X) == REG) \ [all...] |
/freebsd-11-stable/contrib/gcc/config/sparc/ |
H A D | sparc.h | 1307 || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \ 1326 || ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \ 1839 /* Is X, a REG, an in or global register? i.e. is regno 0..7 or 24..31 */ 1864 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1948 On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT 1956 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 1958 && GET_CODE (SUBREG_REG (X)) == REG \ 1962 ((GET_CODE (X) == REG [all...] |
/freebsd-11-stable/sys/dev/fatm/ |
H A D | if_fatmreg.h | 99 #define FATM_MAKE_SETOC3(REG,VAL,MASK) \ 100 (FATM_OP_OC3_SET_REG | (((REG) & 0xff) << 8) | \
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/freebsd-11-stable/usr.bin/xlint/lint1/ |
H A D | init.c | 445 if ((initsym->s_scl == AUTO || initsym->s_scl == REG) && 501 if ((sc == AUTO || sc == REG) && 571 if (sc == AUTO || sc == REG) {
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