config/arm/arm.c

1688       || (GET_CODE (target) == REG && GET_CODE (source) == REG
3495   if (GET_CODE (x) != REG)
3553 	  && GET_CODE (addend) == REG)
3705   if (GET_CODE (x) != REG)
3788       /* REG+REG address can be any two index registers.  */
3789       /* We disallow FRAME+REG addressing since we know that FRAME
3799       /* REG+const has 5-7 bit offset for non-SP registers.  */
3806       /* REG+const has 10 bit offset for SP, but only SImode and
3810       else if (GET_CODE (XEXP (x, 0)) == REG
3819       else if (GET_CODE (XEXP (x, 0)) == REG
4284   (GET_CODE (X) == REG							\
4285    || (GET_CODE (X) == SUBREG && GET_CODE (SUBREG_REG (X)) == REG))
4288    (GET_CODE (X) == REG ? (X) : SUBREG_REG (X))
4435       if (mode == SImode && GET_CODE (XEXP (x, 1)) == REG)
4445 		+ ((GET_CODE (XEXP (x, 0)) == REG
4447 			&& GET_CODE (SUBREG_REG (XEXP (x, 0))) == REG))
4449       return (1 + ((GET_CODE (XEXP (x, 0)) == REG
4451 			&& GET_CODE (SUBREG_REG (XEXP (x, 0))) == REG))
4453 	      + ((GET_CODE (XEXP (x, 1)) == REG
4455 		      && GET_CODE (SUBREG_REG (XEXP (x, 1))) == REG)
4687       if (mode == SImode && GET_CODE (XEXP (x, 1)) == REG)
5143    PRE/POST_INC/DEC, SHIFT or NON-INT sum, INT sum, REG, MEM or LABEL.  */
5173   if (c == REG)
5176       && GET_CODE (XEXP (x, 0)) == REG
5363       if (GET_CODE (ind) == REG)
5370 	  && GET_CODE (XEXP (ind, 0)) == REG
5412   if (GET_CODE (ind) == REG)
5434       && GET_CODE (XEXP (ind, 0)) == REG
5479 /* Returns TRUE if INSN is an "LDR REG, ADDR" instruction.
5502   if (GET_CODE (lhs) != REG
5590 	  if (GET_CODE (lhs) == REG)
5594 	      gcc_assert (GET_CODE (rhs) == REG);
5614 	      && GET_CODE (XEXP (body, 1)) == REG
5789   if ((GET_CODE (XEXP (a, 0)) == REG
5792       && (GET_CODE (XEXP (b, 0)) == REG
5882       if ((GET_CODE (reg = XEXP (operands[nops + i], 0)) == REG
5884 	       && GET_CODE (reg = SUBREG_REG (reg)) == REG))
5887 		   == REG)
5889 		      && GET_CODE (reg = SUBREG_REG (reg)) == REG))
5896 	      unsorted_regs[0] = (GET_CODE (operands[i]) == REG
5907 	      unsorted_regs[i] = (GET_CODE (operands[i]) == REG
6109       if ((GET_CODE (reg = XEXP (operands[nops + i], 0)) == REG
6111 	       && GET_CODE (reg = SUBREG_REG (reg)) == REG))
6114 		   == REG)
6116 		      && GET_CODE (reg = SUBREG_REG (reg)) == REG))
6123 	      unsorted_regs[0] = (GET_CODE (operands[i]) == REG
6134 	      unsorted_regs[i] = (GET_CODE (operands[i]) == REG
6734   if (GET_MODE (y) == SImode && GET_CODE (y) == REG
6864   if (GET_CODE (ref) == REG)
6981   if (GET_CODE (ref) == REG)
8421    REG is the base register, either the frame pointer or the stack pointer,
8451    REG and COUNT specify the register range.
8494   gcc_assert (GET_CODE (operands[1]) == REG);
8756    It must be REG<-REG, REG<-CONST_DOUBLE, REG<-CONST_INT, REG<-MEM
8757    or MEM<-REG and all MEMs must be offsettable addresses.  */
8765   if (code0 == REG)
8775 	case REG:
8878 		      && (GET_CODE (otherops[2]) == REG
8939       gcc_assert (code0 == MEM && code1 == REG);
8944 	case REG:
9020 	      && (GET_CODE (otherops[2]) == REG
9148     case REG:
11012    If X is a REG and CODE is `M', output a ldm/stm style multi-reg.  */
11155       if (GET_CODE (x) != REG || REGNO (x) > LAST_ARM_REGNUM)
11165       if (GET_CODE (x) != REG || REGNO (x) > LAST_ARM_REGNUM)
11175       if (GET_CODE (x) != REG || REGNO (x) > LAST_ARM_REGNUM)
11186 		   GET_CODE (XEXP (x, 0)) == REG
11239       gcc_assert (GET_CODE (x) == REG
11254 	if (GET_CODE (x) != REG || REGNO_REG_CLASS (REGNO (x)) != CIRRUS_REGS)
11270       if (GET_CODE (x) != REG
11320 	if (GET_CODE (x) != REG
11347 	case REG:
12072   if (GET_CODE (addr) != REG)
12122 	  && GET_CODE (XEXP (XEXP (PATTERN (insn), 1), 0)) == REG
14200   gcc_assert (GET_CODE (operands[0]) == REG);
14209     case REG:
14241       gcc_assert (GET_CODE (base) == REG);
14244       if (GET_CODE (offset) == REG)
15018       || GET_CODE (reg = XEXP (sum, 0)) != REG
15105   if (GET_CODE (early_op) == REG)
15138   if (GET_CODE (early_op) != REG)
15453       || GET_CODE (XEXP (e, 0)) != REG
15506 	  || GET_CODE (XEXP (e, 1)) != REG)
15528 	  if (GET_CODE (XEXP (e, 0)) != REG
15535 	       || GET_CODE (e) != REG
15558 	  || GET_CODE (XEXP (XEXP (e0, 0), 0)) != REG
15570     case REG:
15575 	      || GET_CODE (XEXP (e1, 0)) != REG
15590 	      if (GET_CODE (XEXP (e1, 0)) != REG
15599 	  else if (GET_CODE (e1) == REG)
15608       else if (GET_CODE (e1) == REG && REGNO (e1) == SP_REGNUM)
15614 	      && GET_CODE (XEXP (e1, 0)) == REG