/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyReplacePhysRegs.cpp | 79 for (unsigned PReg = WebAssembly::NoRegister + 1; 80 PReg < WebAssembly::NUM_TARGET_REGS; ++PReg) { 82 if (PReg == WebAssembly::VALUE_STACK || PReg == WebAssembly::ARGUMENTS) 86 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(PReg); 88 for (auto I = MRI.reg_begin(PReg), E = MRI.reg_end(); I != E;) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | RegUsageInfoCollector.cpp | 155 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { 157 if (SavedRegs.test(PReg)) 161 if (!MRI->def_empty(PReg)) { 162 for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI) 170 if (UsedPhysRegsMask.test(PReg)) 171 SetRegAsDefined(PReg); 182 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PReg [all...] |
H A D | RegisterUsageInfo.cpp | 95 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { 96 if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg)) 97 OS << printReg(PReg, TRI) << " ";
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H A D | RegAllocPBQP.cpp | 614 unsigned PReg = RawPRegOrder[I]; local 615 if (MRI.isReserved(PReg)) 619 if (!RegMaskOverlaps.empty() && !RegMaskOverlaps.test(PReg)) 624 for (MCRegUnitIterator Units(PReg, &TRI); Units.isValid(); ++Units) { 634 VRegAllowed.push_back(PReg); 725 unsigned PReg = G.getNodeMetadata(NId).getAllowedRegs()[AllocOption - 1]; local 727 << TRI.getName(PReg) << "\n"); 728 assert(PReg != 0 && "Invalid preg selected."); 729 VRM.assignVirt2Phys(VReg, PReg); 753 unsigned PReg local [all...] |
H A D | CallingConvLower.cpp | 252 for (MCPhysReg PReg : RemainingRegs) { 253 unsigned VReg = MF.addLiveIn(PReg, RC); 254 Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
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H A D | MachineFunction.cpp | 611 unsigned MachineFunction::addLiveIn(unsigned PReg, argument 614 unsigned VReg = MRI.getLiveInVirtReg(PReg); 623 assert((VRegRC == RC || (VRegRC->contains(PReg) && 629 MRI.addLiveIn(PReg, VReg);
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H A D | MachineRegisterInfo.cpp | 458 /// getLiveInVirtReg - If PReg is a live-in physical register, return the 460 unsigned MachineRegisterInfo::getLiveInVirtReg(unsigned PReg) const { 462 if (I->first == PReg)
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H A D | MachineVerifier.cpp | 547 void MachineVerifier::report_context(MCPhysReg PReg) const { 548 errs() << "- p. register: " << printReg(PReg, TRI) << '\n';
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonBitTracker.h | 57 unsigned getNextPhysReg(unsigned PReg, unsigned Width) const; 58 unsigned getVirtRegFor(unsigned PReg) const;
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H A D | HexagonBitTracker.cpp | 1247 unsigned HexagonEvaluator::getNextPhysReg(unsigned PReg, unsigned Width) const { 1250 bool Is64 = DoubleRegsRegClass.contains(PReg); 1251 assert(PReg == 0 || Is64 || IntRegsRegClass.contains(PReg)); 1259 if (PReg == 0) 1267 if (Phys32[Idx32] == PReg) 1274 if (Phys64[Idx64] == PReg) 1286 unsigned HexagonEvaluator::getVirtRegFor(unsigned PReg) const { 1288 if (P.first == PReg)
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H A D | HexagonBlockRanges.cpp | 280 unsigned PReg = *RC.begin(); local 281 MCSubRegIndexIterator I(PReg, &TRI);
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H A D | HexagonInstrInfo.cpp | 1261 Register PReg = Op1.getReg(); local 1270 .addReg(PReg, S) 1279 .addReg(PReg, PState) 1295 Register PReg = Op1.getReg(); local 1306 .addReg(PReg, S) 1318 .addReg(PReg, PState)
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 168 ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT) argument 169 : VReg(VReg), PReg(PReg), VT(VT) {} 171 MCPhysReg PReg; member in struct:llvm::ForwardedRegister
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H A D | MachineFunction.h | 646 unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC);
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H A D | MachineRegisterInfo.h | 948 /// getLiveInVirtReg - If PReg is a live-in physical register, return the 950 unsigned getLiveInVirtReg(unsigned PReg) const;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64CallLowering.cpp | 411 MBB.addLiveIn(F.PReg); 412 MIRBuilder.buildCopy(Register(F.VReg), Register(F.PReg)); 877 Register ForwardedReg = F.PReg;
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H A D | AArch64ISelLowering.cpp | 4051 RegsToPass.emplace_back(F.PReg, Val);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMLoadStoreOptimizer.cpp | 1013 Register PReg = PMO.getReg(); local 1015 : TRI->getEncodingValue(PReg); 1024 PReg == getLoadStoreBaseOp(*MI).getReg()) 1035 if (PReg == ARM::SP || PReg == ARM::PC)
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2666 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; 2671 PReg = X86::RBP; 2677 PReg = X86::EBP; 2692 .addReg(ScratchReg), PReg, false, SPLimitOffset); 2701 .addReg(ScratchReg), PReg, false, SPLimitOffset);
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H A D | X86ISelLowering.cpp | 4082 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val)); [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 1257 addLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) argument 1260 MF.getRegInfo().addLiveIn(PReg, VReg);
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