Searched refs:Outs (Results 1 - 25 of 59) sorted by relevance

123

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCCState.cpp17 const SmallVectorImpl<ISD::OutputArg> &Outs) {
18 for (const auto &I : Outs) {
16 PreAnalyzeCallOperands( const SmallVectorImpl<ISD::OutputArg> &Outs) argument
H A DPPCCCState.h22 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs);
H A DPPCISelLowering.h1041 const SmallVectorImpl<ISD::OutputArg> &Outs,
1124 const SmallVectorImpl<ISD::OutputArg> &Outs,
1128 const SmallVectorImpl<ISD::OutputArg> &Outs,
1161 const SmallVectorImpl<ISD::OutputArg> &Outs,
1170 const SmallVectorImpl<ISD::OutputArg> &Outs,
1179 const SmallVectorImpl<ISD::OutputArg> &Outs,
1188 const SmallVectorImpl<ISD::OutputArg> &Outs,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCCState.h37 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
42 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
59 PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);
89 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, argument
93 PreAnalyzeCallOperands(Outs, FuncArgs, Func);
94 CCState::AnalyzeCallOperands(Outs, Fn);
104 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
106 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
130 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, argument
132 PreAnalyzeReturnForF128(Outs);
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H A DMipsCCState.cpp99 const SmallVectorImpl<ISD::OutputArg> &Outs) {
101 for (unsigned i = 0; i < Outs.size(); ++i) {
121 const SmallVectorImpl<ISD::OutputArg> &Outs) {
122 for (unsigned i = 0; i < Outs.size(); ++i) {
123 ISD::OutputArg Out = Outs[i];
132 const SmallVectorImpl<ISD::OutputArg> &Outs,
135 for (unsigned i = 0; i < Outs.size(); ++i) {
136 TargetLowering::ArgListEntry FuncArg = FuncArgs[Outs[i].OrigArgIndex];
141 CallOperandIsFixed.push_back(Outs[i].IsFixed);
98 PreAnalyzeReturnForF128( const SmallVectorImpl<ISD::OutputArg> &Outs) argument
120 PreAnalyzeReturnForVectorFloat( const SmallVectorImpl<ISD::OutputArg> &Outs) argument
131 PreAnalyzeCallOperands( const SmallVectorImpl<ISD::OutputArg> &Outs, std::vector<TargetLowering::ArgListEntry> &FuncArgs, const char *Func) argument
H A DMipsCallLowering.cpp435 SmallVector<ISD::OutputArg, 8> Outs; local
436 subTargetRegTypeForCallingConv(F, RetInfos, OrigArgIndices, Outs);
441 CCInfo.AnalyzeReturn(Outs, TLI.CCAssignFnForReturn());
442 setLocInfo(ArgLocs, Outs);
602 SmallVector<ISD::OutputArg, 8> Outs; local
603 subTargetRegTypeForCallingConv(F, ArgInfos, OrigArgIndices, Outs);
617 CCInfo.AnalyzeCallOperands(Outs, TLI.CCAssignFnForCall(), FuncOrigArgs, Call);
618 setLocInfo(ArgLocs, Outs);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h58 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, argument
62 for (unsigned i = 0; i < Outs.size(); ++i)
63 ArgIsFixed.push_back(Outs[i].IsFixed);
66 for (unsigned i = 0; i < Outs.size(); ++i)
67 ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT));
69 CCState::AnalyzeCallOperands(Outs, Fn);
74 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DCallingConvLower.cpp100 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, argument
103 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
104 MVT VT = Outs[i].VT;
105 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
114 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, argument
117 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
118 MVT VT = Outs[i].VT;
119 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
127 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, argument
129 unsigned NumOps = Outs
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp43 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {
45 assert(Outs.empty() && "TODO implement return values");
52 const SmallVectorImpl<ISD::OutputArg> &Outs,
56 assert(Outs.empty() && "TODO implement return values");
41 CanLowerReturn( CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument
50 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
H A DVEISelLowering.h56 const SmallVectorImpl<ISD::OutputArg> &Outs,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h116 const SmallVectorImpl<ISD::OutputArg> &Outs,
144 const SmallVectorImpl<ISD::OutputArg> &Outs,
H A DLanaiISelLowering.cpp413 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; local
428 return LowerCCCCallTo(Chain, Callee, CallConv, IsVarArg, IsTailCall, Outs,
536 const SmallVectorImpl<ISD::OutputArg> &Outs,
547 CCInfo.AnalyzeReturn(Outs, RetCC_Lanai32);
598 bool /*IsTailCall*/, const SmallVectorImpl<ISD::OutputArg> &Outs,
616 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32_VarArg);
619 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32_Fast);
621 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32);
629 for (unsigned I = 0, E = Outs
534 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
596 LowerCCCCallTo( SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool IsVarArg, bool , const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h85 const SmallVectorImpl<ISD::OutputArg> &Outs,
88 const SmallVectorImpl<ISD::OutputArg> &Outs,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h140 const SmallVectorImpl<ISD::OutputArg> &Outs,
170 const SmallVectorImpl<ISD::OutputArg> &Outs,
174 const SmallVectorImpl<ISD::OutputArg> &Outs,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h151 const SmallVectorImpl<ISD::OutputArg> &Outs,
156 const SmallVectorImpl<ISD::OutputArg> &Outs,
161 const SmallVectorImpl<ISD::OutputArg> &Outs,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h162 const SmallVectorImpl<ISD::OutputArg> &Outs,
172 const SmallVectorImpl<ISD::OutputArg> &Outs,
175 const SmallVectorImpl<ISD::OutputArg> &Outs,
H A DRISCVISelLowering.cpp1692 const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsRet,
1694 unsigned NumArgs = Outs.size();
1697 MVT ArgVT = Outs[i].VT;
1698 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
1699 Type *OrigTy = CLI ? CLI->getArgs()[Outs[i].OrigArgIndex].Ty : nullptr;
1703 ArgFlags, CCInfo, Outs[i].IsFixed, IsRet, OrigTy)) {
2063 auto &Outs = CLI.Outs; local
2094 auto IsCalleeStructRet = Outs.empty() ? false : Outs[
1690 analyzeOutputArgs( MachineFunction &MF, CCState &CCInfo, const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsRet, CallLoweringInfo *CLI) const argument
2133 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; local
2403 CanLowerReturn( CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument
2420 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h302 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
308 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
313 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
323 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs, argument
325 AnalyzeCallOperands(Outs, Fn);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.h105 const SmallVectorImpl<ISD::OutputArg> &Outs,
H A DARCISelLowering.cpp227 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; local
242 CCInfo.AnalyzeCallOperands(Outs, CC_ARC);
594 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {
597 if (!CCInfo.CheckReturn(Outs, RetCC_ARC))
607 const SmallVectorImpl<ISD::OutputArg> &Outs,
625 CCInfo.AnalyzeReturn(Outs, RetCC_ARC);
592 CanLowerReturn( CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument
605 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.h98 const SmallVectorImpl<ISD::OutputArg> &Outs,
H A DBPFISelLowering.cpp278 auto &Outs = CLI.Outs; local
303 CCInfo.AnalyzeCallOperands(Outs, getHasAlu32() ? CC_BPF32 : CC_BPF64);
307 if (Outs.size() > MaxArgs)
310 for (auto &Arg : Outs) {
409 const SmallVectorImpl<ISD::OutputArg> &Outs,
427 CCInfo.AnalyzeReturn(Outs, getHasAlu32() ? RetCC_BPF32 : RetCC_BPF64);
407 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h155 const SmallVectorImpl<ISD::OutputArg> &Outs,
221 const SmallVectorImpl<ISD::OutputArg> &Outs,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.h153 const SmallVectorImpl<ISD::OutputArg> &Outs,
157 const SmallVectorImpl<ISD::OutputArg> &Outs,
H A DAVRISelLowering.cpp934 const SmallVectorImpl<ISD::OutputArg> *Outs,
948 CCInfo.AnalyzeCallOperands(*Outs, ArgCC_AVR_Vararg);
958 parseExternFuncCallArgs(*Outs, Args);
975 MVT LocVT = (IsCall) ? (*Outs)[pos].VT : (*Ins)[pos].VT;
1010 const SmallVectorImpl<ISD::OutputArg> *Outs,
1018 CCInfo.AnalyzeCallOperands(*Outs, ArgCC_AVR_BUILTIN_DIV);
1020 analyzeStandardArguments(&CLI, F, TD, Outs, Ins,
1028 const SmallVectorImpl<ISD::OutputArg> *Outs,
1035 analyzeBuiltinArguments(*CLI, F, TD, Outs, Ins,
1041 analyzeStandardArguments(CLI, F, TD, Outs, In
932 analyzeStandardArguments(TargetLowering::CallLoweringInfo *CLI, const Function *F, const DataLayout *TD, const SmallVectorImpl<ISD::OutputArg> *Outs, const SmallVectorImpl<ISD::InputArg> *Ins, CallingConv::ID CallConv, SmallVectorImpl<CCValAssign> &ArgLocs, CCState &CCInfo, bool IsCall, bool IsVarArg) argument
1008 analyzeBuiltinArguments(TargetLowering::CallLoweringInfo &CLI, const Function *F, const DataLayout *TD, const SmallVectorImpl<ISD::OutputArg> *Outs, const SmallVectorImpl<ISD::InputArg> *Ins, CallingConv::ID CallConv, SmallVectorImpl<CCValAssign> &ArgLocs, CCState &CCInfo, bool IsCall, bool IsVarArg) argument
1026 analyzeArguments(TargetLowering::CallLoweringInfo *CLI, const Function *F, const DataLayout *TD, const SmallVectorImpl<ISD::OutputArg> *Outs, const SmallVectorImpl<ISD::InputArg> *Ins, CallingConv::ID CallConv, SmallVectorImpl<CCValAssign> &ArgLocs, CCState &CCInfo, bool IsCall, bool IsVarArg) argument
1149 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; local
1357 CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const argument
1370 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const argument
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