Searched refs:NewMask (Results 1 - 23 of 23) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterPressure.cpp52 LaneBitmask PrevMask, LaneBitmask NewMask) {
53 assert((PrevMask & ~NewMask).none() && "Must not remove bits");
54 if (PrevMask.any() || NewMask.none())
66 LaneBitmask PrevMask, LaneBitmask NewMask) {
67 //assert((NewMask & !PrevMask) == 0 && "Must not add bits");
68 if (NewMask.any() || PrevMask.none())
157 LaneBitmask NewMask) {
158 if (PreviousMask.any() || NewMask.none())
172 LaneBitmask NewMask) {
173 decreaseSetPressure(CurrSetPressure, *MRI, RegUnit, PreviousMask, NewMask);
50 increaseSetPressure(std::vector<unsigned> &CurrSetPressure, const MachineRegisterInfo &MRI, unsigned Reg, LaneBitmask PrevMask, LaneBitmask NewMask) argument
64 decreaseSetPressure(std::vector<unsigned> &CurrSetPressure, const MachineRegisterInfo &MRI, unsigned Reg, LaneBitmask PrevMask, LaneBitmask NewMask) argument
155 increaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask, LaneBitmask NewMask) argument
170 decreaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask, LaneBitmask NewMask) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.cpp99 LaneBitmask NewMask,
101 if (NewMask == PrevMask)
105 if (NewMask < PrevMask) {
106 std::swap(NewMask, PrevMask);
116 assert(PrevMask.none() && NewMask == MaxMask);
123 assert(NewMask < MaxMask || NewMask == MaxMask);
124 assert(PrevMask < NewMask);
127 Sign * (~PrevMask & NewMask).getNumLanes();
130 assert(NewMask
97 inc(unsigned Reg, LaneBitmask PrevMask, LaneBitmask NewMask, const MachineRegisterInfo &MRI) argument
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H A DSIModeRegister.cpp47 Status(unsigned NewMask, unsigned NewMode) : Mask(NewMask), Mode(NewMode) { argument
66 unsigned NewMask = (Mask & S.Mask) & (Mode ^ ~S.Mode); local
67 unsigned NewMode = (Mode & NewMask);
68 return Status(NewMask, NewMode);
H A DGCNRegBankReassign.cpp466 unsigned NewMask = ((1 << Size) - 1) << I;
467 NewMask = (NewMask | (NewMask >> NUM_VGPR_BANKS)) & VGPR_BANK_MASK;
468 if (!(UsedBanks & NewMask))
481 unsigned NewMask = ((1 << Size) - 1) << I;
482 NewMask = (NewMask | (NewMask >> NUM_SGPR_BANKS)) & SGPR_BANK_SHIFTED_MASK;
483 if (!(UsedBanks & (NewMask << SGPR_BANK_OFFSE
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H A DGCNRegPressure.h61 LaneBitmask NewMask,
H A DSIISelLowering.cpp8371 unsigned NewMask = LCC == ISD::SETO ? local
8377 DAG.getConstant(NewMask, DL, MVT::i32));
8465 uint32_t NewMask = (CLHS->getZExtValue() | CRHS->getZExtValue()) & MaxMask; local
8468 Src, DAG.getConstant(NewMask, DL, MVT::i32));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineVectorOps.cpp844 Constant *NewMask = ConstantVector::get(NewMaskVec); local
845 return new ShuffleVectorInst(Op0, UndefValue::get(Op0->getType()), NewMask);
893 Constant *NewMask = ConstantVector::get(NewMaskVec); local
894 return new ShuffleVectorInst(X, Shuf->getOperand(1), NewMask);
1534 SmallVector<Constant *, 16> NewMask(NumMaskElts, Zero);
1537 NewMask[i] = Mask->getAggregateElement(i);
1539 return new ShuffleVectorInst(NewIns, UndefVec, ConstantVector::get(NewMask));
1732 SmallVector<Constant *, 16> NewMask(NumElts);
1739 NewMask[i] = isa<UndefValue>(ExtractMaskElt) ? ExtractMaskElt : MaskElt;
1741 return new ShuffleVectorInst(X, Y, ConstantVector::get(NewMask));
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H A DInstCombineShifts.cpp216 Constant *NewMask; local
247 NewMask = ConstantExpr::getNot(ExtendedInvertedMask);
283 NewMask =
288 NewMask = ConstantExpr::getTrunc(NewMask, NarrowestTy);
291 bool NeedMask = !match(NewMask, m_AllOnes());
316 return BinaryOperator::Create(Instruction::And, NewShift, NewMask);
H A DInstCombineAndOrXor.cpp280 unsigned NewMask; local
281 NewMask = (Mask & (AMask_AllOnes | BMask_AllOnes | Mask_AllZeros |
285 NewMask |= (Mask & (AMask_NotAllOnes | BMask_NotAllOnes | Mask_NotAllZeros |
289 return NewMask;
511 Value *NewMask = ConstantInt::get(BCst->getType(), BorD); local
513 Value *NewAnd = Builder.CreateAnd(A, NewMask);
690 APInt NewMask = BCst->getValue() & DCst->getValue(); local
692 if (NewMask == BCst->getValue())
694 else if (NewMask == DCst->getValue())
703 APInt NewMask local
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H A DInstCombineSimplifyDemanded.cpp299 APInt NewMask = ~(LHSKnown.One & RHSKnown.One & DemandedMask); local
302 ConstantInt::get(I->getType(), NewMask & AndRHS->getValue());
307 ConstantInt::get(I->getType(), NewMask & XorRHS->getValue());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAGHVX.cpp841 MutableArrayRef<int> NewMask, unsigned Options = None);
843 MutableArrayRef<int> NewMask);
1053 ResultStack &Results, MutableArrayRef<int> NewMask,
1079 memcpy(NewMask.data(), SM.Mask.data(), sizeof(int)*VecLen);
1087 NewMask[I] = M;
1117 NewMask[I] = M;
1140 NewMask[I] = M;
1150 ResultStack &Results, MutableArrayRef<int> NewMask) {
1192 NewMask[I] = M;
1249 SmallVector<int,128> NewMask(VecLe
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterPressure.h552 LaneBitmask NewMask);
554 LaneBitmask NewMask);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1648 SDValue NewMask = DAG.getConstant(0xff, DL, VT); local
1650 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask);
1661 insertDAGNode(DAG, N, NewMask);
1720 SDValue NewMask = DAG.getConstant(Mask >> ShiftAmt, DL, VT); local
1721 SDValue NewAnd = DAG.getNode(ISD::AND, DL, VT, X, NewMask);
1729 insertDAGNode(DAG, N, NewMask);
1886 SDValue NewMask = DAG.getConstant(Mask >> AMShiftAmt, DL, VT); local
1887 SDValue NewAnd = DAG.getNode(ISD::AND, DL, VT, NewSRL, NewMask);
1898 insertDAGNode(DAG, N, NewMask);
4008 SDValue NewMask local
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H A DX86ISelLowering.cpp12660 SmallVector<int, 4> NewMask(Mask.begin(), Mask.end());
12664 ShuffleVectorSDNode::commuteMask(NewMask);
12672 (isSingleSHUFPSMask(NewMask) || is128BitUnpackShuffleMask(NewMask)))
12676 NewMask.append(NumElts, -1);
12680 NewMask);
13296 int NewMask[4] = {Mask[0], Mask[1], Mask[2], Mask[3]};
13313 NewMask[V2Index] -= 4;
13330 NewMask[V1Index] = 2; // We put the V1 element in V2[2].
13331 NewMask[V2Inde
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H A DX86InstrInfo.cpp6564 unsigned NewMask = 0; local
6572 NewMask |= (1u << i);
6581 NewMask |= (SubMask << (i * Scale));
6587 *pNewMask = NewMask;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp271 SmallVector<int, 8> NewMask;
276 NewMask.push_back(-1);
278 NewMask.push_back(Idx * NumEltsGrowth + j);
281 assert(NewMask.size() == NumDestElts && "Non-integer NumEltsGrowth?");
282 assert(TLI.isShuffleMaskLegal(NewMask, NVT) && "Shuffle not legal?");
283 return DAG.getVectorShuffle(NVT, dl, N1, N2, NewMask);
3034 SmallVector<int, 32> NewMask;
3072 NewMask.push_back(Mask[i]);
3076 NewMask.push_back(Mask[i]*factor+fi);
3079 Mask = NewMask;
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H A DDAGCombiner.cpp4762 SDValue NewMask = DAG.getConstant(AndMask.trunc(Size / 2), SL, HalfVT); local
4765 SDValue And = DAG.getNode(ISD::AND, SL, HalfVT, Shift, NewMask);
11380 SmallVector<int, 8> NewMask; local
11383 NewMask.push_back(M < 0 ? -1 : M * MaskScale + i);
11386 TLI.buildLegalVectorShuffle(VT, SDLoc(N), SV0, SV1, NewMask, DAG);
16787 SmallVector<int, 16> NewMask(Mask.begin(), Mask.end());
16790 NewMask[InsIndex] = ElementOffset + ExtrIndex->getZExtValue();
16791 assert(NewMask[InsIndex] <
16793 NewMask[InsIndex] >= 0 && "NewMask[InsInde
19168 SmallVector<int, 8> NewMask; local
19184 SmallVector<int, 8> NewMask; local
19306 SmallVector<int, 8> NewMask; local
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H A DLegalizeVectorTypes.cpp4071 SmallVector<int, 16> NewMask; local
4075 NewMask.push_back(Idx);
4077 NewMask.push_back(Idx - NumElts + WidenNumElts);
4080 NewMask.push_back(-1);
4081 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, NewMask);
H A DTargetLowering.cpp2469 SmallVector<int, 32> NewMask(ShuffleMask.begin(), ShuffleMask.end());
2471 int &M = NewMask[i];
2488 NewMask, TLO.DAG);
H A DLegalizeIntegerTypes.cpp4243 ArrayRef<int> NewMask = SV->getMask().slice(0, VT.getVectorNumElements()); local
4249 return DAG.getVectorShuffle(OutVT, dl, V0, V1, NewMask);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/
H A DInstructions.cpp1819 SmallVector<Constant*, 16> NewMask(NumMaskElts);
1824 NewMask[i] = UndefValue::get(Int32Ty);
1829 NewMask[i] = ConstantInt::get(Int32Ty, MaskElt);
1831 Op<2>() = ConstantVector::get(NewMask);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp286 unsigned NewMask = 0; local
287 NewMask |= ITState.Mask & (0xC << TZ);
288 NewMask |= 0x2 << TZ;
289 ITState.Mask = NewMask;
334 unsigned NewMask = 0; local
336 NewMask |= ITState.Mask & (0xE << TZ);
338 NewMask |= (Cond != ITState.Cond) << TZ;
340 NewMask |= 1 << (TZ - 1);
341 ITState.Mask = NewMask;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp13051 SmallVector<int, 16> NewMask; local
13062 NewMask.push_back(NewElt);
13065 DAG.getUNDEF(VT), NewMask);
15792 auto UseMask = [Mask, Op, VT, &TLO](unsigned NewMask) -> bool {
15793 if (NewMask == Mask)
15796 SDValue NewC = TLO.DAG.getConstant(NewMask, DL, VT);

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