Searched refs:LoadVT (Results 1 - 16 of 16) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp4108 static SDValue adjustLoadValueTypeImpl(SDValue Result, EVT LoadVT, argument
4111 if (!LoadVT.isVector())
4116 EVT IntLoadVT = LoadVT.changeTypeToInteger();
4128 return DAG.getNode(ISD::BITCAST, DL, LoadVT, Result);
4132 return DAG.getNode(ISD::BITCAST, DL, LoadVT, Result);
4143 EVT LoadVT = M->getValueType(0); local
4145 EVT EquivLoadVT = LoadVT;
4146 if (Unpacked && LoadVT.isVector()) {
4147 EquivLoadVT = LoadVT.isVector() ?
4149 LoadVT
4172 EVT LoadVT = M->getValueType(0); local
5404 MVT LoadVT = ResultTypes[0].getSimpleVT(); local
5701 MVT LoadVT = VT.getSimpleVT(); local
6292 EVT LoadVT = Op.getValueType(); local
6349 EVT LoadVT = Op.getValueType(); local
6379 EVT LoadVT = Op.getValueType(); local
6403 EVT LoadVT = Op.getValueType(); local
7219 handleByteShortBufferLoads(SelectionDAG &DAG, EVT LoadVT, SDLoc DL, ArrayRef<SDValue> Ops, MemSDNode *M) const argument
[all...]
H A DSIISelLowering.h212 SDValue handleByteShortBufferLoads(SelectionDAG &DAG, EVT LoadVT, SDLoc DL,
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h412 virtual bool isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT, argument
417 if (!LoadVT.isSimple() || !BitcastVT.isSimple())
420 MVT LoadMVT = LoadVT.getSimpleVT();
2354 EVT LoadVT = getValueType(DL, Load->getType()); local
2358 if (!Load->hasOneUse() && (isTypeLegal(LoadVT) || !isTypeLegal(VT)) &&
2371 return isLoadExtLegal(LType, VT, LoadVT);
H A DBasicTTIImpl.h732 EVT LoadVT = EVT::getEVT(Src); local
735 if (TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DStatepointLowering.cpp1036 auto LoadVT = DAG.getTargetLoweringInfo().getValueType(DAG.getDataLayout(), local
1039 SDValue SpillLoad = DAG.getLoad(LoadVT, getCurSDLoc(), Chain,
H A DLegalizeVectorOps.cpp753 EVT LoadVT = WideVT; local
756 LoadVT = EVT::getIntegerVT(*DAG.getContext(), LoadBytes << 3);
760 LD->getPointerInfo().getWithOffset(Offset), LoadVT,
H A DSelectionDAGBuilder.cpp7259 static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT, argument
7266 Type::getIntNTy(PtrVal->getContext(), LoadVT.getScalarSizeInBits());
7267 if (LoadVT.isVector())
7268 LoadTy = VectorType::get(LoadTy, LoadVT.getVectorNumElements());
7293 SDValue LoadVal = Builder.DAG.getLoad(LoadVT, Builder.getCurSDLoc(), Root,
7372 MVT LoadVT; local
7378 LoadVT = MVT::i16;
7381 LoadVT = MVT::i32;
7386 LoadVT = hasFastLoadsAndCompare(NumBitsToCompare);
7390 if (LoadVT
[all...]
H A DLegalizeDAG.cpp881 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT()); variable
882 if (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT?
883 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) {
887 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType;
889 SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr,
H A DDAGCombiner.cpp15544 EVT LoadVT; local
15548 LoadVT = Ld->getMemoryVT();
15550 if (MemVT != LoadVT)
15579 if (LoadVT != OtherLd->getMemoryVT())
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2577 EVT LoadVT = EltVT; local
2579 LoadVT = MVT::i8;
2584 LoadVT = MVT::i32;
2586 EVT VecVT = EVT::getVectorVT(F->getContext(), LoadVT, NumElts);
2600 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, LoadVT, P,
2611 Ins[InsIdx].VT.getSizeInBits() > LoadVT.getSizeInBits()) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h1183 bool isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT,
H A DX86ISelLowering.cpp5166 bool X86TargetLowering::isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT,
5169 if (!Subtarget.hasAVX512() && !LoadVT.isVector() && BitcastVT.isVector() &&
5173 if (!Subtarget.hasDQI() && BitcastVT == MVT::v8i1 && LoadVT == MVT::i8)
5177 if (LoadVT.isVector() && BitcastVT.isVector() &&
5178 isTypeLegal(LoadVT) && isTypeLegal(BitcastVT))
5181 return TargetLowering::isLoadBitCastBeneficial(LoadVT, BitcastVT, DAG, MMO);
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp6074 EVT LoadVT = N->getValueType(0); local
6075 if (LoadVT == MVT::i16)
6076 LoadVT = MVT::i32;
6079 DAG.getVTList(LoadVT, MVT::Other),
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp11248 EVT LoadVT = VT; local
11250 LoadVT = VT.changeTypeToInteger();
11253 SDValue PassThru = DAG.getConstant(0, DL, LoadVT);
11254 SDValue L = DAG.getMaskedLoad(LoadVT, DL, MINode->getChain(),
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp13854 MVT LoadVT = VT.getSimpleVT(); local
13856 (LoadVT == MVT::v2f64 || LoadVT == MVT::v2i64 ||
13857 LoadVT == MVT::v4f32 || LoadVT == MVT::v4i32))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp13264 EVT LoadVT = isLaneOp ? VecTy.getVectorElementType() : AlignedVecTy; local
13265 SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, dl, SDTys, Ops, LoadVT,

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