/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 332 /// this is a normal rounding, if it is 1, this FP_ROUND is known to not 588 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type 591 /// normal rounding, if it is 1, this FP_ROUND is known to not change the 597 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for 598 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. 599 FP_ROUND, enumerator in enum:llvm::ISD::NodeType
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeFloatTypes.cpp | 104 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break; 530 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!"); 777 case ISD::FP_TO_FP16: // Same as FP_ROUND for softening purposes 779 case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break; 823 // returns an i16 so doesn't meet the constraints necessary for FP_ROUND. 824 assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16 || 834 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall"); 987 // Do an FP_ROUND followed by a non-truncating store. 988 Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, dl, ST->getMemoryVT(), 1661 case ISD::FP_ROUND [all...] |
H A D | LegalizeVectorTypes.cpp | 54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break; 305 return DAG.getNode(ISD::FP_ROUND, SDLoc(N), 601 case ISD::FP_ROUND: 765 SDValue Res = DAG.getNode(ISD::FP_ROUND, SDLoc(N), 885 case ISD::FP_ROUND: 1710 if (N->getOpcode() == ISD::FP_ROUND) { 1934 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break; 2599 ? DAG.getNode(ISD::FP_ROUND, DL, OutVT, InterVec, 2651 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1)); 2652 Hi = DAG.getNode(ISD::FP_ROUND, D [all...] |
H A D | LegalizeVectorOps.cpp | 435 case ISD::FP_ROUND: 573 case ISD::FP_ROUND: 612 Res = DAG.getNode(ISD::FP_ROUND, dl, VT, Res, DAG.getIntPtrConstant(0, dl));
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H A D | LegalizeDAG.cpp | 2881 // We might as well mutate to FP_ROUND when FP_ROUND operation is legal 2887 // We fall back to use stack operation when the FP_ROUND operation 2895 case ISD::FP_ROUND: 3231 SDValue FloatVal = DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, Op, 4389 TruncOp = ISD::FP_ROUND; 4398 if (TruncOp != ISD::FP_ROUND) 4458 Results.push_back(DAG.getNode(ISD::FP_ROUND, dl, OVT, 4481 DAG.getNode(ISD::FP_ROUND, dl, OVT, 4495 // which is a no-op. Mark it as a TRUNCating FP_ROUND [all...] |
H A D | SelectionDAGDumper.cpp | 327 case ISD::FP_ROUND: return "fp_round";
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H A D | DAGCombiner.cpp | 1590 case ISD::FP_ROUND: return visitFP_ROUND(N); 9435 CastOpcode == ISD::FP_ROUND) && 9461 if (CastOpcode == ISD::FP_ROUND) { 9462 // FP_ROUND (fptrunc) has an extra flag operand to pass along. 12793 } else if (N1.getOpcode() == ISD::FP_ROUND && 12797 RV = DAG.getNode(ISD::FP_ROUND, SDLoc(N1), VT, RV, N1.getOperand(1)); 12875 N1.getOpcode() == ISD::FP_ROUND)) { 13232 return DAG.getNode(ISD::FP_ROUND, SDLoc(N), VT, N0, N1); 13239 if (N0.getOpcode() == ISD::FP_ROUND) { 13260 return DAG.getNode(ISD::FP_ROUND, D [all...] |
H A D | SelectionDAG.cpp | 1125 : getNode(ISD::FP_ROUND, DL, VT, Op, getIntPtrConstant(0, DL)); 4127 case ISD::FP_ROUND: { 4567 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 5099 if (N1CFP && Opcode == ISD::FP_ROUND) { 5254 case ISD::FP_ROUND: 5259 "Invalid FP_ROUND!");
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H A D | TargetLowering.cpp | 5600 case ISD::FP_ROUND: 5722 case ISD::FP_ROUND: 5723 return DAG.getNode(ISD::FP_ROUND, SDLoc(Op), Op.getValueType(),
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H A D | SelectionDAGBuilder.cpp | 322 // FP_ROUND's are always exact here. 325 ISD::FP_ROUND, DL, ValueVT, Val, 3448 setValue(&I, DAG.getNode(ISD::FP_ROUND, dl, DestVT, N, 6286 DAG.getNode(ISD::FP_ROUND, sdl, MVT::f16,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 161 { ISD::FP_ROUND, MVT::v2f64, 2 }, 166 if (Src->isVectorTy() && ST->hasNEON() && (ISD == ISD::FP_ROUND ||
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H A D | ARMISelLowering.cpp | 873 setOperationAction(ISD::FP_ROUND, MVT::v2f32, Expand); 983 setOperationAction(ISD::FP_ROUND, MVT::f32, Custom); 995 setOperationAction(ISD::FP_ROUND, MVT::f16, Custom); 9379 case ISD::FP_ROUND: return LowerFP_ROUND(Op, DAG); 16444 "Unexpected type for custom-lowering FP_ROUND"); 16458 "Unexpected type for custom-lowering FP_ROUND");
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1717 setOperationAction(ISD::FP_ROUND, MVT::f64, Legal); 1745 setOperationAction(ISD::FP_ROUND, MVT::f64, Custom); 1746 setOperationAction(ISD::FP_ROUND, MVT::f32, Custom); 2315 // FP_ROUND on f64 and f32 are legal. 3051 case ISD::FP_ROUND: return LowerF128_FPROUND(Op, DAG, *this);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 2529 DAG.getNode(ISD::FP_ROUND, DL, MVT::f16, IntToFp32, FPRoundFlag); 2569 DAG.getNode(ISD::FP_ROUND, DL, MVT::f16, IntToFp32, FPRoundFlag); 3830 case ISD::FP_ROUND: { 3835 return DAG.getNode(ISD::FP_ROUND, SL, VT, 3844 return DAG.getNode(ISD::FP_ROUND, SL, VT, Neg, N0.getOperand(1));
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H A D | R600ISelLowering.cpp | 277 setTargetDAGCombine(ISD::FP_ROUND); 1849 case ISD::FP_ROUND: {
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H A D | SIISelLowering.cpp | 226 setOperationAction(ISD::FP_ROUND, MVT::v2f32, Expand); 501 setOperationAction(ISD::FP_ROUND, MVT::f16, Custom); 4074 case ISD::FP_ROUND: 4591 "Do not know how to custom lower FP_ROUND for non-f16 type"); 7651 SDValue BestQuot = DAG.getNode(ISD::FP_ROUND, SL, MVT::f16, Quot, FPRoundFlag); 8600 case ISD::FP_ROUND: 8771 case ISD::FP_ROUND:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86TargetTransformInfo.cpp | 1338 { ISD::FP_ROUND, MVT::v8f32, MVT::v8f64, 1 }, 1436 { ISD::FP_ROUND, MVT::v8f32, MVT::v8f64, 3 }, 1517 { ISD::FP_ROUND, MVT::v4f32, MVT::v4f64, 1 },
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H A D | X86ISelDAGToDAG.cpp | 819 case ISD::FP_ROUND: 833 case ISD::FP_ROUND: NewOpc = X86ISD::VFPROUND; break; 1034 case ISD::FP_ROUND: 1065 MVT MemVT = (N->getOpcode() == ISD::FP_ROUND) ? DstVT : SrcVT; 1076 // We're about to replace all uses of the FP_ROUND/FP_EXTEND with the 1160 // We're about to replace all uses of the FP_ROUND/FP_EXTEND with the
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H A D | X86ISelLowering.cpp | 714 // We need to custom handle any FP_ROUND with an f128 input, but 718 setOperationAction(ISD::FP_ROUND, MVT::f32, Custom); 722 setOperationAction(ISD::FP_ROUND, MVT::f64, Custom); 726 setOperationAction(ISD::FP_ROUND, MVT::f80, Custom); 998 setOperationAction(ISD::FP_ROUND, MVT::v2f32, Custom); 3061 Val = DAG.getNode(ISD::FP_ROUND, dl, VA.getValVT(), Val, 19416 return DAG.getNode(ISD::FP_ROUND, dl, DstVT, Add, 20320 // FP_ROUND node has a second operand indicating whether it is known to be 20490 Sign = DAG.getNode(ISD::FP_ROUND, dl, VT, Sign, DAG.getIntPtrConstant(1, dl)); [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 954 setOperationAction(ISD::FP_ROUND, MVT::f64, Legal); 955 setOperationAction(ISD::FP_ROUND, MVT::f32, Legal); 1017 setOperationAction(ISD::FP_ROUND , MVT::v4f32, Legal); 8089 Value = DAG.getNode(ISD::FP_ROUND, dl, 8239 FP = DAG.getNode(ISD::FP_ROUND, dl, 8312 FP = DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, FP, 8572 (V->getOperand(i).getOpcode() == ISD::FP_ROUND && 13002 // If we are converting to 32-bit integers, we need to add an FP_ROUND. 13022 // For 32-bit values, we need to add an FP_ROUND node (if we made it 13027 SDValue Trunc = DAG.getNode(ISD::FP_ROUND, d [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 308 setOperationAction(ISD::FP_ROUND, MVT::f32, Custom); 309 setOperationAction(ISD::FP_ROUND, MVT::f64, Custom); 735 setOperationAction(ISD::FP_ROUND, MVT::v1f64, Expand); 2538 // FP_ROUND node has a second operand indicating whether it is known to be 2636 return DAG.getNode(ISD::FP_ROUND, dl, VT, In, DAG.getIntPtrConstant(0, dl)); 2664 ISD::FP_ROUND, dl, MVT::f16, 3204 case ISD::FP_ROUND: 5093 In2 = DAG.getNode(ISD::FP_ROUND, DL, VT, In2, DAG.getIntPtrConstant(0, DL)); 5757 // FP_ROUND nodes as well. 5781 SDValue NarrowFP = DAG.getNode(ISD::FP_ROUND, D [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 1627 case FPTrunc: return ISD::FP_ROUND;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 639 setTargetDAGCombine(ISD::FP_ROUND); 6391 case ISD::FP_ROUND: return combineFP_ROUND(N, DCI);
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