Searched refs:Br (Results 1 - 25 of 47) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCPreEmitPeephole.cpp237 MachineInstr *Br = &*I; variable
238 if (Br->getOpcode() != PPC::BC && Br->getOpcode() != PPC::BCn)
241 Register CRBit = Br->getOperand(0).getReg();
244 MachineBasicBlock::reverse_iterator It = Br, Er = MBB.rend();
259 if ((Br->getOpcode() == PPC::BCn && CRSetOp == PPC::CRSET) ||
260 (Br->getOpcode() == PPC::BC && CRSetOp == PPC::CRUNSET)) {
262 InstrsToErase.push_back(Br);
263 MBB.removeSuccessor(Br->getOperand(1).getMBB());
268 MachineBasicBlock::iterator It = Br, E
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsBranchExpansion.cpp129 MachineInstr *Br = nullptr; member in struct:__anon2742::MBBInfo
156 int64_t computeOffset(const MachineInstr *Br);
158 void replaceBranch(MachineBasicBlock &MBB, Iter Br, const DebugLoc &DL,
223 /// Iterate over list of Br's operands and search for a MachineBasicBlock
225 static MachineBasicBlock *getTargetMBB(const MachineInstr &Br) { argument
226 for (unsigned I = 0, E = Br.getDesc().getNumOperands(); I < E; ++I) {
227 const MachineOperand &MO = Br.getOperand(I);
304 int64_t MipsBranchExpansion::computeOffset(const MachineInstr *Br) { argument
306 int ThisMBB = Br->getParent()->getNumber();
307 int TargetMBB = getTargetMBB(*Br)
334 replaceBranch(MachineBasicBlock &MBB, Iter Br, const DebugLoc &DL, MachineBasicBlock *MBBOpnd) argument
790 ReverseIter Br = getNonDebugInstr(MBB->rbegin(), End); local
[all...]
H A DMipsConstantIslandPass.cpp405 bool fixupImmediateBr(ImmBranch &Br);
406 bool fixupConditionalBr(ImmBranch &Br);
407 bool fixupUnconditionalBr(ImmBranch &Br);
1484 bool MipsConstantIslands::fixupImmediateBr(ImmBranch &Br) { argument
1485 MachineInstr *MI = Br.MI;
1490 if (isBBInRange(MI, DestBB, Br.MaxDisp))
1493 if (!Br.isCond)
1494 return fixupUnconditionalBr(Br);
1495 return fixupConditionalBr(Br);
1503 MipsConstantIslands::fixupUnconditionalBr(ImmBranch &Br) { argument
1543 fixupConditionalBr(ImmBranch &Br) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMConstantIslandPass.cpp270 bool fixupImmediateBr(ImmBranch &Br);
271 bool fixupConditionalBr(ImmBranch &Br);
272 bool fixupUnconditionalBr(ImmBranch &Br);
1603 bool ARMConstantIslands::fixupImmediateBr(ImmBranch &Br) { argument
1604 MachineInstr *MI = Br.MI;
1608 if (BBUtils->isBBInRange(MI, DestBB, Br.MaxDisp))
1611 if (!Br.isCond)
1612 return fixupUnconditionalBr(Br);
1613 return fixupConditionalBr(Br);
1621 ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) { argument
1648 fixupConditionalBr(ImmBranch &Br) argument
[all...]
H A DARMBaseInstrInfo.h732 MachineInstr *findCMPToFoldIntoCBZ(MachineInstr *Br,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanHCFGBuilder.cpp203 if (auto *Br = dyn_cast<BranchInst>(Inst)) {
206 if (Br->isConditional())
207 getOrCreateVPOperand(Br->getCondition());
290 auto *Br = cast<BranchInst>(TI); local
291 Value *BrCond = Br->getCondition();
H A DLoopVectorizationLegality.cpp433 auto *Br = dyn_cast<BranchInst>(BB->getTerminator()); local
434 if (!Br) {
450 if (!EnableVPlanPredication && Br && Br->isConditional() &&
451 !TheLoop->isLoopInvariant(Br->getCondition()) &&
452 !LI->isLoopHeader(Br->getSuccessor(0)) &&
453 !LI->isLoopHeader(Br->getSuccessor(1))) {
/freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/
H A DCGCleanup.cpp365 if (llvm::BranchInst *Br = dyn_cast<llvm::BranchInst>(Term)) {
366 assert(Br->isUnconditional());
370 llvm::SwitchInst::Create(Load, Br->getSuccessor(0), 4, Block);
371 Br->eraseFromParent();
526 llvm::BranchInst *Br = dyn_cast<llvm::BranchInst>(Pred->getTerminator());
527 if (!Br || Br->isConditional()) return Entry;
528 assert(Br->getSuccessor(0) == Entry);
537 Br->eraseFromParent();
587 if (llvm::BranchInst *Br
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DStructurizeCFG.cpp950 auto Br = dyn_cast<BranchInst>(E->getEntry()->getTerminator());
951 if (!Br || !Br->isConditional())
954 if (!DA.isUniform(Br))
960 LLVM_DEBUG(dbgs() << "BB: " << Br->getParent()->getName()
973 auto Br = dyn_cast<BranchInst>(BB->getTerminator());
974 if (!Br || !Br->isConditional())
977 if (!Br->getMetadata(UniformMDKindID)) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp119 if (const BranchInst *Br = dyn_cast<BranchInst>(&I)) {
120 if (UP.Threshold < MaxBoost && Br->isConditional()) {
121 BasicBlock *Succ0 = Br->getSuccessor(0);
122 BasicBlock *Succ1 = Br->getSuccessor(1);
126 if (dependsOnLocalPhi(L, Br->getCondition())) {
130 << *L << " due to " << *Br << '\n');
512 case Instruction::Br:
938 case Instruction::Br:
H A DAMDGPULegalizerInfo.cpp1809 MachineInstr *&Br) {
1824 Br = &*Next;
2356 MachineInstr *Br = nullptr;
2357 if (MachineInstr *BrCond = verifyCFIntrinsic(MI, MRI, Br)) {
2366 if (Br)
2367 BrTarget = Br->getOperand(0).getMBB();
2382 if (Br)
2383 Br->getOperand(0).setMBB(BrCond->getOperand(1).getMBB());
2395 MachineInstr *Br = nullptr;
2396 if (MachineInstr *BrCond = verifyCFIntrinsic(MI, MRI, Br)) {
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp119 I->getOpcode() != MSP430::Br &&
199 if (I->getOpcode() == MSP430::Br ||
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFastISel.cpp1270 const auto *Br = cast<BranchInst>(I); local
1271 if (Br->isUnconditional()) {
1272 MachineBasicBlock *MSucc = FuncInfo.MBBMap[Br->getSuccessor(0)];
1273 fastEmitBranch(MSucc, Br->getDebugLoc());
1277 MachineBasicBlock *TBB = FuncInfo.MBBMap[Br->getSuccessor(0)];
1278 MachineBasicBlock *FBB = FuncInfo.MBBMap[Br->getSuccessor(1)];
1281 unsigned CondReg = getRegForI1Value(Br->getCondition(), Not);
1293 finishCondBranch(Br->getParent(), TBB, FBB);
1384 case Instruction::Br:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DInlineFunction.cpp2318 Instruction *Br = OrigBB->getTerminator(); local
2319 assert(Br && Br->getOpcode() == Instruction::Br &&
2321 Br->setOperand(0, &*FirstNewBlock);
2413 assert(cast<BranchInst>(Br)->isUnconditional() && "splitBasicBlock broken!");
2414 BasicBlock *CalleeEntry = cast<BranchInst>(Br)->getSuccessor(0);
2419 OrigBB->getInstList().splice(Br->getIterator(), CalleeEntry->getInstList());
2422 OrigBB->getInstList().erase(Br);
H A DBreakCriticalEdges.cpp345 case Instruction::Br:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp225 MachineInstr *Br, MachineInstr *&UncondBr,
239 if (Br) {
240 assert(Br->getOperand(0).getMBB() == &Succ &&
242 Br->getOperand(0).setMBB(&NewMBB);
263 TII.insertBranch(NewMBB, &Succ, nullptr, Cond, Br->getDebugLoc());
726 MachineInstr *Br, MachineInstr *&UncondBr,
733 : splitEdge(MBB, Succ, SuccCount, Br, UncondBr, *TII);
223 splitEdge(MachineBasicBlock &MBB, MachineBasicBlock &Succ, int SuccCount, MachineInstr *Br, MachineInstr *&UncondBr, const X86InstrInfo &TII) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/
H A DWebAssemblyAsmParser.cpp136 for (auto Br : BrL.List)
137 Inst.addOperand(MCOperand::createImm(Br));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DObjCARCInstKind.cpp247 case Instruction::Br:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/IPO/
H A DLowerTypeTests.cpp781 if (auto *Br = dyn_cast<BranchInst>(*CI->user_begin()))
782 if (CI->getNextNode() == Br) {
784 BasicBlock *Else = Br->getSuccessor(1);
787 Br->getMetadata(LLVMContext::MD_prof));
/freebsd-11-stable/contrib/llvm-project/lldb/source/Expression/
H A DIRInterpreter.cpp517 case Instruction::Br:
901 case Instruction::Br: {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/
H A DMetadata.cpp1317 (getOpcode() == Instruction::Br || getOpcode() == Instruction::Select) &&
1340 assert((getOpcode() == Instruction::Br ||
H A DInstruction.cpp296 case Br: return "br";
/freebsd-11-stable/contrib/llvm-project/llvm/lib/AsmParser/
H A DLLLexer.cpp870 INSTKEYWORD(br, Br);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTypePromotion.cpp753 case Instruction::Br:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineInternal.h227 case Instruction::Br:

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