/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 187 /// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. 192 BUILD_PAIR, enumerator in enum:llvm::ISD::NodeType
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 666 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 674 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 689 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 731 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 1776 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 380 case ISD::BUILD_PAIR: return "build_pair";
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H A D | LegalizeFloatTypes.cpp | 63 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break; 195 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), 1123 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; 1596 Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
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H A D | LegalizeTypesGeneric.cpp | 129 // Each iteration will BUILD_PAIR two nodes and append the result until 138 ISD::BUILD_PAIR, dl,
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H A D | LegalizeIntegerTypes.cpp | 61 case ISD::BUILD_PAIR: Res = PromoteIntRes_BUILD_PAIR(N); break; 438 // the result, for example i14 = BUILD_PAIR (i7, i7). Handle all cases. 1268 case ISD::BUILD_PAIR: Res = PromoteIntOp_BUILD_PAIR(N); break; 1809 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; 3559 SDValue OneInHigh = DAG.getNode(ISD::BUILD_PAIR, dl, VT, HalfZero, 3564 SDValue TwoInHigh = DAG.getNode(ISD::BUILD_PAIR, dl, VT, HalfZero,
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H A D | SelectionDAGBuilder.cpp | 246 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi); 277 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi); 5536 case ISD::BUILD_PAIR: 9908 if (!TM.Options.EnableFastISel && Res.getOpcode() == ISD::BUILD_PAIR) { 9912 // the operands to BUILD_PAIR depending on endianness. The result of 9914 // be in the first operand of the BUILD_PAIR node, and the most
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H A D | DAGCombiner.cpp | 1576 case ISD::BUILD_PAIR: return visitBUILD_PAIR(N); 11056 assert(N->getOpcode() == ISD::BUILD_PAIR); 11061 // A BUILD_PAIR is always having the least significant part in elt 0 and the 11256 DAG.getNode(ISD::BUILD_PAIR, SDLoc(N0), VT, FlipBit, FlipBit); 11325 DAG.getNode(ISD::BUILD_PAIR, SDLoc(N0), VT, FlipBit, FlipBit); 11344 if (N0.getOpcode() == ISD::BUILD_PAIR)
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H A D | LegalizeDAG.cpp | 3507 case ISD::BUILD_PAIR: {
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H A D | SelectionDAG.cpp | 810 case ISD::BUILD_PAIR: { 5394 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 5396 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 5397 if (N1.getOpcode() == ISD::BUILD_PAIR)
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H A D | TargetLowering.cpp | 1655 case ISD::BUILD_PAIR: {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 443 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); 499 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); 3366 SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Ops);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 272 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 1256 return DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Lo, Hi); 1298 return DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Lo, Hi);
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H A D | MipsISelLowering.cpp | 1052 CurDAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, ResLo, ResHi);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 808 case ISD::BUILD_PAIR: { 820 llvm_unreachable("Unhandled value type for BUILD_PAIR");
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H A D | AMDGPUISelLowering.cpp | 3302 return DAG.getNode(ISD::BUILD_PAIR, SL, MVT::i64,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1351 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 5653 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Read.getValue(0), 5823 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); 6184 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 6210 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 9194 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Cycles32,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 566 // BUILD_PAIR can't be handled natively, and should be expanded to shl/or 567 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); 6277 ArgVal = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); 8596 (Op0.getOpcode() != ISD::BUILD_PAIR) ||
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 249 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); 12982 SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), MVT::i128,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 5232 return DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i128, Lo, Hi);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 24701 SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Ops); [all...] |