Searched refs:BSWAP (Results 1 - 25 of 46) sorted by relevance

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/freebsd-11-stable/crypto/openssl/crypto/sha/asm/
H A Dsha1-586.pl423 my ($ABCD,$E,$E_,$BSWAP)=map("xmm$_",(0..3));
455 &movdqa ($BSWAP,&QWP(0x50,$tmp1)); # byte-n-word swap
462 &pshufb (@MSG[0],$BSWAP);
464 &pshufb (@MSG[1],$BSWAP);
465 &pshufb (@MSG[2],$BSWAP);
466 &pshufb (@MSG[3],$BSWAP);
499 &pshufb (@MSG[0],$BSWAP);
505 &pshufb (@MSG[1],$BSWAP);
511 &pshufb (@MSG[2],$BSWAP);
516 &pshufb (@MSG[3],$BSWAP);
[all...]
H A Dsha1-x86_64.pl337 my ($ABCD,$E,$E_,$BSWAP,$ABCD_SAVE,$E_SAVE)=map("%xmm$_",(0..3,8,9));
357 movdqa K_XX_XX+0xa0(%rip),$BSWAP # byte-n-word swap
364 pshufb $BSWAP,@MSG[0]
366 pshufb $BSWAP,@MSG[1]
367 pshufb $BSWAP,@MSG[2]
369 pshufb $BSWAP,@MSG[3]
404 pshufb $BSWAP,@MSG[0]
410 pshufb $BSWAP,@MSG[1]
416 pshufb $BSWAP,@MSG[2]
421 pshufb $BSWAP,
[all...]
H A Dsha1-mb-x86_64.pl504 my ($ABCD0,$E0,$E0_,$BSWAP,$ABCD1,$E1,$E1_)=map("%xmm$_",(0..3,8..10));
538 movdqa K_XX_XX+0x80(%rip),$BSWAP # byte-n-word swap
585 pshufb $BSWAP,@MSG0[0]
587 pshufb $BSWAP,@MSG1[0]
590 pshufb $BSWAP,@MSG0[1]
593 pshufb $BSWAP,@MSG1[1]
607 pshufb $BSWAP,@MSG0[2]
610 pshufb $BSWAP,@MSG1[2]
614 pshufb $BSWAP,@MSG0[3]
616 pshufb $BSWAP,
[all...]
H A Dsha512-x86_64.pl535 my ($Wi,$ABEF,$CDGH,$TMP,$BSWAP,$ABEF_SAVE,$CDGH_SAVE)=map("%xmm$_",(0..2,7..10));
562 movdqa $TMP,$BSWAP # offload
650 movdqa $BSWAP,$TMP
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h474 BSWAP, CTTZ, CTLZ, CTPOP, BITREVERSE, enumerator in enum:llvm::ISD::NodeType
/freebsd-11-stable/sys/amd64/amd64/
H A Dbpf_jit_machdep.c257 BSWAP(EAX);
324 BSWAP(EAX);
H A Dbpf_jit_machdep.h218 #define BSWAP(dr32) do { \ macro
/freebsd-11-stable/sys/i386/i386/
H A Dbpf_jit_machdep.c270 BSWAP(EAX);
342 BSWAP(EAX);
H A Dbpf_jit_machdep.h158 #define BSWAP(dr32) do { \ macro
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp1891 // BSWAP: llvm\test\CodeGen\X86\bswap-vector.ll
1972 { ISD::BSWAP, MVT::v4i64, 1 },
1973 { ISD::BSWAP, MVT::v8i32, 1 },
1974 { ISD::BSWAP, MVT::v16i16, 1 },
2009 { ISD::BSWAP, MVT::v4i64, 4 },
2010 { ISD::BSWAP, MVT::v8i32, 4 },
2011 { ISD::BSWAP, MVT::v16i16, 4 },
2064 { ISD::BSWAP, MVT::v2i64, 1 },
2065 { ISD::BSWAP, MVT::v4i32, 1 },
2066 { ISD::BSWAP, MV
[all...]
/freebsd-11-stable/crypto/openssl/crypto/aes/asm/
H A Daesni-sha1-x86_64.pl1674 my ($BSWAP,$ABCD,$E,$E_,$ABCD_SAVE,$E_SAVE)=map("%xmm$_",(7..12));
1700 movdqa K_XX_XX+0x50(%rip),$BSWAP # byte-n-word swap
1720 pshufb $BSWAP,@MSG[0]
1726 pshufb $BSWAP,@MSG[1]
1737 pshufb $BSWAP,@MSG[2]
1746 pshufb $BSWAP,@MSG[3]
H A Daesni-sha256-x86_64.pl1223 my ($Wi,$ABEF,$CDGH,$TMP,$BSWAP,$ABEF_SAVE,$CDGH_SAVE)=map("%xmm$_",(0..3,7..9));
1309 movdqa $TMP,$BSWAP # offload
1431 movdqa $BSWAP,$TMP
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16ISelLowering.cpp146 setOperationAction(ISD::BSWAP, MVT::i32, Expand);
147 setOperationAction(ISD::BSWAP, MVT::i64, Expand);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp643 setTargetDAGCombine(ISD::BSWAP);
5784 // Combine STORE (BSWAP) into STRVH/STRV/STRVG/VSTBR
5786 Op1.getOpcode() == ISD::BSWAP &&
5879 // Pull BSWAP out of a vector extraction.
5880 if (Op.getOpcode() == ISD::BSWAP && Op.hasOneUse()) {
5886 Op = DAG.getNode(ISD::BSWAP, SDLoc(N), EltVT, Op);
6062 // Combine BSWAP (LOAD) into LRVH/LRV/LRVG/VLBR
6108 // Push BSWAP into a vector insertion if at least one side then simplifies.
6115 Vec.getOpcode() == ISD::BSWAP || Vec.isUndef() ||
6117 Elt.getOpcode() == ISD::BSWAP || El
[all...]
/freebsd-11-stable/sys/dev/bktr/
H A Dbktr_core.c360 #define BSWAP (BT848_COLOR_CTL_BSWAP_ODD | BT848_COLOR_CTL_BSWAP_EVEN) macro
3770 case 2 : swapf = ( pf->swap_bytes ? 0 : BSWAP );
3779 swapf = pf->swap_shorts ? BSWAP : (BSWAP | WSWAP);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp107 setOperationAction(ISD::BSWAP, MVT::i32, Promote);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp394 case ISD::BSWAP: return "bswap";
H A DLegalizeVectorOps.cpp393 case ISD::BSWAP:
860 case ISD::BSWAP:
1184 // Generate a byte wise shuffle mask for the BSWAP.
1211 // to BSWAP shuffle the bytes and then perform the BITREVERSE on the byte
H A DLegalizeIntegerTypes.cpp60 case ISD::BSWAP: Res = PromoteIntRes_BSWAP(N); break;
398 // Helper for BSWAP/BITREVERSE promotion to ensure we can fit any shift amount
419 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op),
1818 case ISD::BSWAP: ExpandIntRes_BSWAP(N, Lo, Hi); break;
2592 Lo = DAG.getNode(ISD::BSWAP, dl, Lo.getValueType(), Lo);
2593 Hi = DAG.getNode(ISD::BSWAP, dl, Hi.getValueType(), Hi);
H A DDAGCombiner.cpp1554 case ISD::BSWAP: return visitBSWAP(N);
4447 if (HandOpcode == ISD::BSWAP) {
5453 if (!TLI.isOperationLegalOrCustom(ISD::BSWAP, VT))
5547 SDValue Res = DAG.getNode(ISD::BSWAP, SDLoc(N), VT, N00);
5653 if (N.getOpcode() == ISD::SRL && N.getOperand(0).getOpcode() == ISD::BSWAP) {
5677 if (!TLI.isOperationLegalOrCustom(ISD::BSWAP, VT))
5707 SDValue BSwap = DAG.getNode(ISD::BSWAP, DL, VT,
6509 case ISD::BSWAP:
6577 /// stores. Fold it into a single store or a BSWAP and a store if the targets
6597 /// *((i32)p) = BSWAP(va
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp341 // PowerPC does not have BSWAP, but we can use vector BSWAP instruction xxbrd
344 setOperationAction(ISD::BSWAP, MVT::i32 , Expand);
346 setOperationAction(ISD::BSWAP, MVT::i64 , Custom);
348 setOperationAction(ISD::BSWAP, MVT::i64 , Expand);
685 setOperationAction(ISD::BSWAP, VT, Expand);
967 setOperationAction(ISD::BSWAP, MVT::v8i16, Legal);
968 setOperationAction(ISD::BSWAP, MVT::v4i32, Legal);
969 setOperationAction(ISD::BSWAP, MVT::v2i64, Legal);
970 setOperationAction(ISD::BSWAP, MV
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp983 Victim = DAG.getNode(ISD::BSWAP, dl, VT, Victim);
988 Victim = DAG.getNode(ISD::BSWAP, dl, VT, Victim);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1419 setOperationAction(ISD::BSWAP, MVT::i32, Legal);
1420 setOperationAction(ISD::BSWAP, MVT::i64, Legal);
2039 SDValue T1 = DAG.getNode(ISD::BSWAP, dl, MVT::i32, T0);
2066 SDValue T1 = DAG.getNode(ISD::BSWAP, dl, MVT::i64, T0);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp433 setOperationAction(ISD::BSWAP, MVT::i16, Expand);
434 setOperationAction(ISD::BSWAP, MVT::i32, Expand);
435 setOperationAction(ISD::BSWAP, MVT::i64, Expand);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp125 setOperationAction(ISD::BSWAP, MVT::i32, Expand);

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