Searched refs:bits (Results 1 - 25 of 32) sorted by relevance

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/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/src/
H A Dsb1250_mii.c140 uint64_t bits; local
145 bits = M_MAC_MDIO_DIR_OUTPUT | M_MAC_MDIO_OUT;
147 PHY_WRITECSR(s->sbe_mdio,bits | mac_mdio_genc);
150 PHY_WRITECSR(s->sbe_mdio,bits | M_MAC_MDC | mac_mdio_genc);
151 PHY_WRITECSR(s->sbe_mdio,bits | mac_mdio_genc);
159 uint64_t bits; local
165 bits = M_MAC_MDIO_DIR_OUTPUT;
166 PHY_WRITECSR(s->sbe_mdio,bits | mac_mdio_genc);
171 if (data & curmask) bits |= M_MAC_MDIO_OUT;
172 else bits
[all...]
H A Dui_phycmds.c218 * Synchronize with the MII - send a pattern of bits to the MII
231 uint64_t bits; local
236 bits = M_MAC_MDIO_DIR_OUTPUT | M_MAC_MDIO_OUT;
238 PHY_WRITECSR(s->sbe_mdio,bits | mac_mdio_genc);
241 PHY_WRITECSR(s->sbe_mdio,bits | M_MAC_MDC | mac_mdio_genc);
243 PHY_WRITECSR(s->sbe_mdio,bits | mac_mdio_genc);
252 * Send some bits to the MII. The bits to be sent are right-
258 * bitcnt - number of bits to send
264 uint64_t bits; local
[all...]
H A Dui_cpuinfo.c448 unsigned char bits; local
451 bits = wid & 0x3f;
453 if (bits < 0xa)
454 code = bits + '0';
455 else if (bits < 0x24)
456 code = (bits - 0xa) + 'A';
457 else if (bits == 0x3d)
459 else if (bits == 0x3e)
461 else if (bits == 0x3f)
H A Dui_corecmds.c70 * bits 31-29 of the address in the top posi
73 static void segment_bounce(unsigned int bits) argument
H A Ddev_sb1250_ethernet.c293 * Synchronize with the MII - send a pattern of bits to the MII
306 uint64_t bits; local
311 bits = M_MAC_MDIO_DIR_OUTPUT | M_MAC_MDIO_OUT;
313 SBETH_WRITECSR(s->sbe_mdio,bits | mac_mdio_genc);
316 SBETH_WRITECSR(s->sbe_mdio,bits | M_MAC_MDC | mac_mdio_genc);
317 SBETH_WRITECSR(s->sbe_mdio,bits | mac_mdio_genc);
325 * Send some bits to the MII. The bits to be sent are right-
331 * bitcnt - number of bits to send
337 uint64_t bits; local
[all...]
/broadcom-cfe-1.4.2/cfe/zlib/
H A Dtrees.c47 /* Bit length codes must not exceed MAX_BL_BITS bits */
53 /* repeat previous bit length 3-6 times (2 bits of repeat count) */
56 /* repeat a zero length 3-10 times (3 bits of repeat count) */
59 /* repeat a zero length 11-138 times (7 bits of repeat count) */
61 local const int extra_lbits[LENGTH_CODES] /* extra bits for each length code */
64 local const int extra_dbits[D_CODES] /* extra bits for each distance code */
67 local const int extra_blbits[BL_CODES]/* extra bits for each bit length code */
77 /* Number of bits used within bi_buf. (bi_buf might be implemented on
78 * more than 16 bits on some systems.)
99 * 5 bits
244 int bits; /* bit counter */ local
503 int bits; /* bit length */ local
585 int bits; /* bit index */ local
[all...]
H A Dmaketree.c25 #define bits word.what.Bits macro
43 printf(" {{{%u,%u}},%u}", t[i].exop, t[i].bits, t[i].base);
H A Dinffast.c17 #define bits word.what.Bits macro
36 uInt e; /* extra bits or operation */
38 uInt k; /* bits in bit buffer */
59 GRABBITS(20) /* max bits for literal/length code */
62 DUMPBITS(t->bits)
71 DUMPBITS(t->bits)
74 /* get extra bits for length */
81 GRABBITS(15); /* max bits for distance code */
84 DUMPBITS(t->bits)
87 /* get extra bits t
[all...]
H A Dinfcodes.c15 #define bits word.what.Bits macro
41 uInt need; /* bits needed */
45 uInt get; /* bits to get for extra */
51 Byte lbits; /* ltree bits decoded per branch */
52 Byte dbits; /* dtree bits decoder per branch */
88 uInt e; /* extra bits or operation */
90 uInt k; /* bits in bit buffer */
125 DUMPBITS(t->bits)
172 DUMPBITS(t->bits)
H A Dinftrees.c25 #define bits word.what.Bits macro
29 uIntf *, /* code lengths in bits */
33 const uIntf *, /* list of extra bits for non-simple codes */
35 uIntf *, /* maximum lookup bits (returns actual) */
45 local const uInt cplext[31] = { /* Extra bits for literal codes 257..285 */
52 local const uInt cpdext[30] = { /* Extra bits for distance codes */
70 below. lbits is the number of bits the first level table for literal/
75 bits is used, or when the shortest code is *longer* than the requested
76 table size, in which case the length of the shortest code in bits is
82 bits
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/sb1250/src/
H A Dsb1250_altcpu.S192 dsrl t0,S_SYS_PART # Shift part # to low bits
204 dli t0,-1 # clear all 64 bits
236 dli t0,-1 # clear all 64 bits
272 dsrl t0,S_SYS_PART # Shift part # to low bits
316 dsrl t0,S_SYS_PART # Shift part # to low bits
452 dsrl t0,S_SYS_PART # Shift part # to low bits
492 srl t0,t0,25 # shift CPU bits into low
493 and t0,t0,7 # keep only low 3 bits
565 dsrl t0,S_SYS_PART # Shift part # to low bits
628 dsrl t0,S_SYS_PART # Shift part # to low bits
[all...]
H A Dsb1250_cpu.S365 * 0x2000_0000 to 0x2004_0000. BadVPN2 plus the four bits
366 * of zeroes at the end are bits 31..9
370 * are 64 entries, so we need only 10 bits to address
375 * the bottom ten bits for the page number, as:
382 * PTEbase gets shifted right 13 bits.
383 * BadVPN gets masked at 6 bits (mask is 0x3F0)
384 * The bottom 4 bits are zero.
387 * right by 9 bits, and check for values of 0x1000 and
409 li k0,XTYPE_TLBFILL # all other bits are not
416 not k1 # BadVPN2 bits
[all...]
H A Dsb1_cpuinit.S228 srl v0,v0,3 # strip out K0 bits
229 sll v0,v0,3 # k0 bits now zero
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcmcore/src/
H A Dbcmcore_cpuinit.S162 srl v0,v0,3 # strip out K0 bits
163 sll v0,v0,3 # k0 bits now zero
321 * a0 - flag bits (CFE_CACHE_xxx)
445 * 0x2000_0000 to 0x2004_0000. BadVPN2 plus the four bits
446 * of zeroes at the end are bits 31..9
450 * are 64 entries, so we need only 10 bits to address
455 * the bottom ten bits for the page number, as:
462 * PTEbase gets shifted right 13 bits.
463 * BadVPN gets masked at 6 bits (mask is 0x3F0)
464 * The bottom 4 bits ar
[all...]
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/
H A Dbcm1480_cpu.S346 * 0x2000_0000 to 0x2004_0000. BadVPN2 plus the four bits
347 * of zeroes at the end are bits 31..9
351 * are 64 entries, so we need only 10 bits to address
356 * the bottom ten bits for the page number, as:
363 * PTEbase gets shifted right 13 bits.
364 * BadVPN gets masked at 6 bits (mask is 0x3F0)
365 * The bottom 4 bits are zero.
368 * right by 9 bits, and check for values of 0x1000 and
390 li k0,XTYPE_TLBFILL # all other bits are not
397 not k1 # BadVPN2 bits
[all...]
H A Dsb1_cpuinit.S229 srl v0,v0,3 # strip out K0 bits
230 sll v0,v0,3 # k0 bits now zero
H A Dbcm1480_altcpu.S251 dli t0,-1 # clear all 64 bits
288 dli t0,-1 # clear all 64 bits
442 dli t0,-1 # clear all 64 bits
479 dli t0,-1 # clear all 64 bits
661 sll t0,5 /* shift left 5 bits for cache offset */
784 * Clear all the bits in the mailbox register to dismiss the
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91125pcix/src/
H A Dbcm91125pcix_init.S228 # Program the mode register for 8 bits/char, no parity
303 * a0 - character to transmit (low-order 8 bits)
317 ld t1,(t0) # Get status bits
344 * a0 - LED value (8 bits per character, 4 characters)
/broadcom-cfe-1.4.2/cfe/arch/mips/board/sentosa/src/
H A Dsentosa_init.S152 # Program the mode register for 8 bits/char, no parity
334 * a0 - character to transmit (low-order 8 bits)
349 ld t1,(t0) # Get status bits
375 * a0 - LED value (8 bits per character, 4 characters)
/broadcom-cfe-1.4.2/cfe/verif/
H A Dvapi.h191 #define VAPI_LOG_SOCSTATE(id,bits) \
195 li a1, bits ; \
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91280e/src/
H A Dbcm91280e_init.S130 #if CFG_L2_RAM /* Variant for using L2 as memory via TLB for 32 bits */
201 # Program the mode register for 8 bits/char, no parity
255 bnez t0, 1f # Some bits set -> half already
342 #if CFG_L2_RAM /* Variant for using L2 as memory via TLB for 32 bits */
427 * a0 - character to transmit (low-order 8 bits)
465 * a0 - character to transmit (low-order 8 bits)
480 ld t1,(t0) # Get status bits
506 * a0 - LED value (8 bits per character, 4 characters)
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91125e/src/
H A Dbcm91125e_init.S232 # Program the mode register for 8 bits/char, no parity
407 * a0 - character to transmit (low-order 8 bits)
421 ld t1,(t0) # Get status bits
447 * a0 - LED value (8 bits per character, 4 characters)
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91125f/src/
H A Dbcm91125f_init.S220 # Program the mode register for 8 bits/char, no parity
395 * a0 - character to transmit (low-order 8 bits)
409 ld t1,(t0) # Get status bits
435 * a0 - LED value (8 bits per character, 4 characters)
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91480b/src/
H A Dbcm91480b_init.S153 #if CFG_L2_RAM /* Variant for using L2 as memory via TLB for 32 bits */
307 # Program the mode register for 8 bits/char, no parity
361 bnez t0, 1f # Some bits set -> half already
448 #if CFG_L2_RAM /* Variant for using L2 as memory via TLB for 32 bits */
562 * a0 - character to transmit (low-order 8 bits)
600 * a0 - character to transmit (low-order 8 bits)
615 ld t1,(t0) # Get status bits
641 * a0 - LED value (8 bits per character, 4 characters)
/broadcom-cfe-1.4.2/cfe/arch/mips/board/bcm91480ht/src/
H A Dbcm91480ht_init.S130 #if CFG_L2_RAM /* Variant for using L2 as memory via TLB for 32 bits */
233 # Program the mode register for 8 bits/char, no parity
292 #if CFG_L2_RAM /* Variant for using L2 as memory via TLB for 32 bits */
402 * a0 - character to transmit (low-order 8 bits)
440 * a0 - character to transmit (low-order 8 bits)
455 ld t1,(t0) # Get status bits
481 * a0 - LED value (8 bits per character, 4 characters)

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