Searched refs:R_MC_CS_START (Results 1 - 10 of 10) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/src/
H A Dsb1250_draminit.c2292 mask = READCSR(mc0base+R_MC_CS_START);
2296 WRITECSR(mc0base+R_MC_CS_START,mask);
2298 mask = READCSR(mc1base+R_MC_CS_START);
2302 WRITECSR(mc1base+R_MC_CS_START,mask);
2481 mask = READCSR(mcbase+R_MC_CS_START);
2485 WRITECSR(mcbase+R_MC_CS_START,mask);
2491 mask = READCSR(mcbase+R_MC_CS_START);
2495 WRITECSR(mcbase+R_MC_CS_START,mask);
2880 WRITECSR(mcbase+R_MC_CS_START,0);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bcm91125c/src/
H A Dbcm91125c_init.S240 sd zero, R_MC_CS_START(t0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/pt1120/src/
H A Dpt1120_init.S291 sd zero, R_MC_CS_START(t0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/pt1125/src/
H A Dpt1125_init.S288 sd zero, R_MC_CS_START(t0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bcm91120c/src/
H A Dbcm91120c_init.S240 sd zero, R_MC_CS_START(t0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bcm91125e/src/
H A Dbcm91125e_init.S209 sd zero, R_MC_CS_START(t0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/carmel/src/
H A Dcarmel_init.S356 sd zero, R_MC_CS_START(t0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/
H A Dsb1250_regs.h88 #define R_MC_CS_START 0x00000001A0 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/sibyte/
H A Dsb1250_regs.h72 #define R_MC_CS_START 0x00000001A0 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/sibyte/
H A Dsb1250_regs.h72 #define R_MC_CS_START 0x00000001A0 macro

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