Searched refs:INT_SOURCE_CSR (Results 1 - 14 of 14) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/wireless/rt2x00/
H A Drt2800pci.c342 rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
343 rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
891 rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
892 rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
H A Drt61pci.c1629 rt2x00pci_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
1630 rt2x00pci_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
2206 rt2x00pci_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
2207 rt2x00pci_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
H A Drt61pci.h964 * INT_SOURCE_CSR: Interrupt source register.
967 #define INT_SOURCE_CSR 0x3468 macro
H A Drt2800.h122 * INT_SOURCE_CSR: Interrupt source register.
126 #define INT_SOURCE_CSR 0x0200 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/wireless/rt2x00/
H A Drt2800pci.c342 rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
343 rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
891 rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
892 rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
H A Drt61pci.c1629 rt2x00pci_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
1630 rt2x00pci_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
2206 rt2x00pci_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
2207 rt2x00pci_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
H A Drt61pci.h964 * INT_SOURCE_CSR: Interrupt source register.
967 #define INT_SOURCE_CSR 0x3468 macro
H A Drt2800.h122 * INT_SOURCE_CSR: Interrupt source register.
126 #define INT_SOURCE_CSR 0x0200 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rt2860/
H A Drt_pci_rbus.c616 RTMP_IO_READ32(pAd, INT_SOURCE_CSR, &IntSource.word);
617 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, IntSource.word);
637 /* We need to check it before handle the INT_SOURCE_CSR, ASIC must be wake up. */
643 RTMP_IO_READ32(pAd, INT_SOURCE_CSR, &IntSource.word);
644 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, IntSource.word); /* write 1 to clear */
649 /* RTMP_IO_READ32(pAd, INT_SOURCE_CSR, &IsrAfterClear); */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rt2860/
H A Drt_pci_rbus.c616 RTMP_IO_READ32(pAd, INT_SOURCE_CSR, &IntSource.word);
617 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, IntSource.word);
637 /* We need to check it before handle the INT_SOURCE_CSR, ASIC must be wake up. */
643 RTMP_IO_READ32(pAd, INT_SOURCE_CSR, &IntSource.word);
644 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, IntSource.word); /* write 1 to clear */
649 /* RTMP_IO_READ32(pAd, INT_SOURCE_CSR, &IsrAfterClear); */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rt2860/chip/
H A Dmac_pci.h306 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff);\
H A Drtmp_mac.h133 /* INT_SOURCE_CSR: Interrupt source register. Write one to clear corresponding bit */
136 #define INT_SOURCE_CSR 0x200 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rt2860/chip/
H A Dmac_pci.h306 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff);\
H A Drtmp_mac.h133 /* INT_SOURCE_CSR: Interrupt source register. Write one to clear corresponding bit */
136 #define INT_SOURCE_CSR 0x200 macro

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