Searched refs:GT_WRITE (Results 1 - 25 of 32) sorted by relevance

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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/gt64120/momenco_ocelot/
H A Dsetup.c115 GT_WRITE(GT_CS3BOOTLD_OFS, 0x2f000000 >> 21);
118 GT_WRITE(GT_CS20LD_OFS, 0x2c000000 >> 21);
121 GT_WRITE(GT_ISD_OFS, 0x24000000 >> 21);
126 GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000020);
127 GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x24000000);
128 GT_WRITE(GT_PCI0_CFGADDR_OFS, 0x80000024);
129 GT_WRITE(GT_PCI0_CFGDATA_OFS, 0x24000001);
188 GT_WRITE(GT_PCI1IOLD_OFS, 0x30000000 >> 21);
189 GT_WRITE(GT_PCI1M0LD_OFS, 0x32000000 >> 21);
190 GT_WRITE(GT_PCI1M1LD_OF
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/galileo-boards/ev64120/
H A Dirq-handler.c158 GT_WRITE(GT_INTRCAUSE_OFS, 0);
159 GT_WRITE(GT_HINTRCAUSE_OFS, 0);
225 GT_WRITE(GT_TC_CONTROL_OFS, 0);
227 GT_WRITE(GT_TC3_OFS, Sys_clock / 100);
243 GT_WRITE(GT_TC_CONTROL_OFS, 0xc0);
245 GT_WRITE(GT_INTRCAUSE_OFS, 0x0);
247 GT_WRITE(GT_INTRMASK_OFS, 0x800);
249 GT_WRITE(GT_HINTRCAUSE_OFS, 0x0);
251 GT_WRITE(GT_HINTRMASK_OFS, 0x0);
H A Dpci_bios.c149 GT_WRITE(GT_PCI0IOLD_OFS, pci0IoBase);
150 GT_WRITE(GT_PCI0IOHD_OFS, pci0IoTop);
169 GT_WRITE(GT_PCI1IOLD_OFS, pci1IoBase);
170 GT_WRITE(GT_PCI1IOHD_OFS, pci1IoTop);
188 GT_WRITE(GT_PCI0M0LD_OFS, pci0Mem0Base);
189 GT_WRITE(GT_PCI0M0HD_OFS, pci0Mem0Top);
207 GT_WRITE(GT_PCI1M0LD_OFS, pci1Mem0Base);
208 GT_WRITE(GT_PCI1M0HD_OFS, pci1Mem0Top);
226 GT_WRITE(GT_PCI0M1LD_OFS, pci0Mem1Base);
227 GT_WRITE(GT_PCI0M1HD_OF
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/gt64120/common/
H A Dgt_irq.c147 GT_WRITE(GT_INTRCAUSE_OFS, 0);
148 GT_WRITE(GT_HINTRCAUSE_OFS, 0);
204 GT_WRITE(GT_TC_CONTROL_OFS, 0);
206 GT_WRITE(GT_TC3_OFS, Sys_clock / 100);
224 GT_WRITE(GT_TC_CONTROL_OFS, 0xc0);
226 GT_WRITE(GT_INTRCAUSE_OFS, 0x0);
228 GT_WRITE(GT_INTRMASK_OFS, 0x800);
230 GT_WRITE(GT_HINTRCAUSE_OFS, 0x0);
232 GT_WRITE(GT_HINTRMASK_OFS, 0x0);
H A Dpci.c144 GT_WRITE(GT_PCI0IOLD_OFS, pci0IoBase);
145 GT_WRITE(GT_PCI0IOHD_OFS, pci0IoTop);
164 GT_WRITE(GT_PCI1IOLD_OFS, pci1IoBase);
165 GT_WRITE(GT_PCI1IOHD_OFS, pci1IoTop);
183 GT_WRITE(GT_PCI0M0LD_OFS, pci0Mem0Base);
184 GT_WRITE(GT_PCI0M0HD_OFS, pci0Mem0Top);
202 GT_WRITE(GT_PCI1M0LD_OFS, pci1Mem0Base);
203 GT_WRITE(GT_PCI1M0HD_OFS, pci1Mem0Top);
221 GT_WRITE(GT_PCI0M1LD_OFS, pci0Mem1Base);
222 GT_WRITE(GT_PCI0M1HD_OF
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/gt64120/momenco_ocelot/
H A Dgt64120_dep.h38 #define GT_WRITE(ofs, data) \ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/gt64120/momenco_ocelot/
H A Dgt64120_dep.h38 #define GT_WRITE(ofs, data) \ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/gt64120/momenco_ocelot/
H A Dgt64120_dep.h38 #define GT_WRITE(ofs, data) \ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/gt64120/momenco_ocelot/
H A Dgt64120_dep.h38 #define GT_WRITE(ofs, data) \ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/galileo-boards/ev96100/
H A Dsetup.c160 GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
163 GT_WRITE(GT_PCI0_CFGADDR_OFS,
174 GT_WRITE(GT_PCI0_CFGADDR_OFS,
183 GT_WRITE(GT_PCI0_CFGADDR_OFS,
198 GT_WRITE(GT_PCI0_CFGADDR_OFS,
H A Dpci_ops.c98 GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
102 GT_WRITE(GT_PCI0_CFGADDR_OFS,
114 GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
134 GT_WRITE( GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/momentum/ocelot_g/
H A Dgt-irq.c134 GT_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0);
236 GT_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x0);
239 GT_WRITE(TIMER_COUNTER0, bus_clock / 100);
257 GT_WRITE(TIMER_COUNTER_0_3_INTERRUPT_CAUSE, 0x0);
260 GT_WRITE(TIMER_COUNTER_0_3_INTERRUPT_MASK, 0x1);
263 GT_WRITE (PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, 0x100);
266 GT_WRITE(TIMER_COUNTER_0_3_CONTROL, 0x3);
H A Dpci.c133 GT_WRITE(PCI_0ERROR_CAUSE, ~MASTER_ABORT_BIT);
137 GT_WRITE(PCI_1ERROR_CAUSE, ~MASTER_ABORT_BIT);
146 GT_WRITE(address_reg, address);
174 GT_WRITE(PCI_0ERROR_CAUSE, ~MASTER_ABORT_BIT);
178 GT_WRITE(PCI_1ERROR_CAUSE, ~MASTER_ABORT_BIT);
187 GT_WRITE(address_reg, address);
225 GT_WRITE(address_reg, address);
263 GT_WRITE(address_reg, address);
266 GT_WRITE(data_reg, val);
302 GT_WRITE(address_re
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H A Dgt64240_dep.h34 #define GT_WRITE(ofs, data) \ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/galileo-boards/
H A Dev64120.h53 #define GT_WRITE(ofs, data) \ macro
H A Dev96100.h49 #define GT_WRITE(ofs, data) \ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/galileo-boards/
H A Dev64120.h53 #define GT_WRITE(ofs, data) \ macro
H A Dev96100.h49 #define GT_WRITE(ofs, data) \ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/galileo-boards/
H A Dev64120.h53 #define GT_WRITE(ofs, data) \ macro
H A Dev96100.h49 #define GT_WRITE(ofs, data) \ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/galileo-boards/
H A Dev64120.h53 #define GT_WRITE(ofs, data) \ macro
H A Dev96100.h49 #define GT_WRITE(ofs, data) \ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/lasat/
H A Dpci.c30 #define GT_WRITE(ofs, data) \ macro
49 GT_WRITE( GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
53 GT_WRITE( GT_PCI0_CFGADDR_OFS,
60 GT_WRITE( GT_PCI0_CFGDATA_OFS, *data );
73 GT_WRITE( GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/mips-boards/generic/
H A Dpci.c74 GT_WRITE(GT_INTRCAUSE_OFS, intr &
79 GT_WRITE(GT_PCI0_CFGADDR_OFS,
91 GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
117 GT_WRITE(GT_INTRCAUSE_OFS, intr &
430 GT_WRITE(GT_PCI0_CFGADDR_OFS,
438 GT_WRITE( GT_PCI0_CFGDATA_OFS, PHYSADDR(MIPS_GT_BASE));
H A Dinit.c142 GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
145 GT_WRITE(GT_PCI0_CMD_OFS, 0);

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